android13/external/vixl/test/aarch32/traces/assembler-cond-rdlow-rnlow-rmlow-muls-t32.h

// Copyright 2015, VIXL authors
// All rights reserved.
//
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// modification, are permitted provided that the following conditions are met:
//
//   * Redistributions of source code must retain the above copyright notice,
//     this list of conditions and the following disclaimer.
//   * Redistributions in binary form must reproduce the above copyright notice,
//     this list of conditions and the following disclaimer in the documentation
//     and/or other materials provided with the distribution.
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//     used to endorse or promote products derived from this software without
//     specific prior written permission.
//
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// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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// ---------------------------------------------------------------------
// This file is auto generated using tools/generate_simulator_traces.py.
//
// PLEASE DO NOT EDIT.
// ---------------------------------------------------------------------

#ifndef VIXL_ASSEMBLER_COND_RDLOW_RNLOW_RMLOW_MULS_T32_H_
#define VIXL_ASSEMBLER_COND_RDLOW_RNLOW_RMLOW_MULS_T32_H_

const byte kInstruction_muls_al_r0_r0_r0[] = {
  0x40, 0x43 // muls al r0 r0 r0
};
const byte kInstruction_muls_al_r0_r1_r0[] = {
  0x48, 0x43 // muls al r0 r1 r0
};
const byte kInstruction_muls_al_r0_r2_r0[] = {
  0x50, 0x43 // muls al r0 r2 r0
};
const byte kInstruction_muls_al_r0_r3_r0[] = {
  0x58, 0x43 // muls al r0 r3 r0
};
const byte kInstruction_muls_al_r0_r4_r0[] = {
  0x60, 0x43 // muls al r0 r4 r0
};
const byte kInstruction_muls_al_r0_r5_r0[] = {
  0x68, 0x43 // muls al r0 r5 r0
};
const byte kInstruction_muls_al_r0_r6_r0[] = {
  0x70, 0x43 // muls al r0 r6 r0
};
const byte kInstruction_muls_al_r0_r7_r0[] = {
  0x78, 0x43 // muls al r0 r7 r0
};
const byte kInstruction_muls_al_r1_r0_r1[] = {
  0x41, 0x43 // muls al r1 r0 r1
};
const byte kInstruction_muls_al_r1_r1_r1[] = {
  0x49, 0x43 // muls al r1 r1 r1
};
const byte kInstruction_muls_al_r1_r2_r1[] = {
  0x51, 0x43 // muls al r1 r2 r1
};
const byte kInstruction_muls_al_r1_r3_r1[] = {
  0x59, 0x43 // muls al r1 r3 r1
};
const byte kInstruction_muls_al_r1_r4_r1[] = {
  0x61, 0x43 // muls al r1 r4 r1
};
const byte kInstruction_muls_al_r1_r5_r1[] = {
  0x69, 0x43 // muls al r1 r5 r1
};
const byte kInstruction_muls_al_r1_r6_r1[] = {
  0x71, 0x43 // muls al r1 r6 r1
};
const byte kInstruction_muls_al_r1_r7_r1[] = {
  0x79, 0x43 // muls al r1 r7 r1
};
const byte kInstruction_muls_al_r2_r0_r2[] = {
  0x42, 0x43 // muls al r2 r0 r2
};
const byte kInstruction_muls_al_r2_r1_r2[] = {
  0x4a, 0x43 // muls al r2 r1 r2
};
const byte kInstruction_muls_al_r2_r2_r2[] = {
  0x52, 0x43 // muls al r2 r2 r2
};
const byte kInstruction_muls_al_r2_r3_r2[] = {
  0x5a, 0x43 // muls al r2 r3 r2
};
const byte kInstruction_muls_al_r2_r4_r2[] = {
  0x62, 0x43 // muls al r2 r4 r2
};
const byte kInstruction_muls_al_r2_r5_r2[] = {
  0x6a, 0x43 // muls al r2 r5 r2
};
const byte kInstruction_muls_al_r2_r6_r2[] = {
  0x72, 0x43 // muls al r2 r6 r2
};
const byte kInstruction_muls_al_r2_r7_r2[] = {
  0x7a, 0x43 // muls al r2 r7 r2
};
const byte kInstruction_muls_al_r3_r0_r3[] = {
  0x43, 0x43 // muls al r3 r0 r3
};
const byte kInstruction_muls_al_r3_r1_r3[] = {
  0x4b, 0x43 // muls al r3 r1 r3
};
const byte kInstruction_muls_al_r3_r2_r3[] = {
  0x53, 0x43 // muls al r3 r2 r3
};
const byte kInstruction_muls_al_r3_r3_r3[] = {
  0x5b, 0x43 // muls al r3 r3 r3
};
const byte kInstruction_muls_al_r3_r4_r3[] = {
  0x63, 0x43 // muls al r3 r4 r3
};
const byte kInstruction_muls_al_r3_r5_r3[] = {
  0x6b, 0x43 // muls al r3 r5 r3
};
const byte kInstruction_muls_al_r3_r6_r3[] = {
  0x73, 0x43 // muls al r3 r6 r3
};
const byte kInstruction_muls_al_r3_r7_r3[] = {
  0x7b, 0x43 // muls al r3 r7 r3
};
const byte kInstruction_muls_al_r4_r0_r4[] = {
  0x44, 0x43 // muls al r4 r0 r4
};
const byte kInstruction_muls_al_r4_r1_r4[] = {
  0x4c, 0x43 // muls al r4 r1 r4
};
const byte kInstruction_muls_al_r4_r2_r4[] = {
  0x54, 0x43 // muls al r4 r2 r4
};
const byte kInstruction_muls_al_r4_r3_r4[] = {
  0x5c, 0x43 // muls al r4 r3 r4
};
const byte kInstruction_muls_al_r4_r4_r4[] = {
  0x64, 0x43 // muls al r4 r4 r4
};
const byte kInstruction_muls_al_r4_r5_r4[] = {
  0x6c, 0x43 // muls al r4 r5 r4
};
const byte kInstruction_muls_al_r4_r6_r4[] = {
  0x74, 0x43 // muls al r4 r6 r4
};
const byte kInstruction_muls_al_r4_r7_r4[] = {
  0x7c, 0x43 // muls al r4 r7 r4
};
const byte kInstruction_muls_al_r5_r0_r5[] = {
  0x45, 0x43 // muls al r5 r0 r5
};
const byte kInstruction_muls_al_r5_r1_r5[] = {
  0x4d, 0x43 // muls al r5 r1 r5
};
const byte kInstruction_muls_al_r5_r2_r5[] = {
  0x55, 0x43 // muls al r5 r2 r5
};
const byte kInstruction_muls_al_r5_r3_r5[] = {
  0x5d, 0x43 // muls al r5 r3 r5
};
const byte kInstruction_muls_al_r5_r4_r5[] = {
  0x65, 0x43 // muls al r5 r4 r5
};
const byte kInstruction_muls_al_r5_r5_r5[] = {
  0x6d, 0x43 // muls al r5 r5 r5
};
const byte kInstruction_muls_al_r5_r6_r5[] = {
  0x75, 0x43 // muls al r5 r6 r5
};
const byte kInstruction_muls_al_r5_r7_r5[] = {
  0x7d, 0x43 // muls al r5 r7 r5
};
const byte kInstruction_muls_al_r6_r0_r6[] = {
  0x46, 0x43 // muls al r6 r0 r6
};
const byte kInstruction_muls_al_r6_r1_r6[] = {
  0x4e, 0x43 // muls al r6 r1 r6
};
const byte kInstruction_muls_al_r6_r2_r6[] = {
  0x56, 0x43 // muls al r6 r2 r6
};
const byte kInstruction_muls_al_r6_r3_r6[] = {
  0x5e, 0x43 // muls al r6 r3 r6
};
const byte kInstruction_muls_al_r6_r4_r6[] = {
  0x66, 0x43 // muls al r6 r4 r6
};
const byte kInstruction_muls_al_r6_r5_r6[] = {
  0x6e, 0x43 // muls al r6 r5 r6
};
const byte kInstruction_muls_al_r6_r6_r6[] = {
  0x76, 0x43 // muls al r6 r6 r6
};
const byte kInstruction_muls_al_r6_r7_r6[] = {
  0x7e, 0x43 // muls al r6 r7 r6
};
const byte kInstruction_muls_al_r7_r0_r7[] = {
  0x47, 0x43 // muls al r7 r0 r7
};
const byte kInstruction_muls_al_r7_r1_r7[] = {
  0x4f, 0x43 // muls al r7 r1 r7
};
const byte kInstruction_muls_al_r7_r2_r7[] = {
  0x57, 0x43 // muls al r7 r2 r7
};
const byte kInstruction_muls_al_r7_r3_r7[] = {
  0x5f, 0x43 // muls al r7 r3 r7
};
const byte kInstruction_muls_al_r7_r4_r7[] = {
  0x67, 0x43 // muls al r7 r4 r7
};
const byte kInstruction_muls_al_r7_r5_r7[] = {
  0x6f, 0x43 // muls al r7 r5 r7
};
const byte kInstruction_muls_al_r7_r6_r7[] = {
  0x77, 0x43 // muls al r7 r6 r7
};
const byte kInstruction_muls_al_r7_r7_r7[] = {
  0x7f, 0x43 // muls al r7 r7 r7
};
const TestResult kReferencemuls[] = {
  {
    ARRAY_SIZE(kInstruction_muls_al_r0_r0_r0),
    kInstruction_muls_al_r0_r0_r0,
  },
  {
    ARRAY_SIZE(kInstruction_muls_al_r0_r1_r0),
    kInstruction_muls_al_r0_r1_r0,
  },
  {
    ARRAY_SIZE(kInstruction_muls_al_r0_r2_r0),
    kInstruction_muls_al_r0_r2_r0,
  },
  {
    ARRAY_SIZE(kInstruction_muls_al_r0_r3_r0),
    kInstruction_muls_al_r0_r3_r0,
  },
  {
    ARRAY_SIZE(kInstruction_muls_al_r0_r4_r0),
    kInstruction_muls_al_r0_r4_r0,
  },
  {
    ARRAY_SIZE(kInstruction_muls_al_r0_r5_r0),
    kInstruction_muls_al_r0_r5_r0,
  },
  {
    ARRAY_SIZE(kInstruction_muls_al_r0_r6_r0),
    kInstruction_muls_al_r0_r6_r0,
  },
  {
    ARRAY_SIZE(kInstruction_muls_al_r0_r7_r0),
    kInstruction_muls_al_r0_r7_r0,
  },
  {
    ARRAY_SIZE(kInstruction_muls_al_r1_r0_r1),
    kInstruction_muls_al_r1_r0_r1,
  },
  {
    ARRAY_SIZE(kInstruction_muls_al_r1_r1_r1),
    kInstruction_muls_al_r1_r1_r1,
  },
  {
    ARRAY_SIZE(kInstruction_muls_al_r1_r2_r1),
    kInstruction_muls_al_r1_r2_r1,
  },
  {
    ARRAY_SIZE(kInstruction_muls_al_r1_r3_r1),
    kInstruction_muls_al_r1_r3_r1,
  },
  {
    ARRAY_SIZE(kInstruction_muls_al_r1_r4_r1),
    kInstruction_muls_al_r1_r4_r1,
  },
  {
    ARRAY_SIZE(kInstruction_muls_al_r1_r5_r1),
    kInstruction_muls_al_r1_r5_r1,
  },
  {
    ARRAY_SIZE(kInstruction_muls_al_r1_r6_r1),
    kInstruction_muls_al_r1_r6_r1,
  },
  {
    ARRAY_SIZE(kInstruction_muls_al_r1_r7_r1),
    kInstruction_muls_al_r1_r7_r1,
  },
  {
    ARRAY_SIZE(kInstruction_muls_al_r2_r0_r2),
    kInstruction_muls_al_r2_r0_r2,
  },
  {
    ARRAY_SIZE(kInstruction_muls_al_r2_r1_r2),
    kInstruction_muls_al_r2_r1_r2,
  },
  {
    ARRAY_SIZE(kInstruction_muls_al_r2_r2_r2),
    kInstruction_muls_al_r2_r2_r2,
  },
  {
    ARRAY_SIZE(kInstruction_muls_al_r2_r3_r2),
    kInstruction_muls_al_r2_r3_r2,
  },
  {
    ARRAY_SIZE(kInstruction_muls_al_r2_r4_r2),
    kInstruction_muls_al_r2_r4_r2,
  },
  {
    ARRAY_SIZE(kInstruction_muls_al_r2_r5_r2),
    kInstruction_muls_al_r2_r5_r2,
  },
  {
    ARRAY_SIZE(kInstruction_muls_al_r2_r6_r2),
    kInstruction_muls_al_r2_r6_r2,
  },
  {
    ARRAY_SIZE(kInstruction_muls_al_r2_r7_r2),
    kInstruction_muls_al_r2_r7_r2,
  },
  {
    ARRAY_SIZE(kInstruction_muls_al_r3_r0_r3),
    kInstruction_muls_al_r3_r0_r3,
  },
  {
    ARRAY_SIZE(kInstruction_muls_al_r3_r1_r3),
    kInstruction_muls_al_r3_r1_r3,
  },
  {
    ARRAY_SIZE(kInstruction_muls_al_r3_r2_r3),
    kInstruction_muls_al_r3_r2_r3,
  },
  {
    ARRAY_SIZE(kInstruction_muls_al_r3_r3_r3),
    kInstruction_muls_al_r3_r3_r3,
  },
  {
    ARRAY_SIZE(kInstruction_muls_al_r3_r4_r3),
    kInstruction_muls_al_r3_r4_r3,
  },
  {
    ARRAY_SIZE(kInstruction_muls_al_r3_r5_r3),
    kInstruction_muls_al_r3_r5_r3,
  },
  {
    ARRAY_SIZE(kInstruction_muls_al_r3_r6_r3),
    kInstruction_muls_al_r3_r6_r3,
  },
  {
    ARRAY_SIZE(kInstruction_muls_al_r3_r7_r3),
    kInstruction_muls_al_r3_r7_r3,
  },
  {
    ARRAY_SIZE(kInstruction_muls_al_r4_r0_r4),
    kInstruction_muls_al_r4_r0_r4,
  },
  {
    ARRAY_SIZE(kInstruction_muls_al_r4_r1_r4),
    kInstruction_muls_al_r4_r1_r4,
  },
  {
    ARRAY_SIZE(kInstruction_muls_al_r4_r2_r4),
    kInstruction_muls_al_r4_r2_r4,
  },
  {
    ARRAY_SIZE(kInstruction_muls_al_r4_r3_r4),
    kInstruction_muls_al_r4_r3_r4,
  },
  {
    ARRAY_SIZE(kInstruction_muls_al_r4_r4_r4),
    kInstruction_muls_al_r4_r4_r4,
  },
  {
    ARRAY_SIZE(kInstruction_muls_al_r4_r5_r4),
    kInstruction_muls_al_r4_r5_r4,
  },
  {
    ARRAY_SIZE(kInstruction_muls_al_r4_r6_r4),
    kInstruction_muls_al_r4_r6_r4,
  },
  {
    ARRAY_SIZE(kInstruction_muls_al_r4_r7_r4),
    kInstruction_muls_al_r4_r7_r4,
  },
  {
    ARRAY_SIZE(kInstruction_muls_al_r5_r0_r5),
    kInstruction_muls_al_r5_r0_r5,
  },
  {
    ARRAY_SIZE(kInstruction_muls_al_r5_r1_r5),
    kInstruction_muls_al_r5_r1_r5,
  },
  {
    ARRAY_SIZE(kInstruction_muls_al_r5_r2_r5),
    kInstruction_muls_al_r5_r2_r5,
  },
  {
    ARRAY_SIZE(kInstruction_muls_al_r5_r3_r5),
    kInstruction_muls_al_r5_r3_r5,
  },
  {
    ARRAY_SIZE(kInstruction_muls_al_r5_r4_r5),
    kInstruction_muls_al_r5_r4_r5,
  },
  {
    ARRAY_SIZE(kInstruction_muls_al_r5_r5_r5),
    kInstruction_muls_al_r5_r5_r5,
  },
  {
    ARRAY_SIZE(kInstruction_muls_al_r5_r6_r5),
    kInstruction_muls_al_r5_r6_r5,
  },
  {
    ARRAY_SIZE(kInstruction_muls_al_r5_r7_r5),
    kInstruction_muls_al_r5_r7_r5,
  },
  {
    ARRAY_SIZE(kInstruction_muls_al_r6_r0_r6),
    kInstruction_muls_al_r6_r0_r6,
  },
  {
    ARRAY_SIZE(kInstruction_muls_al_r6_r1_r6),
    kInstruction_muls_al_r6_r1_r6,
  },
  {
    ARRAY_SIZE(kInstruction_muls_al_r6_r2_r6),
    kInstruction_muls_al_r6_r2_r6,
  },
  {
    ARRAY_SIZE(kInstruction_muls_al_r6_r3_r6),
    kInstruction_muls_al_r6_r3_r6,
  },
  {
    ARRAY_SIZE(kInstruction_muls_al_r6_r4_r6),
    kInstruction_muls_al_r6_r4_r6,
  },
  {
    ARRAY_SIZE(kInstruction_muls_al_r6_r5_r6),
    kInstruction_muls_al_r6_r5_r6,
  },
  {
    ARRAY_SIZE(kInstruction_muls_al_r6_r6_r6),
    kInstruction_muls_al_r6_r6_r6,
  },
  {
    ARRAY_SIZE(kInstruction_muls_al_r6_r7_r6),
    kInstruction_muls_al_r6_r7_r6,
  },
  {
    ARRAY_SIZE(kInstruction_muls_al_r7_r0_r7),
    kInstruction_muls_al_r7_r0_r7,
  },
  {
    ARRAY_SIZE(kInstruction_muls_al_r7_r1_r7),
    kInstruction_muls_al_r7_r1_r7,
  },
  {
    ARRAY_SIZE(kInstruction_muls_al_r7_r2_r7),
    kInstruction_muls_al_r7_r2_r7,
  },
  {
    ARRAY_SIZE(kInstruction_muls_al_r7_r3_r7),
    kInstruction_muls_al_r7_r3_r7,
  },
  {
    ARRAY_SIZE(kInstruction_muls_al_r7_r4_r7),
    kInstruction_muls_al_r7_r4_r7,
  },
  {
    ARRAY_SIZE(kInstruction_muls_al_r7_r5_r7),
    kInstruction_muls_al_r7_r5_r7,
  },
  {
    ARRAY_SIZE(kInstruction_muls_al_r7_r6_r7),
    kInstruction_muls_al_r7_r6_r7,
  },
  {
    ARRAY_SIZE(kInstruction_muls_al_r7_r7_r7),
    kInstruction_muls_al_r7_r7_r7,
  },
};

#endif  // VIXL_ASSEMBLER_COND_RDLOW_RNLOW_RMLOW_MULS_T32_H_