204 lines
2.5 KiB
Plaintext
204 lines
2.5 KiB
Plaintext
/*
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* (C) Copyright 2022 Rockchip Electronics Co., Ltd
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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/ {
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aliases {
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mmc0 = &sdhci;
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mmc1 = &sdmmc0;
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};
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chosen {
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stdout-path = &uart2;
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u-boot,spl-boot-order = &sdmmc0, &sdhci, &spi_nand, &spi_nor;
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};
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secure-otp@ff920000 {
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compatible = "rockchip,rk3562-secure-otp";
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reg = <0x0 0xff920000 0x0 0x4000>;
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secure_conf = <0xff020034>;
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mask_addr = <0x0>;
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cru_rst_addr = <0xff130438>;
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u-boot,dm-spl;
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status = "okay";
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};
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};
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&sys_grf {
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u-boot,dm-spl;
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status = "okay";
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};
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&ioc_grf {
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u-boot,dm-spl;
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status = "okay";
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};
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&pmu_grf {
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u-boot,dm-spl;
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status = "okay";
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};
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&usbphy_grf {
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u-boot,dm-pre-reloc;
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status = "okay";
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};
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&firmware {
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u-boot,dm-spl;
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};
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&scmi {
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u-boot,dm-spl;
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};
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&scmi_clk {
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u-boot,dm-spl;
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};
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&scmi_shmem {
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u-boot,dm-spl;
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};
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&cru {
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u-boot,dm-spl;
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status = "okay";
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};
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&crypto {
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u-boot,dm-spl;
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status = "okay";
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};
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&rng {
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u-boot,dm-pre-reloc;
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status = "okay";
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};
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&uart2 {
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clock-frequency = <24000000>;
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u-boot,dm-spl;
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status = "okay";
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};
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&saradc0 {
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u-boot,dm-pre-reloc;
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status = "okay";
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};
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&psci {
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u-boot,dm-pre-reloc;
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status = "okay";
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};
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&sdhci {
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bus-width = <8>;
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u-boot,dm-spl;
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/delete-property/ pinctrl-names;
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/delete-property/ pinctrl-0;
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mmc-hs400-1_8v;
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mmc-hs400-enhanced-strobe;
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fixed-emmc-driver-type = <1>;
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status = "okay";
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};
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&sdmmc0 {
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u-boot,dm-spl;
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pinctrl-names = "default";
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pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_det &sdmmc0_bus4>;
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status = "okay";
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};
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&sdmmc0_pins {
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u-boot,dm-spl;
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};
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&sdmmc0_bus4 {
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u-boot,dm-spl;
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};
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&sdmmc0_clk {
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u-boot,dm-spl;
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};
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&sdmmc0_cmd {
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u-boot,dm-spl;
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};
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&sdmmc0_det {
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u-boot,dm-spl;
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};
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&sfc {
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u-boot,dm-spl;
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status = "okay";
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#address-cells = <1>;
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#size-cells = <0>;
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spi_nand: flash@0 {
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u-boot,dm-spl;
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compatible = "spi-nand";
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reg = <0>;
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spi-tx-bus-width = <1>;
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spi-rx-bus-width = <4>;
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spi-max-frequency = <80000000>;
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};
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spi_nor: flash@1 {
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u-boot,dm-spl;
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compatible = "jedec,spi-nor";
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label = "sfc_nor";
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reg = <0>;
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spi-tx-bus-width = <1>;
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spi-rx-bus-width = <4>;
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spi-max-frequency = <80000000>;
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};
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};
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&pinctrl {
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u-boot,dm-spl;
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status = "okay";
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};
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&gpio0 {
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u-boot,dm-pre-reloc;
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};
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&gpio1 {
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u-boot,dm-pre-reloc;
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};
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&gpio2 {
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u-boot,dm-pre-reloc;
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};
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&gpio3 {
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u-boot,dm-pre-reloc;
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};
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&gpio4 {
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u-boot,dm-pre-reloc;
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};
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&pcfg_pull_up_drv_level_2 {
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u-boot,dm-spl;
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status = "okay";
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};
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&pcfg_pull_up {
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u-boot,dm-spl;
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status = "okay";
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};
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&u2phy {
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u-boot,dm-pre-reloc;
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status = "okay";
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};
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&u2phy_otg {
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u-boot,dm-pre-reloc;
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status = "okay";
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};
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