128 lines
5.3 KiB
Plaintext
128 lines
5.3 KiB
Plaintext
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U-Boot for Wind River SBC834x Boards
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====================================
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The Wind River SBC834x board is a 6U form factor (not CPCI) reference
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design that uses the MPC8347E or MPC8349E processor. U-Boot support
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for this board is heavily based on the existing U-Boot support for
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Freescale MPC8349 reference boards.
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Support has been primarily tested on the SBC8349 version of the board,
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although earlier versions were also tested on the SBC8347. The primary
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difference in the two is the level of PCI functionality.
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http://www.windriver.com/products/OCD/SBC8347E_49E/
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Flash Details:
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==============
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The flash type is intel 28F640Jx (4096x16) [one device]. Base address
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is 0xFF80_0000 which is also where the Hardware Reset Configuration
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Word (HRCW) is stored. Caution should be used to not reset the
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board without having a valid HRCW in place (i.e. erased flash) as
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then a Wind River ICE will be required to restore the HRCW and flash
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image.
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Restoring a corrupted or missing flash image:
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=============================================
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Note that U-Boot versions up to and including 2009.06 had essentially
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two copies of U-Boot in flash; one at the very beginning, which set
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the HRCW, and one at the very end, which was the image that was run.
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As of this point in time, the two have been combined into just one
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at the beginning of flash, which provides both the HRCW, and the image
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that is executed. This frees up the remainder of flash for other uses.
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Use of the U-Boot command "fli" will indicate what parts are in use.
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Details for storing U-Boot to flash using a Wind River ICE can be found
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on page 19 of the board manual (request ERG-00328-001). The following
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is a summary of that information:
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- Connect ICE and establish connection to it from WorkBench/OCD.
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- Ensure you have background mode (BKM) in the OCD terminal window.
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- Select the appropriate flash type (listed above)
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- Prepare a U-Boot image by using the Wind River Convert utility;
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by using "Convert and Add file" on the ELF file from your build.
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Convert from FF80_0000 to FFFF_FFFF (or to FF83_FFFF if you are
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trying to preserve your old environment settings and user flash).
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- Set the start address of the erase/flash process to FF80_0000
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- Set the target RAM required to 64kB.
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- Select sectors for erasing (see note on environment below)
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- Select Erase and Reprogram.
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Note that some versions of the register files used with Workbench
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would zero some TSEC registers, which inhibits ethernet operation
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by U-Boot when this register file is played to the target. Using
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"INN" in the OCD terminal window instead of "IN" before the "GO"
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will not play the register file, and allow U-Boot to use the TSEC
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interface while executed from the ICE "GO" command.
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Alternatively, you can locate the register file which will be named
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WRS_SBC8349_PCT00328001.reg or similar) and "REM" out all the lines
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beginning with "SCGA TSEC1" and "SCGA TSEC2". This allows you to
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use all the remaining register file content.
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If you wish to preserve your prior U-Boot environment settings,
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then convert (and erase to) 0xFF83FFFF instead of 0xFFFFFFFF.
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The size for converting (and erasing) must be at least as large
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as u-boot.bin.
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Updating U-Boot with U-Boot:
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============================
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This procedure is very similar to other boards that have U-Boot installed.
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Assuming that the network has been configured, and that the new u-boot.bin
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has been copied to the TFTP server, the commands are:
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tftp 200000 u-boot.bin
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protect off all
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erase ff800000 ff83ffff
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cp.b 200000 ff800000 40000
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protect on all
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You may wish to do a "md ff800000 20" operation as a prefix and postfix
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to the above steps to inspect/compare the HRCW before/after as an extra
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safety check before resetting the board upon completion of the reflash.
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PCI:
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====
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There are three configuration choices:
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sbc8349_config
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sbc8349_PCI_33_config
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sbc8349_PCI_66_config
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The 1st does not enable CONFIG_PCI, and assumes that the PCI slot
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will be left empty (M66EN high), and so the board will operate with
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a base clock of 66MHz. Note that you need both PCI enabled in U-Boot
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and linux in order to have functional PCI under linux. The only
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reason for choosing to not enable PCI would be if you had a very
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early (rev 1.0) CPU with possible PCI issues.
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The second enables PCI support and builds for a 33MHz clock rate. Note
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that if a 33MHz 32bit card is inserted in the slot, then the whole board
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will clock down to a 33MHz base clock instead of the default 66MHz. This
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will change the baud clocks and mess up your serial console output if you
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were previously running at 66MHz. If you want to use a 33MHz PCI card,
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then you should build a U-Boot with sbc8349_PCI_33_config and store this
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to flash prior to powering down the board and inserting the 33MHz PCI
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card.
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The third option builds PCI support in, and leaves the clocking at the
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default 66MHz. This has been tested with an intel PCI-X e1000 card.
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This is also the appropriate choice for people with a recent (non 1.0)
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CPU who currently have the PCI slot physically empty, but intend to
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possibly add a PCI-X card at a later date.
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=> pci
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Scanning PCI devices on bus 0
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BusDevFun VendorId DeviceId Device Class Sub-Class
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_____________________________________________________________
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00.00.00 0x1957 0x0080 Processor 0x20
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00.11.00 0x8086 0x1026 Network controller 0x00
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=>
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