55 lines
		
	
	
		
			1.5 KiB
		
	
	
	
		
			C
		
	
	
	
			
		
		
	
	
			55 lines
		
	
	
		
			1.5 KiB
		
	
	
	
		
			C
		
	
	
	
| /* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
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| /*
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|  * Header providing constants for Rockchip suspend bindings.
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|  *
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|  * Copyright (C) 2022, Rockchip Electronics Co., Ltd
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|  * Author: XiaoDong.Huang
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|  */
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| 
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| #ifndef __DT_BINDINGS_RK3528_PM_H__
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| #define __DT_BINDINGS_RK3528_PM_H__
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| /******************************bits ops************************************/
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| 
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| #ifndef BIT
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| #define BIT(nr)				(1 << (nr))
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| #endif
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| 
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| #define RKPM_SLP_ARMPD			BIT(0)
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| #define RKPM_SLP_ARMOFF			BIT(1)
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| #define RKPM_SLP_ARMOFF_DDRPD		BIT(2)
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| #define RKPM_SLP_ARMOFF_LOGOFF		BIT(3)
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| 
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| /* all plls except ddr's pll*/
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| #define RKPM_SLP_PMU_HW_PLLS_PD		BIT(8)
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| #define RKPM_SLP_PMU_PMUALIVE_32K	BIT(9)
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| #define RKPM_SLP_PMU_DIS_OSC		BIT(10)
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| 
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| #define RKPM_SLP_CLK_GT			BIT(16)
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| #define RKPM_SLP_PMIC_LP		BIT(17)
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| 
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| #define RKPM_SLP_32K_EXT		BIT(24)
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| #define RKPM_SLP_TIME_OUT_WKUP		BIT(25)
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| #define RKPM_SLP_PMU_DBG		BIT(26)
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| 
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| /* the wake up source */
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| #define RKPM_CPU0_WKUP_EN		BIT(0)
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| #define RKPM_CPU1_WKUP_EN		BIT(1)
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| #define RKPM_CPU2_WKUP_EN		BIT(2)
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| #define RKPM_CPU3_WKUP_EN		BIT(3)
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| #define RKPM_GPIO_WKUP_EN		BIT(4)
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| #define RKPM_HDMI_HDP_WKUP_EN		BIT(5)
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| #define RKPM_HDMI_CEC_WKUP_EN		BIT(6)
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| #define RKPM_PWMIR_WKUP_EN		BIT(7)
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| #define RKPM_GMAC_WKUP_EN		BIT(8)
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| #define RKPM_TIMER_WKUP_EN		BIT(9)
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| #define RKPM_USBDEV_WKUP_EN		BIT(10)
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| #define RKPM_SYSINT_WKUP_EN		BIT(11)
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| #define RKPM_TIME_OUT_WKUP_EN		BIT(12)
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| 
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| /* the pwm regulator */
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| #define RKPM_PWM0_M0_REGULATOR_EN	BIT(0)
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| #define RKPM_PWM1_M0_REGULATOR_EN	BIT(1)
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| #define RKPM_PWM2_M0_REGULATOR_EN	BIT(2)
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| 
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| #endif
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