715 lines
22 KiB
Perl
715 lines
22 KiB
Perl
#! /usr/bin/env perl
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# Copyright 2010-2016 The OpenSSL Project Authors. All Rights Reserved.
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#
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# Licensed under the OpenSSL license (the "License"). You may not use
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# this file except in compliance with the License. You can obtain a copy
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# in the file LICENSE in the source distribution or at
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# https://www.openssl.org/source/license.html
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#
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# ====================================================================
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# Written by Andy Polyakov <appro@openssl.org> for the OpenSSL
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# project. The module is, however, dual licensed under OpenSSL and
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# CRYPTOGAMS licenses depending on where you obtain it. For further
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# details see http://www.openssl.org/~appro/cryptogams/.
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# ====================================================================
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#
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# March, May, June 2010
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#
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# The module implements "4-bit" GCM GHASH function and underlying
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# single multiplication operation in GF(2^128). "4-bit" means that it
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# uses 256 bytes per-key table [+64/128 bytes fixed table]. It has two
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# code paths: vanilla x86 and vanilla SSE. Former will be executed on
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# 486 and Pentium, latter on all others. SSE GHASH features so called
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# "528B" variant of "4-bit" method utilizing additional 256+16 bytes
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# of per-key storage [+512 bytes shared table]. Performance results
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# are for streamed GHASH subroutine and are expressed in cycles per
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# processed byte, less is better:
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#
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# gcc 2.95.3(*) SSE assembler x86 assembler
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#
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# Pentium 105/111(**) - 50
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# PIII 68 /75 12.2 24
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# P4 125/125 17.8 84(***)
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# Opteron 66 /70 10.1 30
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# Core2 54 /67 8.4 18
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# Atom 105/105 16.8 53
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# VIA Nano 69 /71 13.0 27
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#
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# (*) gcc 3.4.x was observed to generate few percent slower code,
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# which is one of reasons why 2.95.3 results were chosen,
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# another reason is lack of 3.4.x results for older CPUs;
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# comparison with SSE results is not completely fair, because C
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# results are for vanilla "256B" implementation, while
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# assembler results are for "528B";-)
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# (**) second number is result for code compiled with -fPIC flag,
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# which is actually more relevant, because assembler code is
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# position-independent;
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# (***) see comment in non-MMX routine for further details;
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#
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# To summarize, it's >2-5 times faster than gcc-generated code. To
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# anchor it to something else SHA1 assembler processes one byte in
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# ~7 cycles on contemporary x86 cores. As for choice of MMX/SSE
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# in particular, see comment at the end of the file...
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# May 2010
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#
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# Add PCLMULQDQ version performing at 2.10 cycles per processed byte.
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# The question is how close is it to theoretical limit? The pclmulqdq
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# instruction latency appears to be 14 cycles and there can't be more
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# than 2 of them executing at any given time. This means that single
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# Karatsuba multiplication would take 28 cycles *plus* few cycles for
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# pre- and post-processing. Then multiplication has to be followed by
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# modulo-reduction. Given that aggregated reduction method [see
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# "Carry-less Multiplication and Its Usage for Computing the GCM Mode"
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# white paper by Intel] allows you to perform reduction only once in
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# a while we can assume that asymptotic performance can be estimated
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# as (28+Tmod/Naggr)/16, where Tmod is time to perform reduction
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# and Naggr is the aggregation factor.
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#
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# Before we proceed to this implementation let's have closer look at
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# the best-performing code suggested by Intel in their white paper.
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# By tracing inter-register dependencies Tmod is estimated as ~19
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# cycles and Naggr chosen by Intel is 4, resulting in 2.05 cycles per
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# processed byte. As implied, this is quite optimistic estimate,
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# because it does not account for Karatsuba pre- and post-processing,
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# which for a single multiplication is ~5 cycles. Unfortunately Intel
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# does not provide performance data for GHASH alone. But benchmarking
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# AES_GCM_encrypt ripped out of Fig. 15 of the white paper with aadt
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# alone resulted in 2.46 cycles per byte of out 16KB buffer. Note that
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# the result accounts even for pre-computing of degrees of the hash
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# key H, but its portion is negligible at 16KB buffer size.
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#
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# Moving on to the implementation in question. Tmod is estimated as
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# ~13 cycles and Naggr is 2, giving asymptotic performance of ...
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# 2.16. How is it possible that measured performance is better than
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# optimistic theoretical estimate? There is one thing Intel failed
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# to recognize. By serializing GHASH with CTR in same subroutine
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# former's performance is really limited to above (Tmul + Tmod/Naggr)
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# equation. But if GHASH procedure is detached, the modulo-reduction
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# can be interleaved with Naggr-1 multiplications at instruction level
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# and under ideal conditions even disappear from the equation. So that
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# optimistic theoretical estimate for this implementation is ...
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# 28/16=1.75, and not 2.16. Well, it's probably way too optimistic,
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# at least for such small Naggr. I'd argue that (28+Tproc/Naggr),
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# where Tproc is time required for Karatsuba pre- and post-processing,
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# is more realistic estimate. In this case it gives ... 1.91 cycles.
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# Or in other words, depending on how well we can interleave reduction
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# and one of the two multiplications the performance should be between
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# 1.91 and 2.16. As already mentioned, this implementation processes
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# one byte out of 8KB buffer in 2.10 cycles, while x86_64 counterpart
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# - in 2.02. x86_64 performance is better, because larger register
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# bank allows to interleave reduction and multiplication better.
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#
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# Does it make sense to increase Naggr? To start with it's virtually
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# impossible in 32-bit mode, because of limited register bank
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# capacity. Otherwise improvement has to be weighed against slower
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# setup, as well as code size and complexity increase. As even
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# optimistic estimate doesn't promise 30% performance improvement,
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# there are currently no plans to increase Naggr.
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#
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# Special thanks to David Woodhouse for providing access to a
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# Westmere-based system on behalf of Intel Open Source Technology Centre.
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# January 2010
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#
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# Tweaked to optimize transitions between integer and FP operations
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# on same XMM register, PCLMULQDQ subroutine was measured to process
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# one byte in 2.07 cycles on Sandy Bridge, and in 2.12 - on Westmere.
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# The minor regression on Westmere is outweighed by ~15% improvement
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# on Sandy Bridge. Strangely enough attempt to modify 64-bit code in
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# similar manner resulted in almost 20% degradation on Sandy Bridge,
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# where original 64-bit code processes one byte in 1.95 cycles.
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#####################################################################
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# For reference, AMD Bulldozer processes one byte in 1.98 cycles in
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# 32-bit mode and 1.89 in 64-bit.
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# February 2013
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#
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# Overhaul: aggregate Karatsuba post-processing, improve ILP in
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# reduction_alg9. Resulting performance is 1.96 cycles per byte on
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# Westmere, 1.95 - on Sandy/Ivy Bridge, 1.76 - on Bulldozer.
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$0 =~ m/(.*[\/\\])[^\/\\]+$/; $dir=$1;
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push(@INC,"${dir}","${dir}../../../perlasm");
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require "x86asm.pl";
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$output=pop;
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open STDOUT,">$output";
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&asm_init($ARGV[0],$x86only = $ARGV[$#ARGV] eq "386");
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$sse2=1;
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if ($sse2) {{
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######################################################################
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# PCLMULQDQ version.
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$Xip="eax";
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$Htbl="edx";
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$const="ecx";
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$inp="esi";
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$len="ebx";
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($Xi,$Xhi)=("xmm0","xmm1"); $Hkey="xmm2";
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($T1,$T2,$T3)=("xmm3","xmm4","xmm5");
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($Xn,$Xhn)=("xmm6","xmm7");
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&static_label("bswap");
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sub clmul64x64_T2 { # minimal "register" pressure
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my ($Xhi,$Xi,$Hkey,$HK)=@_;
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&movdqa ($Xhi,$Xi); #
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&pshufd ($T1,$Xi,0b01001110);
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&pshufd ($T2,$Hkey,0b01001110) if (!defined($HK));
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&pxor ($T1,$Xi); #
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&pxor ($T2,$Hkey) if (!defined($HK));
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$HK=$T2 if (!defined($HK));
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&pclmulqdq ($Xi,$Hkey,0x00); #######
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&pclmulqdq ($Xhi,$Hkey,0x11); #######
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&pclmulqdq ($T1,$HK,0x00); #######
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&xorps ($T1,$Xi); #
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&xorps ($T1,$Xhi); #
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&movdqa ($T2,$T1); #
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&psrldq ($T1,8);
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&pslldq ($T2,8); #
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&pxor ($Xhi,$T1);
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&pxor ($Xi,$T2); #
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}
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sub clmul64x64_T3 {
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# Even though this subroutine offers visually better ILP, it
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# was empirically found to be a tad slower than above version.
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# At least in GFp_gcm_ghash_clmul context. But it's just as well,
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# because loop modulo-scheduling is possible only thanks to
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# minimized "register" pressure...
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my ($Xhi,$Xi,$Hkey)=@_;
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&movdqa ($T1,$Xi); #
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&movdqa ($Xhi,$Xi);
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&pclmulqdq ($Xi,$Hkey,0x00); #######
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&pclmulqdq ($Xhi,$Hkey,0x11); #######
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&pshufd ($T2,$T1,0b01001110); #
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&pshufd ($T3,$Hkey,0b01001110);
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&pxor ($T2,$T1); #
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&pxor ($T3,$Hkey);
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&pclmulqdq ($T2,$T3,0x00); #######
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&pxor ($T2,$Xi); #
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&pxor ($T2,$Xhi); #
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&movdqa ($T3,$T2); #
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&psrldq ($T2,8);
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&pslldq ($T3,8); #
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&pxor ($Xhi,$T2);
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&pxor ($Xi,$T3); #
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}
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if (1) { # Algorithm 9 with <<1 twist.
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# Reduction is shorter and uses only two
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# temporary registers, which makes it better
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# candidate for interleaving with 64x64
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# multiplication. Pre-modulo-scheduled loop
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# was found to be ~20% faster than Algorithm 5
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# below. Algorithm 9 was therefore chosen for
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# further optimization...
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sub reduction_alg9 { # 17/11 times faster than Intel version
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my ($Xhi,$Xi) = @_;
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# 1st phase
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&movdqa ($T2,$Xi); #
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&movdqa ($T1,$Xi);
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&psllq ($Xi,5);
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&pxor ($T1,$Xi); #
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&psllq ($Xi,1);
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&pxor ($Xi,$T1); #
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&psllq ($Xi,57); #
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&movdqa ($T1,$Xi); #
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&pslldq ($Xi,8);
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&psrldq ($T1,8); #
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&pxor ($Xi,$T2);
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&pxor ($Xhi,$T1); #
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# 2nd phase
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&movdqa ($T2,$Xi);
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&psrlq ($Xi,1);
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&pxor ($Xhi,$T2); #
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&pxor ($T2,$Xi);
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&psrlq ($Xi,5);
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&pxor ($Xi,$T2); #
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&psrlq ($Xi,1); #
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&pxor ($Xi,$Xhi) #
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}
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&function_begin_B("GFp_gcm_init_clmul");
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&mov ($Htbl,&wparam(0));
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&mov ($Xip,&wparam(1));
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&call (&label("pic"));
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&set_label("pic");
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&blindpop ($const);
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&lea ($const,&DWP(&label("bswap")."-".&label("pic"),$const));
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&movdqu ($Hkey,&QWP(0,$Xip));
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&pshufd ($Hkey,$Hkey,0b01001110);# dword swap
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# <<1 twist
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&pshufd ($T2,$Hkey,0b11111111); # broadcast uppermost dword
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&movdqa ($T1,$Hkey);
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&psllq ($Hkey,1);
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&pxor ($T3,$T3); #
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&psrlq ($T1,63);
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&pcmpgtd ($T3,$T2); # broadcast carry bit
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&pslldq ($T1,8);
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&por ($Hkey,$T1); # H<<=1
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# magic reduction
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&pand ($T3,&QWP(16,$const)); # 0x1c2_polynomial
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&pxor ($Hkey,$T3); # if(carry) H^=0x1c2_polynomial
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# calculate H^2
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&movdqa ($Xi,$Hkey);
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&clmul64x64_T2 ($Xhi,$Xi,$Hkey);
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&reduction_alg9 ($Xhi,$Xi);
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&pshufd ($T1,$Hkey,0b01001110);
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&pshufd ($T2,$Xi,0b01001110);
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&pxor ($T1,$Hkey); # Karatsuba pre-processing
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&movdqu (&QWP(0,$Htbl),$Hkey); # save H
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&pxor ($T2,$Xi); # Karatsuba pre-processing
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&movdqu (&QWP(16,$Htbl),$Xi); # save H^2
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&palignr ($T2,$T1,8); # low part is H.lo^H.hi
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&movdqu (&QWP(32,$Htbl),$T2); # save Karatsuba "salt"
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&ret ();
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&function_end_B("GFp_gcm_init_clmul");
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&function_begin_B("GFp_gcm_gmult_clmul");
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&mov ($Xip,&wparam(0));
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&mov ($Htbl,&wparam(1));
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&call (&label("pic"));
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&set_label("pic");
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&blindpop ($const);
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&lea ($const,&DWP(&label("bswap")."-".&label("pic"),$const));
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&movdqu ($Xi,&QWP(0,$Xip));
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&movdqa ($T3,&QWP(0,$const));
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&movups ($Hkey,&QWP(0,$Htbl));
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&pshufb ($Xi,$T3);
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&movups ($T2,&QWP(32,$Htbl));
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&clmul64x64_T2 ($Xhi,$Xi,$Hkey,$T2);
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&reduction_alg9 ($Xhi,$Xi);
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&pshufb ($Xi,$T3);
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&movdqu (&QWP(0,$Xip),$Xi);
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&ret ();
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&function_end_B("GFp_gcm_gmult_clmul");
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&function_begin("GFp_gcm_ghash_clmul");
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&mov ($Xip,&wparam(0));
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&mov ($Htbl,&wparam(1));
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&mov ($inp,&wparam(2));
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&mov ($len,&wparam(3));
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&call (&label("pic"));
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&set_label("pic");
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&blindpop ($const);
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&lea ($const,&DWP(&label("bswap")."-".&label("pic"),$const));
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&movdqu ($Xi,&QWP(0,$Xip));
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&movdqa ($T3,&QWP(0,$const));
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&movdqu ($Hkey,&QWP(0,$Htbl));
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&pshufb ($Xi,$T3);
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&sub ($len,0x10);
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&jz (&label("odd_tail"));
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#######
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# Xi+2 =[H*(Ii+1 + Xi+1)] mod P =
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# [(H*Ii+1) + (H*Xi+1)] mod P =
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# [(H*Ii+1) + H^2*(Ii+Xi)] mod P
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#
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&movdqu ($T1,&QWP(0,$inp)); # Ii
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&movdqu ($Xn,&QWP(16,$inp)); # Ii+1
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&pshufb ($T1,$T3);
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&pshufb ($Xn,$T3);
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&movdqu ($T3,&QWP(32,$Htbl));
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&pxor ($Xi,$T1); # Ii+Xi
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&pshufd ($T1,$Xn,0b01001110); # H*Ii+1
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&movdqa ($Xhn,$Xn);
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&pxor ($T1,$Xn); #
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&lea ($inp,&DWP(32,$inp)); # i+=2
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&pclmulqdq ($Xn,$Hkey,0x00); #######
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&pclmulqdq ($Xhn,$Hkey,0x11); #######
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&pclmulqdq ($T1,$T3,0x00); #######
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&movups ($Hkey,&QWP(16,$Htbl)); # load H^2
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&nop ();
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&sub ($len,0x20);
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&jbe (&label("even_tail"));
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&jmp (&label("mod_loop"));
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&set_label("mod_loop",32);
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&pshufd ($T2,$Xi,0b01001110); # H^2*(Ii+Xi)
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&movdqa ($Xhi,$Xi);
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&pxor ($T2,$Xi); #
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&nop ();
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&pclmulqdq ($Xi,$Hkey,0x00); #######
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&pclmulqdq ($Xhi,$Hkey,0x11); #######
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&pclmulqdq ($T2,$T3,0x10); #######
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&movups ($Hkey,&QWP(0,$Htbl)); # load H
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&xorps ($Xi,$Xn); # (H*Ii+1) + H^2*(Ii+Xi)
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&movdqa ($T3,&QWP(0,$const));
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&xorps ($Xhi,$Xhn);
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&movdqu ($Xhn,&QWP(0,$inp)); # Ii
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&pxor ($T1,$Xi); # aggregated Karatsuba post-processing
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&movdqu ($Xn,&QWP(16,$inp)); # Ii+1
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&pxor ($T1,$Xhi); #
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&pshufb ($Xhn,$T3);
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&pxor ($T2,$T1); #
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&movdqa ($T1,$T2); #
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&psrldq ($T2,8);
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&pslldq ($T1,8); #
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&pxor ($Xhi,$T2);
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&pxor ($Xi,$T1); #
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&pshufb ($Xn,$T3);
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&pxor ($Xhi,$Xhn); # "Ii+Xi", consume early
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&movdqa ($Xhn,$Xn); #&clmul64x64_TX ($Xhn,$Xn,$Hkey); H*Ii+1
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&movdqa ($T2,$Xi); #&reduction_alg9($Xhi,$Xi); 1st phase
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&movdqa ($T1,$Xi);
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&psllq ($Xi,5);
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&pxor ($T1,$Xi); #
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&psllq ($Xi,1);
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&pxor ($Xi,$T1); #
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&pclmulqdq ($Xn,$Hkey,0x00); #######
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&movups ($T3,&QWP(32,$Htbl));
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&psllq ($Xi,57); #
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&movdqa ($T1,$Xi); #
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&pslldq ($Xi,8);
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&psrldq ($T1,8); #
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&pxor ($Xi,$T2);
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&pxor ($Xhi,$T1); #
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&pshufd ($T1,$Xhn,0b01001110);
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&movdqa ($T2,$Xi); # 2nd phase
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&psrlq ($Xi,1);
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&pxor ($T1,$Xhn);
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&pxor ($Xhi,$T2); #
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&pclmulqdq ($Xhn,$Hkey,0x11); #######
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&movups ($Hkey,&QWP(16,$Htbl)); # load H^2
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&pxor ($T2,$Xi);
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&psrlq ($Xi,5);
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&pxor ($Xi,$T2); #
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&psrlq ($Xi,1); #
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&pxor ($Xi,$Xhi) #
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&pclmulqdq ($T1,$T3,0x00); #######
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&lea ($inp,&DWP(32,$inp));
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&sub ($len,0x20);
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&ja (&label("mod_loop"));
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&set_label("even_tail");
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&pshufd ($T2,$Xi,0b01001110); # H^2*(Ii+Xi)
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&movdqa ($Xhi,$Xi);
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&pxor ($T2,$Xi); #
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&pclmulqdq ($Xi,$Hkey,0x00); #######
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&pclmulqdq ($Xhi,$Hkey,0x11); #######
|
||
&pclmulqdq ($T2,$T3,0x10); #######
|
||
&movdqa ($T3,&QWP(0,$const));
|
||
|
||
&xorps ($Xi,$Xn); # (H*Ii+1) + H^2*(Ii+Xi)
|
||
&xorps ($Xhi,$Xhn);
|
||
&pxor ($T1,$Xi); # aggregated Karatsuba post-processing
|
||
&pxor ($T1,$Xhi); #
|
||
|
||
&pxor ($T2,$T1); #
|
||
|
||
&movdqa ($T1,$T2); #
|
||
&psrldq ($T2,8);
|
||
&pslldq ($T1,8); #
|
||
&pxor ($Xhi,$T2);
|
||
&pxor ($Xi,$T1); #
|
||
|
||
&reduction_alg9 ($Xhi,$Xi);
|
||
|
||
&test ($len,$len);
|
||
&jnz (&label("done"));
|
||
|
||
&movups ($Hkey,&QWP(0,$Htbl)); # load H
|
||
&set_label("odd_tail");
|
||
&movdqu ($T1,&QWP(0,$inp)); # Ii
|
||
&pshufb ($T1,$T3);
|
||
&pxor ($Xi,$T1); # Ii+Xi
|
||
|
||
&clmul64x64_T2 ($Xhi,$Xi,$Hkey); # H*(Ii+Xi)
|
||
&reduction_alg9 ($Xhi,$Xi);
|
||
|
||
&set_label("done");
|
||
&pshufb ($Xi,$T3);
|
||
&movdqu (&QWP(0,$Xip),$Xi);
|
||
&function_end("GFp_gcm_ghash_clmul");
|
||
|
||
} else { # Algorithm 5. Kept for reference purposes.
|
||
|
||
sub reduction_alg5 { # 19/16 times faster than Intel version
|
||
my ($Xhi,$Xi)=@_;
|
||
|
||
# <<1
|
||
&movdqa ($T1,$Xi); #
|
||
&movdqa ($T2,$Xhi);
|
||
&pslld ($Xi,1);
|
||
&pslld ($Xhi,1); #
|
||
&psrld ($T1,31);
|
||
&psrld ($T2,31); #
|
||
&movdqa ($T3,$T1);
|
||
&pslldq ($T1,4);
|
||
&psrldq ($T3,12); #
|
||
&pslldq ($T2,4);
|
||
&por ($Xhi,$T3); #
|
||
&por ($Xi,$T1);
|
||
&por ($Xhi,$T2); #
|
||
|
||
# 1st phase
|
||
&movdqa ($T1,$Xi);
|
||
&movdqa ($T2,$Xi);
|
||
&movdqa ($T3,$Xi); #
|
||
&pslld ($T1,31);
|
||
&pslld ($T2,30);
|
||
&pslld ($Xi,25); #
|
||
&pxor ($T1,$T2);
|
||
&pxor ($T1,$Xi); #
|
||
&movdqa ($T2,$T1); #
|
||
&pslldq ($T1,12);
|
||
&psrldq ($T2,4); #
|
||
&pxor ($T3,$T1);
|
||
|
||
# 2nd phase
|
||
&pxor ($Xhi,$T3); #
|
||
&movdqa ($Xi,$T3);
|
||
&movdqa ($T1,$T3);
|
||
&psrld ($Xi,1); #
|
||
&psrld ($T1,2);
|
||
&psrld ($T3,7); #
|
||
&pxor ($Xi,$T1);
|
||
&pxor ($Xhi,$T2);
|
||
&pxor ($Xi,$T3); #
|
||
&pxor ($Xi,$Xhi); #
|
||
}
|
||
|
||
&function_begin_B("GFp_gcm_init_clmul");
|
||
&mov ($Htbl,&wparam(0));
|
||
&mov ($Xip,&wparam(1));
|
||
|
||
&call (&label("pic"));
|
||
&set_label("pic");
|
||
&blindpop ($const);
|
||
&lea ($const,&DWP(&label("bswap")."-".&label("pic"),$const));
|
||
|
||
&movdqu ($Hkey,&QWP(0,$Xip));
|
||
&pshufd ($Hkey,$Hkey,0b01001110);# dword swap
|
||
|
||
# calculate H^2
|
||
&movdqa ($Xi,$Hkey);
|
||
&clmul64x64_T3 ($Xhi,$Xi,$Hkey);
|
||
&reduction_alg5 ($Xhi,$Xi);
|
||
|
||
&movdqu (&QWP(0,$Htbl),$Hkey); # save H
|
||
&movdqu (&QWP(16,$Htbl),$Xi); # save H^2
|
||
|
||
&ret ();
|
||
&function_end_B("GFp_gcm_init_clmul");
|
||
|
||
&function_begin_B("GFp_gcm_gmult_clmul");
|
||
&mov ($Xip,&wparam(0));
|
||
&mov ($Htbl,&wparam(1));
|
||
|
||
&call (&label("pic"));
|
||
&set_label("pic");
|
||
&blindpop ($const);
|
||
&lea ($const,&DWP(&label("bswap")."-".&label("pic"),$const));
|
||
|
||
&movdqu ($Xi,&QWP(0,$Xip));
|
||
&movdqa ($Xn,&QWP(0,$const));
|
||
&movdqu ($Hkey,&QWP(0,$Htbl));
|
||
&pshufb ($Xi,$Xn);
|
||
|
||
&clmul64x64_T3 ($Xhi,$Xi,$Hkey);
|
||
&reduction_alg5 ($Xhi,$Xi);
|
||
|
||
&pshufb ($Xi,$Xn);
|
||
&movdqu (&QWP(0,$Xip),$Xi);
|
||
|
||
&ret ();
|
||
&function_end_B("GFp_gcm_gmult_clmul");
|
||
|
||
&function_begin("GFp_gcm_ghash_clmul");
|
||
&mov ($Xip,&wparam(0));
|
||
&mov ($Htbl,&wparam(1));
|
||
&mov ($inp,&wparam(2));
|
||
&mov ($len,&wparam(3));
|
||
|
||
&call (&label("pic"));
|
||
&set_label("pic");
|
||
&blindpop ($const);
|
||
&lea ($const,&DWP(&label("bswap")."-".&label("pic"),$const));
|
||
|
||
&movdqu ($Xi,&QWP(0,$Xip));
|
||
&movdqa ($T3,&QWP(0,$const));
|
||
&movdqu ($Hkey,&QWP(0,$Htbl));
|
||
&pshufb ($Xi,$T3);
|
||
|
||
&sub ($len,0x10);
|
||
&jz (&label("odd_tail"));
|
||
|
||
#######
|
||
# Xi+2 =[H*(Ii+1 + Xi+1)] mod P =
|
||
# [(H*Ii+1) + (H*Xi+1)] mod P =
|
||
# [(H*Ii+1) + H^2*(Ii+Xi)] mod P
|
||
#
|
||
&movdqu ($T1,&QWP(0,$inp)); # Ii
|
||
&movdqu ($Xn,&QWP(16,$inp)); # Ii+1
|
||
&pshufb ($T1,$T3);
|
||
&pshufb ($Xn,$T3);
|
||
&pxor ($Xi,$T1); # Ii+Xi
|
||
|
||
&clmul64x64_T3 ($Xhn,$Xn,$Hkey); # H*Ii+1
|
||
&movdqu ($Hkey,&QWP(16,$Htbl)); # load H^2
|
||
|
||
&sub ($len,0x20);
|
||
&lea ($inp,&DWP(32,$inp)); # i+=2
|
||
&jbe (&label("even_tail"));
|
||
|
||
&set_label("mod_loop");
|
||
&clmul64x64_T3 ($Xhi,$Xi,$Hkey); # H^2*(Ii+Xi)
|
||
&movdqu ($Hkey,&QWP(0,$Htbl)); # load H
|
||
|
||
&pxor ($Xi,$Xn); # (H*Ii+1) + H^2*(Ii+Xi)
|
||
&pxor ($Xhi,$Xhn);
|
||
|
||
&reduction_alg5 ($Xhi,$Xi);
|
||
|
||
#######
|
||
&movdqa ($T3,&QWP(0,$const));
|
||
&movdqu ($T1,&QWP(0,$inp)); # Ii
|
||
&movdqu ($Xn,&QWP(16,$inp)); # Ii+1
|
||
&pshufb ($T1,$T3);
|
||
&pshufb ($Xn,$T3);
|
||
&pxor ($Xi,$T1); # Ii+Xi
|
||
|
||
&clmul64x64_T3 ($Xhn,$Xn,$Hkey); # H*Ii+1
|
||
&movdqu ($Hkey,&QWP(16,$Htbl)); # load H^2
|
||
|
||
&sub ($len,0x20);
|
||
&lea ($inp,&DWP(32,$inp));
|
||
&ja (&label("mod_loop"));
|
||
|
||
&set_label("even_tail");
|
||
&clmul64x64_T3 ($Xhi,$Xi,$Hkey); # H^2*(Ii+Xi)
|
||
|
||
&pxor ($Xi,$Xn); # (H*Ii+1) + H^2*(Ii+Xi)
|
||
&pxor ($Xhi,$Xhn);
|
||
|
||
&reduction_alg5 ($Xhi,$Xi);
|
||
|
||
&movdqa ($T3,&QWP(0,$const));
|
||
&test ($len,$len);
|
||
&jnz (&label("done"));
|
||
|
||
&movdqu ($Hkey,&QWP(0,$Htbl)); # load H
|
||
&set_label("odd_tail");
|
||
&movdqu ($T1,&QWP(0,$inp)); # Ii
|
||
&pshufb ($T1,$T3);
|
||
&pxor ($Xi,$T1); # Ii+Xi
|
||
|
||
&clmul64x64_T3 ($Xhi,$Xi,$Hkey); # H*(Ii+Xi)
|
||
&reduction_alg5 ($Xhi,$Xi);
|
||
|
||
&movdqa ($T3,&QWP(0,$const));
|
||
&set_label("done");
|
||
&pshufb ($Xi,$T3);
|
||
&movdqu (&QWP(0,$Xip),$Xi);
|
||
&function_end("GFp_gcm_ghash_clmul");
|
||
|
||
}
|
||
|
||
&set_label("bswap",64);
|
||
&data_byte(15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0);
|
||
&data_byte(1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0xc2); # 0x1c2_polynomial
|
||
&set_label("rem_8bit",64);
|
||
&data_short(0x0000,0x01C2,0x0384,0x0246,0x0708,0x06CA,0x048C,0x054E);
|
||
&data_short(0x0E10,0x0FD2,0x0D94,0x0C56,0x0918,0x08DA,0x0A9C,0x0B5E);
|
||
&data_short(0x1C20,0x1DE2,0x1FA4,0x1E66,0x1B28,0x1AEA,0x18AC,0x196E);
|
||
&data_short(0x1230,0x13F2,0x11B4,0x1076,0x1538,0x14FA,0x16BC,0x177E);
|
||
&data_short(0x3840,0x3982,0x3BC4,0x3A06,0x3F48,0x3E8A,0x3CCC,0x3D0E);
|
||
&data_short(0x3650,0x3792,0x35D4,0x3416,0x3158,0x309A,0x32DC,0x331E);
|
||
&data_short(0x2460,0x25A2,0x27E4,0x2626,0x2368,0x22AA,0x20EC,0x212E);
|
||
&data_short(0x2A70,0x2BB2,0x29F4,0x2836,0x2D78,0x2CBA,0x2EFC,0x2F3E);
|
||
&data_short(0x7080,0x7142,0x7304,0x72C6,0x7788,0x764A,0x740C,0x75CE);
|
||
&data_short(0x7E90,0x7F52,0x7D14,0x7CD6,0x7998,0x785A,0x7A1C,0x7BDE);
|
||
&data_short(0x6CA0,0x6D62,0x6F24,0x6EE6,0x6BA8,0x6A6A,0x682C,0x69EE);
|
||
&data_short(0x62B0,0x6372,0x6134,0x60F6,0x65B8,0x647A,0x663C,0x67FE);
|
||
&data_short(0x48C0,0x4902,0x4B44,0x4A86,0x4FC8,0x4E0A,0x4C4C,0x4D8E);
|
||
&data_short(0x46D0,0x4712,0x4554,0x4496,0x41D8,0x401A,0x425C,0x439E);
|
||
&data_short(0x54E0,0x5522,0x5764,0x56A6,0x53E8,0x522A,0x506C,0x51AE);
|
||
&data_short(0x5AF0,0x5B32,0x5974,0x58B6,0x5DF8,0x5C3A,0x5E7C,0x5FBE);
|
||
&data_short(0xE100,0xE0C2,0xE284,0xE346,0xE608,0xE7CA,0xE58C,0xE44E);
|
||
&data_short(0xEF10,0xEED2,0xEC94,0xED56,0xE818,0xE9DA,0xEB9C,0xEA5E);
|
||
&data_short(0xFD20,0xFCE2,0xFEA4,0xFF66,0xFA28,0xFBEA,0xF9AC,0xF86E);
|
||
&data_short(0xF330,0xF2F2,0xF0B4,0xF176,0xF438,0xF5FA,0xF7BC,0xF67E);
|
||
&data_short(0xD940,0xD882,0xDAC4,0xDB06,0xDE48,0xDF8A,0xDDCC,0xDC0E);
|
||
&data_short(0xD750,0xD692,0xD4D4,0xD516,0xD058,0xD19A,0xD3DC,0xD21E);
|
||
&data_short(0xC560,0xC4A2,0xC6E4,0xC726,0xC268,0xC3AA,0xC1EC,0xC02E);
|
||
&data_short(0xCB70,0xCAB2,0xC8F4,0xC936,0xCC78,0xCDBA,0xCFFC,0xCE3E);
|
||
&data_short(0x9180,0x9042,0x9204,0x93C6,0x9688,0x974A,0x950C,0x94CE);
|
||
&data_short(0x9F90,0x9E52,0x9C14,0x9DD6,0x9898,0x995A,0x9B1C,0x9ADE);
|
||
&data_short(0x8DA0,0x8C62,0x8E24,0x8FE6,0x8AA8,0x8B6A,0x892C,0x88EE);
|
||
&data_short(0x83B0,0x8272,0x8034,0x81F6,0x84B8,0x857A,0x873C,0x86FE);
|
||
&data_short(0xA9C0,0xA802,0xAA44,0xAB86,0xAEC8,0xAF0A,0xAD4C,0xAC8E);
|
||
&data_short(0xA7D0,0xA612,0xA454,0xA596,0xA0D8,0xA11A,0xA35C,0xA29E);
|
||
&data_short(0xB5E0,0xB422,0xB664,0xB7A6,0xB2E8,0xB32A,0xB16C,0xB0AE);
|
||
&data_short(0xBBF0,0xBA32,0xB874,0xB9B6,0xBCF8,0xBD3A,0xBF7C,0xBEBE);
|
||
}} # $sse2
|
||
|
||
&asciz("GHASH for x86, CRYPTOGAMS by <appro\@openssl.org>");
|
||
&asm_finish();
|
||
|
||
close STDOUT or die "error closing STDOUT";
|
||
|
||
# A question was risen about choice of vanilla MMX. Or rather why wasn't
|
||
# SSE2 chosen instead? In addition to the fact that MMX runs on legacy
|
||
# CPUs such as PIII, "4-bit" MMX version was observed to provide better
|
||
# performance than *corresponding* SSE2 one even on contemporary CPUs.
|
||
# SSE2 results were provided by Peter-Michael Hager. He maintains SSE2
|
||
# implementation featuring full range of lookup-table sizes, but with
|
||
# per-invocation lookup table setup. Latter means that table size is
|
||
# chosen depending on how much data is to be hashed in every given call,
|
||
# more data - larger table. Best reported result for Core2 is ~4 cycles
|
||
# per processed byte out of 64KB block. This number accounts even for
|
||
# 64KB table setup overhead. As discussed in gcm128.c we choose to be
|
||
# more conservative in respect to lookup table sizes, but how do the
|
||
# results compare? Minimalistic "256B" MMX version delivers ~11 cycles
|
||
# on same platform. As also discussed in gcm128.c, next in line "8-bit
|
||
# Shoup's" or "4KB" method should deliver twice the performance of
|
||
# "256B" one, in other words not worse than ~6 cycles per byte. It
|
||
# should be also be noted that in SSE2 case improvement can be "super-
|
||
# linear," i.e. more than twice, mostly because >>8 maps to single
|
||
# instruction on SSE2 register. This is unlike "4-bit" case when >>4
|
||
# maps to same amount of instructions in both MMX and SSE2 cases.
|
||
# Bottom line is that switch to SSE2 is considered to be justifiable
|
||
# only in case we choose to implement "8-bit" method...
|