284 lines
13 KiB
C++
284 lines
13 KiB
C++
/*
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* Copyright (c) 2017-2020 Arm Limited.
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*
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* SPDX-License-Identifier: MIT
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to
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* deal in the Software without restriction, including without limitation the
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* rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
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* sell copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in all
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* copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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#include "arm_compute/core/TensorShape.h"
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#include "arm_compute/core/Types.h"
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#include "arm_compute/core/utils/misc/ShapeCalculator.h"
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#include "tests/AssetsLibrary.h"
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#include "tests/Globals.h"
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#include "tests/IAccessor.h"
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#include "tests/framework/Asserts.h"
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#include "tests/framework/Fixture.h"
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#include "tests/validation/Helpers.h"
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#include "tests/validation/reference/DeconvolutionLayer.h"
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#include <random>
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namespace arm_compute
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{
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namespace test
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{
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namespace validation
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{
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using namespace arm_compute::misc::shape_calculator;
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template <typename TensorType, typename AccessorType, typename FunctionType, typename T>
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class DeconvolutionLayerFixtureBase : public framework::Fixture
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{
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public:
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using TBias = typename std::conditional < std::is_same<typename std::decay<T>::type, uint8_t>::value || std::is_same<typename std::decay<T>::type, int8_t>::value, int32_t, T >::type;
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public:
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template <typename...>
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void setup(TensorShape input_shape, TensorShape weights_shape, TensorShape bias_shape, TensorShape output_shape, PadStrideInfo info,
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DataType data_type, DataLayout data_layout, QuantizationInfo input_quantization_info, QuantizationInfo output_quantization_info, bool add_bias)
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{
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_data_type = data_type;
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_bias_data_type = is_data_type_quantized_asymmetric(data_type) ? DataType::S32 : data_type;
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_data_layout = data_layout;
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_input_quantization_info = input_quantization_info;
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_output_quantization_info = output_quantization_info;
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_target = compute_target(input_shape, weights_shape, bias_shape, output_shape, info, add_bias);
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_reference = compute_reference(input_shape, weights_shape, bias_shape, output_shape, info, add_bias);
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}
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protected:
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template <typename U>
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void fill(U &&tensor, int i)
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{
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switch(tensor.data_type())
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{
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case DataType::QASYMM8:
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{
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std::pair<int, int> bounds = get_quantized_bounds(tensor.quantization_info(), -1.0f, 1.0f);
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std::uniform_int_distribution<uint8_t> distribution(bounds.first, bounds.second);
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library->fill(tensor, distribution, i);
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break;
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}
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case DataType::QASYMM8_SIGNED:
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{
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std::pair<int, int> bounds = get_quantized_qasymm8_signed_bounds(tensor.quantization_info(), -1.0f, 1.0f);
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std::uniform_int_distribution<int8_t> distribution(bounds.first, bounds.second);
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library->fill(tensor, distribution, i);
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break;
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}
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case DataType::S32:
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{
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std::uniform_int_distribution<int32_t> distribution(-100, 100);
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library->fill(tensor, distribution, i);
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break;
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}
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case DataType::F16:
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case DataType::F32:
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{
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std::uniform_real_distribution<> distribution(-1.0f, 1.0f);
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library->fill(tensor, distribution, i);
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break;
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}
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default:
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library->fill_tensor_uniform(tensor, i);
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}
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}
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template <typename U>
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void fill_zeros(U &&tensor)
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{
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switch(tensor.data_type())
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{
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case DataType::S32:
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{
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const int32_t value = static_cast<int32_t>(tensor.quantization_info().uniform().offset);
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library->fill_tensor_value(tensor, value);
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break;
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}
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case DataType::F16:
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library->fill_tensor_value(tensor, static_cast<half>(0.0f));
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break;
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case DataType::F32:
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library->fill_tensor_value(tensor, static_cast<float>(0.0f));
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break;
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default:
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ARM_COMPUTE_ERROR("Not supported");
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}
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}
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TensorType compute_target(TensorShape input_shape, TensorShape weights_shape, const TensorShape bias_shape, TensorShape output_shape,
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const PadStrideInfo &info, bool add_bias)
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{
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if(_data_layout == DataLayout::NHWC)
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{
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permute(input_shape, PermutationVector(2U, 0U, 1U));
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permute(weights_shape, PermutationVector(2U, 0U, 1U));
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permute(output_shape, PermutationVector(2U, 0U, 1U));
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}
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// Create tensors
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TensorType src = create_tensor<TensorType>(input_shape, _data_type, 1, _input_quantization_info, _data_layout);
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TensorType weights = create_tensor<TensorType>(weights_shape, _data_type, 1, _input_quantization_info, _data_layout);
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TensorType bias = create_tensor<TensorType>(bias_shape, _bias_data_type, 1, _input_quantization_info, _data_layout);
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TensorType dst = create_tensor<TensorType>(output_shape, _data_type, 1, _output_quantization_info, _data_layout);
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// Create and configure function
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FunctionType conv;
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conv.configure(&src, &weights, add_bias ? &bias : nullptr, &dst, info);
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ARM_COMPUTE_EXPECT(src.info()->is_resizable(), framework::LogLevel::ERRORS);
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ARM_COMPUTE_EXPECT(weights.info()->is_resizable(), framework::LogLevel::ERRORS);
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if(add_bias)
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{
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ARM_COMPUTE_EXPECT(bias.info()->is_resizable(), framework::LogLevel::ERRORS);
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}
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ARM_COMPUTE_EXPECT(dst.info()->is_resizable(), framework::LogLevel::ERRORS);
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// Allocate tensors
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src.allocator()->allocate();
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weights.allocator()->allocate();
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if(add_bias)
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{
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bias.allocator()->allocate();
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}
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dst.allocator()->allocate();
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ARM_COMPUTE_EXPECT(!src.info()->is_resizable(), framework::LogLevel::ERRORS);
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ARM_COMPUTE_EXPECT(!weights.info()->is_resizable(), framework::LogLevel::ERRORS);
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if(add_bias)
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{
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ARM_COMPUTE_EXPECT(!bias.info()->is_resizable(), framework::LogLevel::ERRORS);
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}
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ARM_COMPUTE_EXPECT(!dst.info()->is_resizable(), framework::LogLevel::ERRORS);
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// Fill tensors
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fill(AccessorType(src), 0);
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fill(AccessorType(weights), 1);
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if(add_bias)
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{
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fill(AccessorType(bias), 2);
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}
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// Compute DeconvolutionLayer function
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conv.run();
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return dst;
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}
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SimpleTensor<T> compute_reference(const TensorShape &input_shape, const TensorShape &weights_shape, const TensorShape &bias_shape, const TensorShape &output_shape,
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const PadStrideInfo &info, bool add_bias)
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{
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// Create reference
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SimpleTensor<T> src{ input_shape, _data_type, 1, _input_quantization_info };
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SimpleTensor<T> weights{ weights_shape, _data_type, 1, _input_quantization_info };
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SimpleTensor<TBias> bias{ bias_shape, _bias_data_type, 1, _input_quantization_info };
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// Fill reference
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fill(src, 0);
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fill(weights, 1);
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if(add_bias)
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{
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fill(bias, 2);
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}
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else
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{
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fill_zeros(bias);
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}
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return reference::deconvolution_layer<T>(src, weights, bias, output_shape, info, _output_quantization_info);
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}
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TensorType _target{};
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SimpleTensor<T> _reference{};
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DataType _data_type{};
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DataType _bias_data_type{};
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DataLayout _data_layout{};
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QuantizationInfo _input_quantization_info{};
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QuantizationInfo _output_quantization_info{};
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};
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template <typename TensorType, typename AccessorType, typename FunctionType, typename T, unsigned int kernel_size_x, unsigned int kernel_size_y>
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class DeconvolutionValidationFixture : public DeconvolutionLayerFixtureBase<TensorType, AccessorType, FunctionType, T>
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{
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public:
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template <typename...>
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void setup(TensorShape input_shape, unsigned int sx, unsigned int sy, unsigned int padx, unsigned int pady,
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unsigned int num_kernels, DataType data_type, DataLayout data_layout, bool add_bias)
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{
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ARM_COMPUTE_ERROR_ON_MSG(kernel_size_x != kernel_size_y, "Only square kernels supported");
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const TensorShape weights_shape(kernel_size_x, kernel_size_y, input_shape.z(), num_kernels);
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const TensorShape bias_shape(num_kernels);
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const PadStrideInfo info(sx, sy, padx, pady, DimensionRoundingType::CEIL);
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auto out_dim = deconvolution_output_dimensions(input_shape.x(), input_shape.y(), kernel_size_x, kernel_size_y, info);
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TensorInfo input_info(input_shape, 1, data_type);
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TensorInfo weights_info(weights_shape, 1, data_type);
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TensorShape output_shape = compute_deconvolution_output_shape(out_dim, input_info, weights_info);
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DeconvolutionLayerFixtureBase<TensorType, AccessorType, FunctionType, T>::setup(input_shape, weights_shape, bias_shape, output_shape, info, data_type, data_layout, QuantizationInfo(),
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QuantizationInfo(), add_bias);
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}
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};
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template <typename TensorType, typename AccessorType, typename FunctionType, typename T, unsigned int kernel_size_x, unsigned int kernel_size_y>
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class DeconvolutionValidationAsymmFixture : public DeconvolutionLayerFixtureBase<TensorType, AccessorType, FunctionType, T>
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{
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public:
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template <typename...>
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void setup(TensorShape input_shape, unsigned int sx, unsigned int sy, unsigned int pad_left, unsigned int pad_right, unsigned int pad_top,
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unsigned int pad_bottom, unsigned int num_kernels, DataType data_type, DataLayout data_layout, bool add_bias)
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{
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ARM_COMPUTE_ERROR_ON_MSG(kernel_size_x != kernel_size_y, "Only square kernels supported");
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const TensorShape weights_shape(kernel_size_x, kernel_size_y, input_shape.z(), num_kernels);
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const TensorShape bias_shape(num_kernels);
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const PadStrideInfo info(sx, sy, pad_left, pad_right, pad_top, pad_bottom, DimensionRoundingType::CEIL);
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auto out_dim = deconvolution_output_dimensions(input_shape.x(), input_shape.y(), kernel_size_x, kernel_size_y, info);
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TensorInfo input_info(input_shape, 1, data_type);
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TensorInfo weights_info(weights_shape, 1, data_type);
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TensorShape output_shape = compute_deconvolution_output_shape(out_dim, input_info, weights_info);
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DeconvolutionLayerFixtureBase<TensorType, AccessorType, FunctionType, T>::setup(input_shape, weights_shape, bias_shape, output_shape, info, data_type, data_layout, QuantizationInfo(),
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QuantizationInfo(), add_bias);
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}
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};
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template <typename TensorType, typename AccessorType, typename FunctionType, typename T, unsigned int kernel_size_x, unsigned int kernel_size_y>
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class DeconvolutionValidationQuantizedFixture : public DeconvolutionLayerFixtureBase<TensorType, AccessorType, FunctionType, T>
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{
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public:
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template <typename...>
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void setup(TensorShape input_shape, unsigned int sx, unsigned int sy, unsigned int padx, unsigned int pady,
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unsigned int num_kernels, DataType data_type, DataLayout data_layout, QuantizationInfo input_quantization_info, QuantizationInfo output_quantization_info, bool add_bias)
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{
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ARM_COMPUTE_ERROR_ON_MSG(kernel_size_x != kernel_size_y, "Only square kernels supported");
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const TensorShape weights_shape(kernel_size_x, kernel_size_y, input_shape.z(), num_kernels);
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const TensorShape bias_shape(num_kernels);
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const PadStrideInfo info(sx, sy, padx, pady, DimensionRoundingType::CEIL);
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auto out_dim = deconvolution_output_dimensions(input_shape.x(), input_shape.y(), kernel_size_x, kernel_size_y, info);
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TensorInfo input_info(input_shape, 1, data_type, input_quantization_info);
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TensorInfo weights_info(weights_shape, 1, data_type, input_quantization_info);
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TensorShape output_shape = compute_deconvolution_output_shape(out_dim, input_info, weights_info);
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DeconvolutionLayerFixtureBase<TensorType, AccessorType, FunctionType, T>::setup(input_shape, weights_shape, bias_shape, output_shape, info, data_type, data_layout, input_quantization_info,
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output_quantization_info, add_bias);
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}
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};
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} // namespace validation
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} // namespace test
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} // namespace arm_compute
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