215 lines
2.6 KiB
Plaintext
215 lines
2.6 KiB
Plaintext
/*
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* (C) Copyright 2022 Rockchip Electronics Co., Ltd
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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/ {
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aliases {
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mmc1 = &sdmmc;
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mmc0 = &emmc;
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};
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chosen {
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stdout-path = &uart2;
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u-boot,spl-boot-order = &sdmmc, &spi_nor, &spi_nand, &emmc;
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};
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secure-otp@ff3fd8000 {
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compatible = "rockchip,rv1106-secure-otp";
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reg = <0xff3d8000 0x4000>;
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secure_conf = <0xff07a018>;
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cru_rst_addr = <0xff3bca08>;
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mask_addr = <0xff3dc000>;
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u-boot,dm-spl;
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status = "okay";
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};
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};
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&emmc {
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mmc-ecsd = <0x3F000>;
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bus-width = <8>;
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mmc-hs200-1_8v;
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u-boot,dm-spl;
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status = "okay";
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};
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&cru {
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u-boot,dm-spl;
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status = "okay";
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};
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&gmac {
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u-boot,dm-spl;
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status = "okay";
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};
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&grf {
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u-boot,dm-spl;
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status = "okay";
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};
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&grf_cru {
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u-boot,dm-spl;
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status = "okay";
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};
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&mdio {
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u-boot,dm-spl;
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status = "okay";
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};
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&rmii_phy {
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u-boot,dm-spl;
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status = "okay";
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};
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&sdmmc {
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u-boot,dm-spl;
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pwr-en-gpios = <&gpio0 RK_PA1 GPIO_ACTIVE_LOW>;
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status = "okay";
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};
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&sdmmc0 {
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u-boot,dm-spl;
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};
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&sdmmc0_bus4 {
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u-boot,dm-spl;
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};
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&sdmmc0_clk {
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u-boot,dm-spl;
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};
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&sdmmc0_cmd {
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u-boot,dm-spl;
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};
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&sdmmc0_det {
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u-boot,dm-spl;
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};
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&sdmmc0_idle_pins {
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u-boot,dm-spl;
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};
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&sdmmc1m1_idle_pins {
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u-boot,dm-spl;
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};
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&pinctrl {
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u-boot,dm-spl;
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status = "okay";
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};
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&ioc {
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u-boot,dm-spl;
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status = "okay";
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};
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&pmuioc {
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u-boot,dm-spl;
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status = "okay";
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};
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&pcfg_pull_up_drv_level_2 {
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u-boot,dm-spl;
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};
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&pcfg_pull_up {
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u-boot,dm-spl;
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};
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&pcfg_pull_down{
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u-boot,dm-spl;
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};
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&gpio0 {
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u-boot,dm-spl;
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status = "okay";
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};
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&gpio1 {
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u-boot,dm-pre-reloc;
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status = "okay";
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};
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&gpio2 {
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u-boot,dm-pre-reloc;
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status = "okay";
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};
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&gpio3 {
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u-boot,dm-spl;
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status = "okay";
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};
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&gpio4 {
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u-boot,dm-pre-reloc;
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status = "okay";
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};
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&crypto {
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u-boot,dm-spl;
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clocks = <&cru CLK_CORE_CRYPTO>, <&cru CLK_PKA_CRYPTO>;
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clock-frequency = <300000000>, <300000000>;
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status = "okay";
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};
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&rng {
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u-boot,dm-spl;
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status = "okay";
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};
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&saradc {
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u-boot,dm-pre-reloc;
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status = "okay";
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};
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&sfc {
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u-boot,dm-spl;
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status = "okay";
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#address-cells = <1>;
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#size-cells = <0>;
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spi_nand: flash@0 {
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u-boot,dm-spl;
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compatible = "spi-nand";
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reg = <0>;
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spi-tx-bus-width = <1>;
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spi-rx-bus-width = <4>;
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spi-max-frequency = <80000000>;
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};
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spi_nor: flash@1 {
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u-boot,dm-spl;
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compatible = "jedec,spi-nor";
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label = "sfc_nor";
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reg = <0>;
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spi-tx-bus-width = <1>;
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spi-rx-bus-width = <4>;
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spi-max-frequency = <100000000>;
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};
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};
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&u2phy {
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u-boot,dm-pre-reloc;
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status = "okay";
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};
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&u2phy_otg {
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u-boot,dm-pre-reloc;
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status = "okay";
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};
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&usbdrd {
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u-boot,dm-pre-reloc;
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status = "okay";
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};
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&usbdrd_dwc3 {
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u-boot,dm-pre-reloc;
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status = "okay";
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};
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