755 lines
20 KiB
C++
755 lines
20 KiB
C++
/*
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* \file trc_pkt_elem_etmv4i.cpp
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* \brief OpenCSD :
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*
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* \copyright Copyright (c) 2015, ARM Limited. All Rights Reserved.
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*/
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/*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* 3. Neither the name of the copyright holder nor the names of its contributors
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* may be used to endorse or promote products derived from this software without
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* specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 'AS IS' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sstream>
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#include <iomanip>
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#include "opencsd/etmv4/trc_pkt_elem_etmv4i.h"
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EtmV4ITrcPacket::EtmV4ITrcPacket()
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{
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protocol_version = 0x42; // min protocol version.
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}
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EtmV4ITrcPacket::~EtmV4ITrcPacket()
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{
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}
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void EtmV4ITrcPacket::initStartState()
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{
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// clear packet state to start of trace (first sync or post discontinuity)
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// clear all valid bits
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pkt_valid.val = 0;
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// virtual address
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v_addr.pkt_bits = 0;
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v_addr.valid_bits = 0;
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v_addr_ISA = 0;
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// timestamp
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ts.bits_changed = 0;
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ts.timestamp = 0;
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// per packet init
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initNextPacket();
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}
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void EtmV4ITrcPacket::initNextPacket()
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{
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// clear valid bits for elements that are only valid over a single packet.
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pkt_valid.bits.cc_valid = 0;
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pkt_valid.bits.commit_elem_valid = 0;
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atom.num = 0;
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context.updated = 0;
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context.updated_v = 0;
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context.updated_c = 0;
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err_type = ETM4_PKT_I_NO_ERR_TYPE;
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}
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// printing
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void EtmV4ITrcPacket::toString(std::string &str) const
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{
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const char *name;
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const char *desc;
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std::string valStr, ctxtStr = "";
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name = packetTypeName(type, &desc);
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str = name + (std::string)" : " + desc;
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// extended descriptions
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switch (type)
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{
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case ETM4_PKT_I_BAD_SEQUENCE:
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case ETM4_PKT_I_INCOMPLETE_EOT:
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case ETM4_PKT_I_RESERVED_CFG:
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name = packetTypeName(err_type, 0);
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str += "[" + (std::string)name + "]";
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break;
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case ETM4_PKT_I_ADDR_CTXT_L_32IS0:
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case ETM4_PKT_I_ADDR_CTXT_L_32IS1:
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contextStr(ctxtStr);
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case ETM4_PKT_I_ADDR_L_32IS0:
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case ETM4_PKT_I_ADDR_L_32IS1:
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case ETE_PKT_I_SRC_ADDR_L_32IS0:
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case ETE_PKT_I_SRC_ADDR_L_32IS1:
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trcPrintableElem::getValStr(valStr, (v_addr.size == VA_64BIT) ? 64 : 32, v_addr.valid_bits, v_addr.val, true, (v_addr.pkt_bits < 32) ? v_addr.pkt_bits : 0);
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str += "; Addr=" + valStr + "; " + ctxtStr;
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break;
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case ETM4_PKT_I_ADDR_CTXT_L_64IS0:
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case ETM4_PKT_I_ADDR_CTXT_L_64IS1:
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contextStr(ctxtStr);
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case ETM4_PKT_I_ADDR_L_64IS0:
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case ETM4_PKT_I_ADDR_L_64IS1:
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case ETE_PKT_I_SRC_ADDR_L_64IS0:
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case ETE_PKT_I_SRC_ADDR_L_64IS1:
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trcPrintableElem::getValStr(valStr, (v_addr.size == VA_64BIT) ? 64 : 32, v_addr.valid_bits, v_addr.val, true, (v_addr.pkt_bits < 64) ? v_addr.pkt_bits : 0);
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str += "; Addr=" + valStr + "; " + ctxtStr;
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break;
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case ETM4_PKT_I_CTXT:
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contextStr(ctxtStr);
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str += "; " + ctxtStr;
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break;
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case ETM4_PKT_I_ADDR_S_IS0:
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case ETM4_PKT_I_ADDR_S_IS1:
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case ETE_PKT_I_SRC_ADDR_S_IS0:
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case ETE_PKT_I_SRC_ADDR_S_IS1:
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trcPrintableElem::getValStr(valStr, (v_addr.size == VA_64BIT) ? 64 : 32, v_addr.valid_bits, v_addr.val, true, v_addr.pkt_bits);
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str += "; Addr=" + valStr;
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break;
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case ETM4_PKT_I_ADDR_MATCH:
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case ETE_PKT_I_SRC_ADDR_MATCH:
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addrMatchIdx(valStr);
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str += ", " + valStr;
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trcPrintableElem::getValStr(valStr, (v_addr.size == VA_64BIT) ? 64 : 32, v_addr.valid_bits, v_addr.val, true);
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str += "; Addr=" + valStr + "; " + ctxtStr;
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break;
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case ETM4_PKT_I_ATOM_F1:
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case ETM4_PKT_I_ATOM_F2:
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case ETM4_PKT_I_ATOM_F3:
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case ETM4_PKT_I_ATOM_F4:
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case ETM4_PKT_I_ATOM_F5:
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case ETM4_PKT_I_ATOM_F6:
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atomSeq(valStr);
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str += "; " + valStr;
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break;
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case ETM4_PKT_I_EXCEPT:
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exceptionInfo(valStr);
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str += "; " + valStr;
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break;
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case ETM4_PKT_I_TIMESTAMP:
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{
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std::ostringstream oss;
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oss << "; Updated val = " << std::hex << "0x" << ts.timestamp;
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if (pkt_valid.bits.cc_valid)
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oss << "; CC=" << std::hex << "0x" << cycle_count;
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str += oss.str();
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}
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break;
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case ETM4_PKT_I_TRACE_INFO:
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{
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std::ostringstream oss;
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oss << "; INFO=" << std::hex << "0x" << trace_info.val;
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oss << " { CC." << std::dec << trace_info.bits.cc_enabled;
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if (isETE())
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oss << ", TSTATE." << std::dec << trace_info.bits.in_trans_state;
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oss << " }";
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if (trace_info.bits.cc_enabled)
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oss << "; CC_THRESHOLD=" << std::hex << "0x" << cc_threshold;
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str += oss.str();
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}
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break;
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case ETM4_PKT_I_CCNT_F1:
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case ETM4_PKT_I_CCNT_F2:
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case ETM4_PKT_I_CCNT_F3:
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{
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std::ostringstream oss;
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oss << "; Count=" << std::hex << "0x" << cycle_count;
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str += oss.str();
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}
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break;
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case ETM4_PKT_I_CANCEL_F1:
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{
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std::ostringstream oss;
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oss << "; Cancel(" << std::dec << cancel_elements << ")";
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str += oss.str();
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}
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break;
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case ETM4_PKT_I_CANCEL_F1_MISPRED:
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{
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std::ostringstream oss;
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oss << "; Cancel(" << std::dec << cancel_elements << "), Mispredict";
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str += oss.str();
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}
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break;
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case ETM4_PKT_I_MISPREDICT:
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{
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std::ostringstream oss;
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oss << "; ";
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if (atom.num) {
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atomSeq(valStr);
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oss << "Atom: " << valStr << ", ";
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}
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oss << "Mispredict";
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str += oss.str();
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}
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break;
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case ETM4_PKT_I_CANCEL_F2:
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{
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std::ostringstream oss;
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oss << "; ";
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if (atom.num) {
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atomSeq(valStr);
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oss << "Atom: " << valStr << ", ";
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}
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oss << "Cancel(1), Mispredict";
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str += oss.str();
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}
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break;
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case ETM4_PKT_I_CANCEL_F3:
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{
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std::ostringstream oss;
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oss << "; ";
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if (atom.num) {
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oss << "Atom: E, ";
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}
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oss << "Cancel(" << std::dec << cancel_elements << "), Mispredict";
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str += oss.str();
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}
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break;
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case ETM4_PKT_I_COMMIT:
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{
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std::ostringstream oss;
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oss << "; Commit(" << std::dec << commit_elements << ")";
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str += oss.str();
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}
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break;
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case ETM4_PKT_I_Q:
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{
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std::ostringstream oss;
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if (Q_pkt.count_present)
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{
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oss << "; Count(" << std::dec << Q_pkt.q_count << ")";
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str += oss.str();
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}
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else
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str += "; Count(Unknown)";
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if (Q_pkt.addr_match)
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{
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addrMatchIdx(valStr);
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str += "; " + valStr;
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}
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if (Q_pkt.addr_present || Q_pkt.addr_match)
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{
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trcPrintableElem::getValStr(valStr, (v_addr.size == VA_64BIT) ? 64 : 32, v_addr.valid_bits, v_addr.val, true, (v_addr.pkt_bits < 64) ? v_addr.pkt_bits : 0);
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str += "; Addr=" + valStr;
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}
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}
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break;
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}
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}
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void EtmV4ITrcPacket::toStringFmt(const uint32_t fmtFlags, std::string &str) const
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{
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toString(str); // TBD add in formatted response.
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}
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const char *EtmV4ITrcPacket::packetTypeName(const ocsd_etmv4_i_pkt_type type, const char **ppDesc) const
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{
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const char *pName = "I_UNKNOWN";
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const char *pDesc = "Unknown Packet Header";
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switch(type)
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{
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case ETM4_PKT_I_NOTSYNC:
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pName = "I_NOT_SYNC";
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pDesc = "I Stream not synchronised";
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break;
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case ETM4_PKT_I_INCOMPLETE_EOT:
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pName = "I_INCOMPLETE_EOT";
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pDesc = "Incomplete packet at end of trace.";
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break;
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case ETM4_PKT_I_NO_ERR_TYPE:
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pName = "I_NO_ERR_TYPE";
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pDesc = "No Error Type.";
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break;
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case ETM4_PKT_I_BAD_SEQUENCE:
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pName = "I_BAD_SEQUENCE";
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pDesc = "Invalid Sequence in packet.";
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break;
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case ETM4_PKT_I_BAD_TRACEMODE:
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pName = "I_BAD_TRACEMODE";
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pDesc = "Invalid Packet for trace mode.";
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break;
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case ETM4_PKT_I_RESERVED:
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pName = "I_RESERVED";
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pDesc = "Reserved Packet Header";
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break;
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case ETM4_PKT_I_RESERVED_CFG:
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pName = "I_RESERVED_CFG";
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pDesc = "Reserved header for current configuration.";
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break;
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case ETM4_PKT_I_EXTENSION:
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pName = "I_EXTENSION";
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pDesc = "Extension packet header.";
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break;
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case ETM4_PKT_I_TRACE_INFO:
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pName = "I_TRACE_INFO";
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pDesc = "Trace Info.";
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break;
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case ETM4_PKT_I_TIMESTAMP:
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pName = "I_TIMESTAMP";
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pDesc = "Timestamp.";
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break;
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case ETM4_PKT_I_TRACE_ON:
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pName = "I_TRACE_ON";
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pDesc = "Trace On.";
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break;
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case ETM4_PKT_I_FUNC_RET:
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pName = "I_FUNC_RET";
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pDesc = "V8M - function return.";
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break;
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case ETM4_PKT_I_EXCEPT:
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pName = "I_EXCEPT";
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pDesc = "Exception.";
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break;
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case ETM4_PKT_I_EXCEPT_RTN:
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pName = "I_EXCEPT_RTN";
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pDesc = "Exception Return.";
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break;
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case ETE_PKT_I_COMMIT_WIN_MV:
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pName = "I_COMMIT_WIN_MV";
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pDesc = "Commit window move.";
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break;
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case ETE_PKT_I_TRANS_ST:
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pName = "I_TRANS_ST";
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pDesc = "Transaction Start.";
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break;
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case ETE_PKT_I_TRANS_COMMIT:
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pName = "I_TRANS_COMMIT";
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pDesc = "Transaction Commit.";
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break;
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case ETM4_PKT_I_CCNT_F1:
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pName = "I_CCNT_F1";
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pDesc = "Cycle Count format 1.";
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break;
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case ETM4_PKT_I_CCNT_F2:
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pName = "I_CCNT_F2";
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pDesc = "Cycle Count format 2.";
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break;
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case ETM4_PKT_I_CCNT_F3:
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pName = "I_CCNT_F3";
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pDesc = "Cycle Count format 3.";
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break;
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case ETM4_PKT_I_NUM_DS_MKR:
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pName = "I_NUM_DS_MKR";
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pDesc = "Data Synchronisation Marker - Numbered.";
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break;
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case ETM4_PKT_I_UNNUM_DS_MKR:
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pName = "I_UNNUM_DS_MKR";
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pDesc = "Data Synchronisation Marker - Unnumbered.";
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break;
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case ETM4_PKT_I_COMMIT:
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pName = "I_COMMIT";
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pDesc = "Commit";
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break;
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case ETM4_PKT_I_CANCEL_F1:
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pName = "I_CANCEL_F1";
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pDesc = "Cancel Format 1.";
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break;
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case ETM4_PKT_I_CANCEL_F1_MISPRED:
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pName = "I_CANCEL_F1_MISPRED";
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pDesc = "Cancel Format 1 + Mispredict.";
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break;
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case ETM4_PKT_I_MISPREDICT:
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pName = "I_MISPREDICT";
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pDesc = "Mispredict.";
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break;
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case ETM4_PKT_I_CANCEL_F2:
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pName = "I_CANCEL_F2";
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pDesc = "Cancel Format 2.";
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break;
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case ETM4_PKT_I_CANCEL_F3:
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pName = "I_CANCEL_F3";
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pDesc = "Cancel Format 3.";
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break;
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case ETM4_PKT_I_COND_I_F2:
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pName = "I_COND_I_F2";
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pDesc = "Conditional Instruction, format 2.";
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break;
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case ETM4_PKT_I_COND_FLUSH:
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pName = "I_COND_FLUSH";
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pDesc = "Conditional Flush.";
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break;
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case ETM4_PKT_I_COND_RES_F4:
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pName = "I_COND_RES_F4";
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pDesc = "Conditional Result, format 4.";
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break;
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case ETM4_PKT_I_COND_RES_F2:
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pName = "I_COND_RES_F2";
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pDesc = "Conditional Result, format 2.";
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break;
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case ETM4_PKT_I_COND_RES_F3:
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pName = "I_COND_RES_F3";
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pDesc = "Conditional Result, format 3.";
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break;
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case ETM4_PKT_I_COND_RES_F1:
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pName = "I_COND_RES_F1";
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pDesc = "Conditional Result, format 1.";
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break;
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case ETM4_PKT_I_COND_I_F1:
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pName = "I_COND_I_F1";
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pDesc = "Conditional Instruction, format 1.";
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break;
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case ETM4_PKT_I_COND_I_F3:
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pName = "I_COND_I_F3";
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pDesc = "Conditional Instruction, format 3.";
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break;
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case ETM4_PKT_I_IGNORE:
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pName = "I_IGNORE";
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pDesc = "Ignore.";
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break;
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case ETM4_PKT_I_EVENT:
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pName = "I_EVENT";
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pDesc = "Trace Event.";
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break;
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case ETM4_PKT_I_CTXT:
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pName = "I_CTXT";
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pDesc = "Context Packet.";
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break;
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case ETM4_PKT_I_ADDR_CTXT_L_32IS0:
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pName = "I_ADDR_CTXT_L_32IS0";
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pDesc = "Address & Context, Long, 32 bit, IS0.";
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break;
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case ETM4_PKT_I_ADDR_CTXT_L_32IS1:
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pName = "I_ADDR_CTXT_L_32IS1";
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pDesc = "Address & Context, Long, 32 bit, IS0.";
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break;
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case ETM4_PKT_I_ADDR_CTXT_L_64IS0:
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pName = "I_ADDR_CTXT_L_64IS0";
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pDesc = "Address & Context, Long, 64 bit, IS0.";
|
|
break;
|
|
|
|
case ETM4_PKT_I_ADDR_CTXT_L_64IS1:
|
|
pName = "I_ADDR_CTXT_L_64IS1";
|
|
pDesc = "Address & Context, Long, 64 bit, IS1.";
|
|
break;
|
|
|
|
case ETE_PKT_I_TS_MARKER:
|
|
pName = "I_TS_MARKER";
|
|
pDesc = "Timestamp Marker";
|
|
break;
|
|
|
|
case ETM4_PKT_I_ADDR_MATCH:
|
|
pName = "I_ADDR_MATCH";
|
|
pDesc = "Exact Address Match.";
|
|
break;
|
|
|
|
case ETM4_PKT_I_ADDR_S_IS0:
|
|
pName = "I_ADDR_S_IS0";
|
|
pDesc = "Address, Short, IS0.";
|
|
break;
|
|
|
|
case ETM4_PKT_I_ADDR_S_IS1:
|
|
pName = "I_ADDR_S_IS1";
|
|
pDesc = "Address, Short, IS1.";
|
|
break;
|
|
|
|
case ETM4_PKT_I_ADDR_L_32IS0:
|
|
pName = "I_ADDR_L_32IS0";
|
|
pDesc = "Address, Long, 32 bit, IS0.";
|
|
break;
|
|
|
|
case ETM4_PKT_I_ADDR_L_32IS1:
|
|
pName = "I_ADDR_L_32IS1";
|
|
pDesc = "Address, Long, 32 bit, IS1.";
|
|
break;
|
|
|
|
case ETM4_PKT_I_ADDR_L_64IS0:
|
|
pName = "I_ADDR_L_64IS0";
|
|
pDesc = "Address, Long, 64 bit, IS0.";
|
|
break;
|
|
|
|
case ETM4_PKT_I_ADDR_L_64IS1:
|
|
pName = "I_ADDR_L_64IS1";
|
|
pDesc = "Address, Long, 64 bit, IS1.";
|
|
break;
|
|
|
|
case ETM4_PKT_I_Q:
|
|
pName = "I_Q";
|
|
pDesc = "Q Packet.";
|
|
break;
|
|
|
|
case ETE_PKT_I_SRC_ADDR_MATCH:
|
|
pName = "I_SRC_ADDR_MATCH";
|
|
pDesc = "Exact Source Address Match.";
|
|
break;
|
|
|
|
case ETE_PKT_I_SRC_ADDR_S_IS0:
|
|
pName = "I_SRC_ADDR_S_IS0";
|
|
pDesc = "Source Address, Short, IS0.";
|
|
break;
|
|
|
|
case ETE_PKT_I_SRC_ADDR_S_IS1:
|
|
pName = "I_SRC_ADDR_S_IS1";
|
|
pDesc = "Source Address, Short, IS1.";
|
|
break;
|
|
|
|
case ETE_PKT_I_SRC_ADDR_L_32IS0:
|
|
pName = "I_SCR_ADDR_L_32IS0";
|
|
pDesc = "Source Address, Long, 32 bit, IS0.";
|
|
break;
|
|
|
|
case ETE_PKT_I_SRC_ADDR_L_32IS1:
|
|
pName = "I_SRC_ADDR_L_32IS1";
|
|
pDesc = "Source Address, Long, 32 bit, IS1.";
|
|
break;
|
|
|
|
case ETE_PKT_I_SRC_ADDR_L_64IS0:
|
|
pName = "I_SRC_ADDR_L_64IS0";
|
|
pDesc = "Source Address, Long, 64 bit, IS0.";
|
|
break;
|
|
|
|
case ETE_PKT_I_SRC_ADDR_L_64IS1:
|
|
pName = "I_SRC_ADDR_L_64IS1";
|
|
pDesc = "Source Address, Long, 64 bit, IS1.";
|
|
break;
|
|
|
|
case ETM4_PKT_I_ATOM_F6:
|
|
pName = "I_ATOM_F6";
|
|
pDesc = "Atom format 6.";
|
|
break;
|
|
|
|
case ETM4_PKT_I_ATOM_F5:
|
|
pName = "I_ATOM_F5";
|
|
pDesc = "Atom format 5.";
|
|
break;
|
|
|
|
case ETM4_PKT_I_ATOM_F2:
|
|
pName = "I_ATOM_F2";
|
|
pDesc = "Atom format 2.";
|
|
break;
|
|
|
|
case ETM4_PKT_I_ATOM_F4:
|
|
pName = "I_ATOM_F4";
|
|
pDesc = "Atom format 4.";
|
|
break;
|
|
|
|
case ETM4_PKT_I_ATOM_F1:
|
|
pName = "I_ATOM_F1";
|
|
pDesc = "Atom format 1.";
|
|
break;
|
|
|
|
case ETM4_PKT_I_ATOM_F3:
|
|
pName = "I_ATOM_F3";
|
|
pDesc = "Atom format 3.";
|
|
break;
|
|
|
|
case ETM4_PKT_I_ASYNC:
|
|
pName = "I_ASYNC";
|
|
pDesc = "Alignment Synchronisation.";
|
|
break;
|
|
|
|
case ETM4_PKT_I_DISCARD:
|
|
pName = "I_DISCARD";
|
|
pDesc = "Discard.";
|
|
break;
|
|
|
|
case ETM4_PKT_I_OVERFLOW:
|
|
pName = "I_OVERFLOW";
|
|
pDesc = "Overflow.";
|
|
break;
|
|
|
|
case ETE_PKT_I_PE_RESET:
|
|
pName = "I_PE_RESET";
|
|
pDesc = "PE Reset.";
|
|
break;
|
|
|
|
case ETE_PKT_I_TRANS_FAIL:
|
|
pName = "I_TRANS_FAIL";
|
|
pDesc = "Transaction Fail.";
|
|
break;
|
|
|
|
default:
|
|
break;
|
|
}
|
|
|
|
if(ppDesc) *ppDesc = pDesc;
|
|
return pName;
|
|
}
|
|
|
|
void EtmV4ITrcPacket::contextStr(std::string &ctxtStr) const
|
|
{
|
|
ctxtStr = "";
|
|
if(pkt_valid.bits.context_valid)
|
|
{
|
|
std::ostringstream oss;
|
|
if(context.updated)
|
|
{
|
|
oss << "Ctxt: " << (context.SF ? "AArch64," : "AArch32, ") << "EL" << context.EL << ", " << (context.NS ? "NS; " : "S; ");
|
|
if(context.updated_c)
|
|
{
|
|
oss << "CID=0x" << std::hex << std::setfill('0') << std::setw(8) << context.ctxtID << "; ";
|
|
}
|
|
if(context.updated_v)
|
|
{
|
|
oss << "VMID=0x" << std::hex << std::setfill('0') << std::setw(4) << context.VMID << "; ";
|
|
}
|
|
}
|
|
else
|
|
{
|
|
oss << "Ctxt: Same";
|
|
}
|
|
ctxtStr = oss.str();
|
|
}
|
|
}
|
|
|
|
void EtmV4ITrcPacket::atomSeq(std::string &valStr) const
|
|
{
|
|
std::ostringstream oss;
|
|
uint32_t bitpattern = atom.En_bits;
|
|
for(int i = 0; i < atom.num; i++)
|
|
{
|
|
oss << ((bitpattern & 0x1) ? "E" : "N");
|
|
bitpattern >>= 1;
|
|
}
|
|
valStr = oss.str();
|
|
}
|
|
|
|
void EtmV4ITrcPacket::addrMatchIdx(std::string &valStr) const
|
|
{
|
|
std::ostringstream oss;
|
|
oss << "[" << (uint16_t)addr_exact_match_idx << "]";
|
|
valStr = oss.str();
|
|
}
|
|
|
|
void EtmV4ITrcPacket::exceptionInfo(std::string &valStr) const
|
|
{
|
|
std::ostringstream oss;
|
|
|
|
static const char *ARv8Excep[] = {
|
|
"PE Reset", "Debug Halt", "Call", "Trap",
|
|
"System Error", "Reserved", "Inst Debug", "Data Debug",
|
|
"Reserved", "Reserved", "Alignment", "Inst Fault",
|
|
"Data Fault", "Reserved", "IRQ", "FIQ"
|
|
};
|
|
|
|
static const char *MExcep[] = {
|
|
"Reserved", "PE Reset", "NMI", "HardFault",
|
|
"MemManage", "BusFault", "UsageFault", "Reserved",
|
|
"Reserved","Reserved","Reserved","SVC",
|
|
"DebugMonitor", "Reserved","PendSV","SysTick",
|
|
"IRQ0","IRQ1","IRQ2","IRQ3",
|
|
"IRQ4","IRQ5","IRQ6","IRQ7",
|
|
"DebugHalt", "LazyFP Push", "Lockup", "Reserved",
|
|
"Reserved","Reserved","Reserved","Reserved"
|
|
};
|
|
|
|
if(exception_info.m_type == 0)
|
|
{
|
|
if(exception_info.exceptionType < 0x10)
|
|
oss << " " << ARv8Excep[exception_info.exceptionType] << ";";
|
|
else
|
|
oss << " Reserved;";
|
|
|
|
}
|
|
else
|
|
{
|
|
if(exception_info.exceptionType < 0x20)
|
|
oss << " " << MExcep[exception_info.exceptionType] << ";";
|
|
else if((exception_info.exceptionType >= 0x208) && (exception_info.exceptionType <= 0x3EF))
|
|
oss << " IRQ" << (int)(exception_info.exceptionType - 0x200) << ";";
|
|
else
|
|
oss << " Reserved;";
|
|
if(exception_info.m_fault_pending)
|
|
oss << " Fault Pending;";
|
|
}
|
|
|
|
if(exception_info.addr_interp == 0x1)
|
|
oss << " Ret Addr Follows;";
|
|
else if(exception_info.addr_interp == 0x2)
|
|
oss << " Ret Addr Follows, Match Prev;";
|
|
|
|
valStr = oss.str();
|
|
}
|
|
|
|
EtmV4ITrcPacket &EtmV4ITrcPacket::operator =(const ocsd_etmv4_i_pkt* p_pkt)
|
|
{
|
|
*dynamic_cast<ocsd_etmv4_i_pkt *>(this) = *p_pkt;
|
|
return *this;
|
|
}
|
|
|
|
/* End of File trc_pkt_elem_etmv4i.cpp */
|