114 lines
2.5 KiB
C
114 lines
2.5 KiB
C
/*
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* Copyright (c) 2021, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <assert.h>
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#include <stdint.h>
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#include <common/debug.h>
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#include <common/runtime_svc.h>
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#include <services/pci_svc.h>
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#include <services/std_svc.h>
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#include <smccc_helpers.h>
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static uint64_t validate_rw_addr_sz(uint32_t addr, uint64_t off, uint64_t sz)
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{
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uint32_t nseg;
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uint32_t ret;
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uint32_t start_end_bus;
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ret = pci_get_bus_for_seg(PCI_ADDR_SEG(addr), &start_end_bus, &nseg);
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if (ret != SMC_PCI_CALL_SUCCESS) {
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return SMC_PCI_CALL_INVAL_PARAM;
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}
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switch (sz) {
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case SMC_PCI_SZ_8BIT:
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case SMC_PCI_SZ_16BIT:
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case SMC_PCI_SZ_32BIT:
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break;
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default:
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return SMC_PCI_CALL_INVAL_PARAM;
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}
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if ((off + sz) > (PCI_OFFSET_MASK + 1U)) {
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return SMC_PCI_CALL_INVAL_PARAM;
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}
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return SMC_PCI_CALL_SUCCESS;
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}
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uint64_t pci_smc_handler(uint32_t smc_fid,
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u_register_t x1,
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u_register_t x2,
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u_register_t x3,
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u_register_t x4,
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void *cookie,
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void *handle,
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u_register_t flags)
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{
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switch (smc_fid) {
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case SMC_PCI_VERSION: {
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pcie_version ver;
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ver.major = 1U;
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ver.minor = 0U;
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SMC_RET4(handle, ver.val, 0U, 0U, 0U);
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}
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case SMC_PCI_FEATURES:
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switch (x1) {
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case SMC_PCI_VERSION:
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case SMC_PCI_FEATURES:
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case SMC_PCI_READ:
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case SMC_PCI_WRITE:
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case SMC_PCI_SEG_INFO:
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SMC_RET1(handle, SMC_PCI_CALL_SUCCESS);
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default:
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SMC_RET1(handle, SMC_PCI_CALL_NOT_SUPPORTED);
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}
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break;
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case SMC_PCI_READ: {
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uint32_t ret;
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if (validate_rw_addr_sz(x1, x2, x3) != SMC_PCI_CALL_SUCCESS) {
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SMC_RET2(handle, SMC_PCI_CALL_INVAL_PARAM, 0U);
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}
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if (x4 != 0U) {
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SMC_RET2(handle, SMC_PCI_CALL_INVAL_PARAM, 0U);
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}
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if (pci_read_config(x1, x2, x3, &ret) != 0U) {
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SMC_RET2(handle, SMC_PCI_CALL_INVAL_PARAM, 0U);
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} else {
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SMC_RET2(handle, SMC_PCI_CALL_SUCCESS, ret);
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}
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break;
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}
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case SMC_PCI_WRITE: {
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uint32_t ret;
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if (validate_rw_addr_sz(x1, x2, x3) != SMC_PCI_CALL_SUCCESS) {
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SMC_RET1(handle, SMC_PCI_CALL_INVAL_PARAM);
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}
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ret = pci_write_config(x1, x2, x3, x4);
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SMC_RET1(handle, ret);
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break;
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}
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case SMC_PCI_SEG_INFO: {
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uint32_t nseg;
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uint32_t ret;
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uint32_t start_end_bus;
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if ((x2 != 0U) || (x3 != 0U) || (x4 != 0U)) {
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SMC_RET3(handle, SMC_PCI_CALL_INVAL_PARAM, 0U, 0U);
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}
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ret = pci_get_bus_for_seg(x1, &start_end_bus, &nseg);
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SMC_RET3(handle, ret, start_end_bus, nseg);
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break;
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}
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default:
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/* should be unreachable */
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WARN("Unimplemented PCI Service Call: 0x%x\n", smc_fid);
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SMC_RET1(handle, SMC_PCI_CALL_NOT_SUPPORTED);
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}
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}
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