824 lines
16 KiB
Plaintext
824 lines
16 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
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*/
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/pinctrl/rockchip.h>
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/sensor-dev.h>
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#include <dt-bindings/display/drm_mipi_dsi.h>
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#include <dt-bindings/display/media-bus-format.h>
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#include "px30.dtsi"
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#include "px30-android.dtsi"
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/ {
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model = "Rockchip PX30 AD R35 MB board";
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compatible = "rockchip,px30-ad-r35-mb", "rockchip,px30";
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adc-keys {
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compatible = "adc-keys";
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io-channels = <&saradc 2>;
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io-channel-names = "buttons";
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poll-interval = <100>;
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keyup-threshold-microvolt = <1800000>;
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esc-key {
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linux,code = <KEY_ESC>;
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label = "esc";
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press-threshold-microvolt = <1270000>;
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};
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home-key {
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linux,code = <KEY_HOME>;
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label = "home";
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press-threshold-microvolt = <602000>;
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};
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menu-key {
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linux,code = <KEY_MENU>;
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label = "menu";
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press-threshold-microvolt = <952000>;
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};
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vol-down-key {
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linux,code = <KEY_VOLUMEDOWN>;
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label = "volume down";
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press-threshold-microvolt = <290000>;
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};
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vol-up-key {
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linux,code = <KEY_VOLUMEUP>;
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label = "volume up";
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press-threshold-microvolt = <17000>;
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};
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};
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backlight: backlight {
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compatible = "pwm-backlight";
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pwms = <&pwm1 0 25000 0>;
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brightness-levels = <
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0 1 2 3 4 5 6 7
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8 9 10 11 12 13 14 15
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16 17 18 19 20 21 22 23
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24 25 26 27 28 29 30 31
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32 33 34 35 36 37 38 39
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40 41 42 43 44 45 46 47
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48 49 50 51 52 53 54 55
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56 57 58 59 60 61 62 63
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64 65 66 67 68 69 70 71
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72 73 74 75 76 77 78 79
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80 81 82 83 84 85 86 87
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88 89 90 91 92 93 94 95
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96 97 98 99 100 101 102 103
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104 105 106 107 108 109 110 111
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112 113 114 115 116 117 118 119
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120 121 122 123 124 125 126 127
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128 129 130 131 132 133 134 135
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136 137 138 139 140 141 142 143
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144 145 146 147 148 149 150 151
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152 153 154 155 156 157 158 159
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160 161 162 163 164 165 166 167
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168 169 170 171 172 173 174 175
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176 177 178 179 180 181 182 183
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184 185 186 187 188 189 190 191
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192 193 194 195 196 197 198 199
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200 201 202 203 204 205 206 207
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208 209 210 211 212 213 214 215
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216 217 218 219 220 221 222 223
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224 225 226 227 228 229 230 231
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232 233 234 235 236 237 238 239
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240 241 242 243 244 245 246 247
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248 249 250 251 252 253 254 255>;
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default-brightness-level = <200>;
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enable-gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
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};
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sdio_pwrseq: sdio-pwrseq {
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compatible = "mmc-pwrseq-simple";
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pinctrl-names = "default";
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pinctrl-0 = <&wifi_enable_h>;
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/*
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* On the module itself this is one of these (depending
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* on the actual card populated):
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* - SDIO_RESET_L_WL_REG_ON
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* - PDN (power down when low)
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*/
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reset-gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_LOW>;
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};
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vcc_phy: vcc-phy-regulator {
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compatible = "regulator-fixed";
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regulator-name = "vcc_phy";
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regulator-always-on;
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regulator-boot-on;
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};
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vcc5v0_sys: vccsys {
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compatible = "regulator-fixed";
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regulator-name = "vcc5v0_sys";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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};
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};
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&cpu0 {
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cpu-supply = <&vdd_arm>;
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};
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&display_subsystem {
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status = "okay";
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};
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&dfi {
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status = "okay";
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};
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&dmc {
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center-supply = <&vdd_logic>;
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status = "okay";
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};
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&emmc {
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bus-width = <8>;
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cap-mmc-highspeed;
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mmc-hs200-1_8v;
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no-sdio;
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no-sd;
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disable-wp;
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non-removable;
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num-slots = <1>;
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status = "okay";
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};
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&gpu {
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mali-supply = <&vdd_logic>;
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status = "okay";
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};
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&i2c0 {
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status = "okay";
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rk809: pmic@20 {
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compatible = "rockchip,rk809";
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reg = <0x20>;
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interrupt-parent = <&gpio0>;
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interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
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pinctrl-names = "default";
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pinctrl-0 = <&pmic_int>;
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rockchip,system-power-controller;
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wakeup-source;
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#clock-cells = <1>;
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clock-output-names = "rk808-clkout1", "rk808-clkout2";
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vcc1-supply = <&vcc5v0_sys>;
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vcc2-supply = <&vcc5v0_sys>;
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vcc3-supply = <&vcc5v0_sys>;
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vcc4-supply = <&vcc5v0_sys>;
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vcc5-supply = <&vcc3v3_sys>;
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vcc6-supply = <&vcc3v3_sys>;
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vcc7-supply = <&vcc3v3_sys>;
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vcc8-supply = <&vcc3v3_sys>;
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vcc9-supply = <&vcc5v0_sys>;
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regulators {
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vdd_logic: DCDC_REG1 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <850000>;
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regulator-max-microvolt = <1350000>;
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regulator-ramp-delay = <6001>;
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regulator-initial-mode = <0x1>;
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regulator-name = "vdd_logic";
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regulator-state-mem {
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regulator-on-in-suspend;
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regulator-suspend-microvolt = <950000>;
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};
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};
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vdd_arm: DCDC_REG2 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <850000>;
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regulator-max-microvolt = <1350000>;
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regulator-ramp-delay = <6001>;
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regulator-initial-mode = <0x1>;
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regulator-name = "vdd_arm";
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regulator-state-mem {
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regulator-off-in-suspend;
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regulator-suspend-microvolt = <950000>;
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};
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};
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vcc_ddr: DCDC_REG3 {
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regulator-always-on;
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regulator-boot-on;
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regulator-name = "vcc_ddr";
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regulator-initial-mode = <0x1>;
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regulator-state-mem {
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regulator-on-in-suspend;
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};
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};
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vcc_3v0: DCDC_REG4 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <3000000>;
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regulator-max-microvolt = <3000000>;
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regulator-initial-mode = <0x1>;
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regulator-name = "vcc_3v0";
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regulator-state-mem {
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regulator-off-in-suspend;
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regulator-suspend-microvolt = <3000000>;
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};
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};
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vcc_1v0: LDO_REG1 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1000000>;
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regulator-max-microvolt = <1000000>;
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regulator-name = "vcc_1v0";
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regulator-state-mem {
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regulator-on-in-suspend;
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regulator-suspend-microvolt = <1000000>;
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};
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};
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vcc1v8_soc: LDO_REG2 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-name = "vcc1v8_soc";
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regulator-state-mem {
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regulator-on-in-suspend;
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regulator-suspend-microvolt = <1800000>;
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};
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};
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vdd1v0_soc: LDO_REG3 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1000000>;
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regulator-max-microvolt = <1000000>;
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regulator-name = "vcc1v0_soc";
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regulator-state-mem {
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regulator-on-in-suspend;
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regulator-suspend-microvolt = <1000000>;
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};
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};
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vcc3v0_pmu: LDO_REG4 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-name = "vcc3v0_pmu";
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regulator-state-mem {
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regulator-on-in-suspend;
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regulator-suspend-microvolt = <3300000>;
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};
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};
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vccio_sd: LDO_REG5 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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regulator-name = "vccio_sd";
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regulator-state-mem {
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regulator-on-in-suspend;
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regulator-suspend-microvolt = <3300000>;
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};
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};
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vcc_sd: LDO_REG6 {
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-name = "vcc_sd";
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regulator-state-mem {
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regulator-on-in-suspend;
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regulator-suspend-microvolt = <3300000>;
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};
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};
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vcc2v8_dvp: LDO_REG7 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <2800000>;
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regulator-max-microvolt = <2800000>;
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regulator-name = "vcc2v8_dvp";
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regulator-state-mem {
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regulator-off-in-suspend;
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regulator-suspend-microvolt = <2800000>;
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};
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};
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vcc1v8_dvp: LDO_REG8 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-name = "vcc1v8_dvp";
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regulator-state-mem {
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regulator-on-in-suspend;
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regulator-suspend-microvolt = <1800000>;
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};
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};
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vdd1v5_dvp: LDO_REG9 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1500000>;
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regulator-max-microvolt = <1500000>;
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regulator-name = "vdd1v5_dvp";
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regulator-state-mem {
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regulator-off-in-suspend;
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regulator-suspend-microvolt = <1500000>;
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};
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};
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vcc3v3_sys: DCDC_REG5 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-name = "vcc3v3_sys";
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regulator-state-mem {
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regulator-on-in-suspend;
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regulator-suspend-microvolt = <3300000>;
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};
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};
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vcc3v3_lcd: SWITCH_REG1 {
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regulator-boot-on;
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regulator-name = "vcc3v3_lcd";
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};
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vcc5v0_host: SWITCH_REG2 {
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regulator-always-on;
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regulator-boot-on;
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regulator-name = "vcc5v0_host";
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};
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};
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};
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};
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&io_domains {
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vccio1-supply = <&vcc1v8_soc>;
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vccio2-supply = <&vccio_sd>;
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vccio3-supply = <&vcc_3v0>;
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vccio4-supply = <&vcc3v0_pmu>;
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vccio5-supply = <&vcc_3v0>;
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status = "okay";
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};
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&nandc0 {
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status = "okay";
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};
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&pmu_io_domains {
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pmuio1-supply = <&vcc3v0_pmu>;
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pmuio2-supply = <&vcc3v0_pmu>;
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status = "okay";
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};
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&pwm1 {
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status = "okay";
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};
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&saradc {
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vref-supply = <&vcc1v8_soc>;
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status = "okay";
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};
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&sdmmc {
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bus-width = <4>;
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cap-mmc-highspeed;
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cap-sd-highspeed;
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no-sdio;
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no-mmc;
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card-detect-delay = <800>;
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ignore-pm-notify;
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sd-uhs-sdr12;
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sd-uhs-sdr25;
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sd-uhs-sdr50;
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sd-uhs-sdr104;
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vqmmc-supply = <&vccio_sd>;
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vmmc-supply = <&vcc_sd>;
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status = "okay";
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};
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&sdio {
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bus-width = <4>;
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cap-sd-highspeed;
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no-sd;
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no-mmc;
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ignore-pm-notify;
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keep-power-in-suspend;
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non-removable;
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mmc-pwrseq = <&sdio_pwrseq>;
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sd-uhs-sdr104;
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status = "okay";
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};
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&tsadc {
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pinctrl-names = "init", "default";
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pinctrl-0 = <&tsadc_otp_gpio>;
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pinctrl-1 = <&tsadc_otp_out>;
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status = "okay";
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};
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&uart1 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart1_xfer &uart1_cts>;
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status = "okay";
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};
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&u2phy {
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status = "okay";
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u2phy_host: host-port {
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status = "okay";
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};
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u2phy_otg: otg-port {
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status = "okay";
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};
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};
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&usb20_otg {
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status = "okay";
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};
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&usb_host0_ehci {
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status = "okay";
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};
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&usb_host0_ohci {
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status = "okay";
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};
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&vopb {
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status = "okay";
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};
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&vopb_mmu {
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status = "okay";
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};
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&vopl {
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status = "okay";
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};
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&vopl_mmu {
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status = "okay";
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};
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&mpp_srv {
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status = "okay";
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};
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&vdpu {
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status = "okay";
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};
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&vepu {
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status = "okay";
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};
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&vpu_mmu {
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status = "okay";
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};
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&hevc {
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status = "okay";
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};
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&hevc_mmu {
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status = "okay";
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};
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&dsi {
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status = "okay";
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panel@0 {
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compatible = "pvo,p101nwwbp-01g", "simple-panel-dsi";
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reg = <0>;
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power-supply = <&vcc3v3_lcd>;
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backlight = <&backlight>;
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prepare-delay-ms = <20>;
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reset-delay-ms = <20>;
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init-delay-ms = <20>;
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enable-delay-ms = <20>;
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disable-delay-ms = <20>;
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unprepare-delay-ms = <20>;
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width-mm = <135>;
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height-mm = <216>;
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dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
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MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
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dsi,format = <MIPI_DSI_FMT_RGB888>;
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dsi,lanes = <4>;
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panel-init-sequence = [
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15 00 02 E0 00
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15 00 02 E1 93
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15 00 02 E2 65
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15 00 02 E3 F8
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15 00 02 80 03
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15 00 02 E0 04
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15 00 02 2B 2B
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15 00 02 2D 03
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15 00 02 2E 44
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15 00 02 E0 01
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15 00 02 00 00
|
|
15 00 02 01 6D
|
|
15 00 02 0C 74
|
|
15 00 02 17 00
|
|
15 00 02 18 A7
|
|
15 00 02 19 01
|
|
15 00 02 1A 00
|
|
15 00 02 1B A7
|
|
15 00 02 1C 01
|
|
15 00 02 1F 6A
|
|
15 00 02 20 23
|
|
15 00 02 21 23
|
|
15 00 02 22 0E
|
|
15 00 02 35 28
|
|
15 00 02 37 59
|
|
15 00 02 38 05
|
|
15 00 02 39 04
|
|
15 00 02 3A 08
|
|
15 00 02 3B 08
|
|
15 00 02 3C 7C
|
|
15 00 02 3D FF
|
|
15 00 02 3E FF
|
|
15 00 02 3F FF
|
|
15 00 02 40 06
|
|
15 00 02 41 A0
|
|
15 00 02 43 08
|
|
15 00 02 44 0B
|
|
15 00 02 45 88
|
|
15 00 02 4B 04
|
|
15 00 02 55 01
|
|
15 00 02 56 01
|
|
15 00 02 57 8D
|
|
15 00 02 58 0A
|
|
15 00 02 59 0A
|
|
15 00 02 5A 28
|
|
15 00 02 5B 1E
|
|
15 00 02 5C 16
|
|
15 00 02 5D 76
|
|
15 00 02 5E 58
|
|
15 00 02 5F 46
|
|
15 00 02 60 39
|
|
15 00 02 61 37
|
|
15 00 02 62 2A
|
|
15 00 02 63 2F
|
|
15 00 02 64 18
|
|
15 00 02 65 39
|
|
15 00 02 66 38
|
|
15 00 02 67 3A
|
|
15 00 02 68 5A
|
|
15 00 02 69 46
|
|
15 00 02 6A 4C
|
|
15 00 02 6B 3F
|
|
15 00 02 6C 3D
|
|
15 00 02 6D 2F
|
|
15 00 02 6E 1E
|
|
15 00 02 6F 00
|
|
15 00 02 70 76
|
|
15 00 02 71 58
|
|
15 00 02 72 46
|
|
15 00 02 73 39
|
|
15 00 02 74 33
|
|
15 00 02 75 22
|
|
15 00 02 76 27
|
|
15 00 02 77 14
|
|
15 00 02 78 29
|
|
15 00 02 79 2A
|
|
15 00 02 7A 28
|
|
15 00 02 7B 46
|
|
15 00 02 7C 38
|
|
15 00 02 7D 3E
|
|
15 00 02 7E 31
|
|
15 00 02 7F 29
|
|
15 00 02 80 1B
|
|
15 00 02 81 0A
|
|
15 00 02 82 00
|
|
15 00 02 E0 02
|
|
15 00 02 00 44
|
|
15 00 02 01 44
|
|
15 00 02 02 45
|
|
15 00 02 03 45
|
|
15 00 02 04 46
|
|
15 00 02 05 46
|
|
15 00 02 06 47
|
|
15 00 02 07 47
|
|
15 00 02 08 1D
|
|
15 00 02 09 1D
|
|
15 00 02 0A 1D
|
|
15 00 02 0B 1D
|
|
15 00 02 0C 1D
|
|
15 00 02 0D 1D
|
|
15 00 02 0E 1D
|
|
15 00 02 0F 57
|
|
15 00 02 10 57
|
|
15 00 02 11 58
|
|
15 00 02 12 58
|
|
15 00 02 13 40
|
|
15 00 02 14 55
|
|
15 00 02 15 55
|
|
15 00 02 16 44
|
|
15 00 02 17 44
|
|
15 00 02 18 45
|
|
15 00 02 19 45
|
|
15 00 02 1A 46
|
|
15 00 02 1B 46
|
|
15 00 02 1C 47
|
|
15 00 02 1D 47
|
|
15 00 02 1E 1D
|
|
15 00 02 1F 1D
|
|
15 00 02 20 1D
|
|
15 00 02 21 1D
|
|
15 00 02 22 1D
|
|
15 00 02 23 1D
|
|
15 00 02 24 1D
|
|
15 00 02 25 57
|
|
15 00 02 26 57
|
|
15 00 02 27 58
|
|
15 00 02 28 58
|
|
15 00 02 29 40
|
|
15 00 02 2A 55
|
|
15 00 02 2B 55
|
|
15 00 02 58 40
|
|
15 00 02 59 00
|
|
15 00 02 5A 00
|
|
15 00 02 5B 00
|
|
15 00 02 5C 0A
|
|
15 00 02 5D 10
|
|
15 00 02 5E 01
|
|
15 00 02 5F 02
|
|
15 00 02 60 00
|
|
15 00 02 61 01
|
|
15 00 02 62 02
|
|
15 00 02 63 0B
|
|
15 00 02 64 6A
|
|
15 00 02 65 00
|
|
15 00 02 66 00
|
|
15 00 02 67 31
|
|
15 00 02 68 0B
|
|
15 00 02 69 1E
|
|
15 00 02 6A 6A
|
|
15 00 02 6B 04
|
|
15 00 02 6C 00
|
|
15 00 02 6D 04
|
|
15 00 02 6E 00
|
|
15 00 02 6F 88
|
|
15 00 02 70 00
|
|
15 00 02 71 00
|
|
15 00 02 72 06
|
|
15 00 02 73 7B
|
|
15 00 02 74 00
|
|
15 00 02 75 F8
|
|
15 00 02 76 00
|
|
15 00 02 77 0D
|
|
15 00 02 78 14
|
|
15 00 02 79 00
|
|
15 00 02 7A 00
|
|
15 00 02 7B 00
|
|
15 00 02 7C 00
|
|
15 00 02 7D 03
|
|
15 00 02 7E 7B
|
|
15 00 02 E0 00
|
|
15 00 02 E6 02
|
|
15 00 02 E7 06
|
|
15 80 01 11
|
|
15 16 01 29
|
|
];
|
|
|
|
panel-exit-sequence = [
|
|
05 00 01 28
|
|
05 00 01 10
|
|
];
|
|
|
|
display-timings {
|
|
native-mode = <&timing0>;
|
|
|
|
timing0: timing0 {
|
|
clock-frequency = <68500000>;
|
|
hactive = <800>;
|
|
hfront-porch = <16>;
|
|
hsync-len = <16>;
|
|
hback-porch = <48>;
|
|
vactive = <1280>;
|
|
vfront-porch = <8>;
|
|
vsync-len = <4>;
|
|
vback-porch = <4>;
|
|
hsync-active = <0>;
|
|
vsync-active = <0>;
|
|
de-active = <0>;
|
|
pixelclk-active = <0>;
|
|
};
|
|
};
|
|
|
|
ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@0 {
|
|
reg = <0>;
|
|
panel_in_dsi: endpoint {
|
|
remote-endpoint = <&dsi_out_panel>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@1 {
|
|
reg = <1>;
|
|
dsi_out_panel: endpoint {
|
|
remote-endpoint = <&panel_in_dsi>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&dsi_in_vopl {
|
|
status = "disabled";
|
|
};
|
|
|
|
&dsi_in_vopb {
|
|
status = "okay";
|
|
};
|
|
|
|
&route_dsi {
|
|
connect = <&vopb_out_dsi>;
|
|
status = "okay";
|
|
};
|
|
|
|
&pinctrl {
|
|
pmic {
|
|
pmic_int: pmic_int {
|
|
rockchip,pins =
|
|
<0 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
};
|
|
};
|
|
|
|
sdio-pwrseq {
|
|
wifi_enable_h: wifi-enable-h {
|
|
rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&firmware_android {
|
|
compatible = "android,firmware";
|
|
|
|
fstab {
|
|
compatible = "android,fstab";
|
|
|
|
system {
|
|
compatible = "android,system";
|
|
dev = "/dev/block/by-name/system";
|
|
type = "ext4";
|
|
mnt_flags = "ro,barrier=1,inode_readahead_blks=8";
|
|
fsmgr_flags = "wait";
|
|
};
|
|
|
|
vendor {
|
|
compatible = "android,vendor";
|
|
dev = "/dev/block/by-name/vendor";
|
|
type = "ext4";
|
|
mnt_flags = "ro,barrier=1,inode_readahead_blks=8";
|
|
fsmgr_flags = "wait";
|
|
};
|
|
};
|
|
};
|