1106 lines
21 KiB
Plaintext
1106 lines
21 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2022 Rockchip Electronics Co., Ltd
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*
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*/
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/pinctrl/rockchip.h>
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/display/drm_mipi_dsi.h>
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#include "rk3358.dtsi"
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/ {
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adc-keys {
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compatible = "adc-keys";
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io-channels = <&saradc 2>;
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io-channel-names = "buttons";
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poll-interval = <100>;
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keyup-threshold-microvolt = <1800000>;
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vol-down-key {
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linux,code = <KEY_VOLUMEDOWN>;
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label = "volume down";
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press-threshold-microvolt = <300000>;
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};
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vol-up-key {
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linux,code = <KEY_VOLUMEUP>;
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label = "volume up";
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press-threshold-microvolt = <17000>;
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};
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};
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backlight: backlight {
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compatible = "pwm-backlight";
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pwms = <&pwm1 0 25000 0>;
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brightness-levels = <
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0 1 2 3 4 5 6 7
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8 9 10 11 12 13 14 15
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16 17 18 19 20 21 22 23
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24 25 26 27 28 29 30 31
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32 33 34 35 36 37 38 39
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40 41 42 43 44 45 46 47
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48 49 50 51 52 53 54 55
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56 57 58 59 60 61 62 63
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64 65 66 67 68 69 70 71
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72 73 74 75 76 77 78 79
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80 81 82 83 84 85 86 87
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88 89 90 91 92 93 94 95
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96 97 98 99 100 101 102 103
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104 105 106 107 108 109 110 111
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112 113 114 115 116 117 118 119
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120 121 122 123 124 125 126 127
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128 129 130 131 132 133 134 135
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136 137 138 139 140 141 142 143
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144 145 146 147 148 149 150 151
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152 153 154 155 156 157 158 159
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160 161 162 163 164 165 166 167
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168 169 170 171 172 173 174 175
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176 177 178 179 180 181 182 183
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184 185 186 187 188 189 190 191
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192 193 194 195 196 197 198 199
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200 201 202 203 204 205 206 207
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208 209 210 211 212 213 214 215
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216 217 218 219 220 221 222 223
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224 225 226 227 228 229 230 231
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232 233 234 235 236 237 238 239
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240 241 242 243 244 245 246 247
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248 249 250 251 252 253 254 255>;
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default-brightness-level = <200>;
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};
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backlight_2: backlight-2 {
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compatible = "pwm-backlight";
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pwms = <&pwm3 0 10000000 0>;
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pinctrl-names = "default";
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pinctrl-0 = <&lcd0_pwren &lcd0_rst>;
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enable-gpios = <&gpio1 RK_PD6 GPIO_ACTIVE_HIGH>;
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brightness-levels = <
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0 1 2 3 4 5 6 7
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8 9 10 11 12 13 14 15
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16 17 18 19 20 21 22 23
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24 25 26 27 28 29 30 31
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32 33 34 35 36 37 38 39
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40 41 42 43 44 45 46 47
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48 49 50 51 52 53 54 55
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56 57 58 59 60 61 62 63
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64 65 66 67 68 69 70 71
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72 73 74 75 76 77 78 79
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80 81 82 83 84 85 86 87
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88 89 90 91 92 93 94 95
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96 97 98 99 100 101 102 103
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104 105 106 107 108 109 110 111
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112 113 114 115 116 117 118 119
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120 121 122 123 124 125 126 127
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128 129 130 131 132 133 134 135
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136 137 138 139 140 141 142 143
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144 145 146 147 148 149 150 151
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152 153 154 155 156 157 158 159
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160 161 162 163 164 165 166 167
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168 169 170 171 172 173 174 175
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176 177 178 179 180 181 182 183
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184 185 186 187 188 189 190 191
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192 193 194 195 196 197 198 199
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200 201 202 203 204 205 206 207
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208 209 210 211 212 213 214 215
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216 217 218 219 220 221 222 223
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224 225 226 227 228 229 230 231
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232 233 234 235 236 237 238 239
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240 241 242 243 244 245 246 247
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248 249 250 251 252 253 254 255>;
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default-brightness-level = <60>;
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};
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/* The THine 827-Q (rgb to dual lvds) don't need driver */
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panel-rgb {
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compatible = "simple-panel";
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#address-cells = <1>;
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#size-cells = <0>;
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pinctrl-names = "default";
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pinctrl-0 = <&pwdn_rgb>; /* This the pwdn of THine-827-Q */
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power-supply = <&vcc3v3_lcd>;
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backlight = <&backlight_2>;
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enable-gpios = <&gpio1 RK_PD4 GPIO_ACTIVE_HIGH>;
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reset-gpios = <&gpio1 RK_PD7 GPIO_ACTIVE_LOW>;
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prepare-delay-ms = <0>;
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reset-delay-ms = <0>;
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init-delay-ms = <0>;
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enable-delay-ms = <5>;
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disable-delay-ms = <10>;
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unprepare-delay-ms = <0>;
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width-mm = <292>;
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height-mm = <109>;
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bus-format = <MEDIA_BUS_FMT_RGB888_1X24>;
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display-timings {
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native-mode = <&timing1>;
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timing1: timing1 {
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clock-frequency = <88200000>;
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hactive = <1920>;
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vactive = <720>;
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hfront-porch = <40>;
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hsync-len = <20>;
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hback-porch = <24>;
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vfront-porch = <5>;
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vsync-len = <4>;
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vback-porch = <4>;
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hsync-active = <0>;
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vsync-active = <0>;
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de-active = <0>;
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pixelclk-active = <0>;
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};
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};
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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panel_in_rgb: endpoint {
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remote-endpoint = <&rgb_out_panel>;
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};
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};
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};
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};
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rk809-sound {
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compatible = "simple-audio-card";
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simple-audio-card,format = "i2s";
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simple-audio-card,name = "rockchip,rk809-codec";
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simple-audio-card,mclk-fs = <256>;
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simple-audio-card,widgets =
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"Microphone", "Mic Jack",
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"Headphone", "Headphone Jack";
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simple-audio-card,routing =
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"Mic Jack", "MICBIAS1",
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"IN1P", "Mic Jack",
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"Headphone Jack", "HPOL",
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"Headphone Jack", "HPOR";
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simple-audio-card,cpu {
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sound-dai = <&i2s1_2ch>;
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};
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simple-audio-card,codec {
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sound-dai = <&rk809_codec>;
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};
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};
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sdio_pwrseq: sdio-pwrseq {
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compatible = "mmc-pwrseq-simple";
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pinctrl-names = "default";
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pinctrl-0 = <&wifi_enable_h>;
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/*
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* On the module itself this is one of these (depending
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* on the actual card populated):
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* - SDIO_RESET_L_WL_REG_ON
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* - PDN (power down when low)
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*/
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reset-gpios = <&gpio0 RK_PA3 GPIO_ACTIVE_LOW>;
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};
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vcc5v0_sys: vccsys {
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compatible = "regulator-fixed";
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regulator-name = "vcc5v0_sys";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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};
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wireless-wlan {
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compatible = "wlan-platdata";
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wifi_chip_type = "AP6212";
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WIFI,host_wake_irq = <&gpio0 RK_PB2 GPIO_ACTIVE_HIGH>;
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status = "okay";
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};
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wireless-bluetooth {
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compatible = "bluetooth-platdata";
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clocks = <&rk809 1>;
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clock-names = "ext_clock";
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uart_rts_gpios = <&gpio1 RK_PC3 GPIO_ACTIVE_LOW>;
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pinctrl-names = "default","rts_gpio";
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pinctrl-0 = <&uart1_rts>;
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pinctrl-1 = <&uart1_rts_gpio>;
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BT,reset_gpio = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>;
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BT,wake_gpio = <&gpio0 RK_PA1 GPIO_ACTIVE_HIGH>;
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BT,wake_host_irq = <&gpio0 RK_PB3 GPIO_ACTIVE_HIGH>;
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status = "okay";
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};
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};
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&display_subsystem {
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status = "okay";
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};
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&dsi {
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status = "disabled";
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panel@0 {
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compatible = "sitronix,st7703", "simple-panel-dsi";
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reg = <0>;
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pinctrl-names = "default";
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pinctrl-0 = <&mipi_en>;
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enable-gpios = <&gpio1 RK_PB4 GPIO_ACTIVE_HIGH>;
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backlight = <&backlight>;
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prepare-delay-ms = <0>;
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reset-delay-ms = <0>;
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init-delay-ms = <80>;
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enable-delay-ms = <0>;
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disable-delay-ms = <10>;
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unprepare-delay-ms = <60>;
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width-mm = <68>;
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height-mm = <121>;
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dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
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MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
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dsi,format = <MIPI_DSI_FMT_RGB888>;
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dsi,lanes = <4>;
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panel-init-sequence = [
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39 00 04 ff 98 81 03
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15 00 02 01 00
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15 00 02 02 00
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15 00 02 03 53
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15 00 02 04 53
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15 00 02 05 13
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15 00 02 06 04
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15 00 02 07 02
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15 00 02 08 02
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15 00 02 09 00
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15 00 02 0a 00
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15 00 02 0b 00
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15 00 02 0c 00
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15 00 02 0d 00
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15 00 02 0e 00
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15 00 02 0f 00
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15 00 02 10 00
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15 00 02 11 00
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15 00 02 12 00
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15 00 02 13 00
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15 00 02 14 00
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15 00 02 15 08
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15 00 02 16 10
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15 00 02 17 00
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15 00 02 18 08
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15 00 02 19 00
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15 00 02 1a 00
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15 00 02 1b 00
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15 00 02 1c 00
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15 00 02 1d 00
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15 00 02 1e c0
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15 00 02 1f 80
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15 00 02 20 02
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15 00 02 21 09
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15 00 02 22 00
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15 00 02 23 00
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15 00 02 24 00
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15 00 02 25 00
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15 00 02 26 00
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15 00 02 27 00
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15 00 02 28 55
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15 00 02 29 03
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15 00 02 2a 00
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15 00 02 2b 00
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15 00 02 2c 00
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15 00 02 2d 00
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15 00 02 2e 00
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15 00 02 2f 00
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15 00 02 30 00
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15 00 02 31 00
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15 00 02 32 00
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15 00 02 33 00
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15 00 02 34 04
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15 00 02 35 05
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15 00 02 36 05
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15 00 02 37 00
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15 00 02 38 3c
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15 00 02 39 35
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15 00 02 3a 00
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15 00 02 3b 40
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15 00 02 3c 00
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15 00 02 3d 00
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15 00 02 3e 00
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15 00 02 3f 00
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15 00 02 40 00
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15 00 02 41 88
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15 00 02 42 00
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15 00 02 43 00
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15 00 02 44 1f
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15 00 02 50 01
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15 00 02 51 23
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15 00 02 52 45
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15 00 02 53 67
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15 00 02 54 89
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15 00 02 55 ab
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15 00 02 56 01
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15 00 02 57 23
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15 00 02 58 45
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15 00 02 59 67
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15 00 02 5a 89
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15 00 02 5b ab
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15 00 02 5c cd
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15 00 02 5d ef
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15 00 02 5e 03
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15 00 02 5f 14
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15 00 02 60 15
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15 00 02 61 0c
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15 00 02 62 0d
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15 00 02 63 0e
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15 00 02 64 0f
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15 00 02 65 10
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15 00 02 66 11
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15 00 02 67 08
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15 00 02 68 02
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15 00 02 69 0a
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15 00 02 6a 02
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15 00 02 6b 02
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15 00 02 6c 02
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15 00 02 6d 02
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15 00 02 6e 02
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15 00 02 6f 02
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15 00 02 70 02
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15 00 02 71 02
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15 00 02 72 06
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15 00 02 73 02
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15 00 02 74 02
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15 00 02 75 14
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15 00 02 76 15
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15 00 02 77 0f
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15 00 02 78 0e
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15 00 02 79 0d
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15 00 02 7a 0c
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15 00 02 7b 11
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15 00 02 7c 10
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15 00 02 7d 06
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15 00 02 7e 02
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15 00 02 7f 0a
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15 00 02 80 02
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15 00 02 81 02
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15 00 02 82 02
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15 00 02 83 02
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15 00 02 84 02
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15 00 02 85 02
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15 00 02 86 02
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15 00 02 87 02
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15 00 02 88 08
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15 00 02 89 02
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15 00 02 8a 02
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39 00 04 ff 98 81 04
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15 00 02 00 80
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15 00 02 70 00
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15 00 02 71 00
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15 00 02 66 fe
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15 00 02 82 15
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15 00 02 84 15
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15 00 02 85 15
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15 00 02 3a 24
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15 00 02 32 ac
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15 00 02 8c 80
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15 00 02 3c f5
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15 00 02 88 33
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39 00 04 ff 98 81 01
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15 00 02 22 0a
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15 00 02 31 00
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15 00 02 53 78
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15 00 02 50 5b
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15 00 02 51 5b
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15 00 02 60 20
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15 00 02 61 00
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15 00 02 62 0d
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15 00 02 63 00
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15 00 02 a0 00
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15 00 02 a1 10
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15 00 02 a2 1c
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15 00 02 a3 13
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15 00 02 a4 15
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15 00 02 a5 26
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15 00 02 a6 1a
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15 00 02 a7 1d
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15 00 02 a8 67
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15 00 02 a9 1c
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15 00 02 aa 29
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15 00 02 ab 5b
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15 00 02 ac 26
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15 00 02 ad 28
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15 00 02 ae 5c
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15 00 02 af 30
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15 00 02 b0 31
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15 00 02 b1 2e
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15 00 02 b2 32
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15 00 02 b3 00
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15 00 02 c0 00
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15 00 02 c1 10
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15 00 02 c2 1c
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15 00 02 c3 13
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15 00 02 c4 15
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15 00 02 c5 26
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15 00 02 c6 1a
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15 00 02 c7 1d
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15 00 02 c8 67
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15 00 02 c9 1c
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15 00 02 ca 29
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15 00 02 cb 5b
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15 00 02 cc 26
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15 00 02 cd 28
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15 00 02 ce 5c
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15 00 02 cf 30
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15 00 02 d0 31
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15 00 02 d1 2e
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15 00 02 d2 32
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15 00 02 d3 00
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39 00 04 ff 98 81 00
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05 00 01 11
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05 01 01 29
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];
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panel-exit-sequence = [
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05 00 01 28
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05 00 01 10
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];
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display-timings {
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native-mode = <&timing0>;
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timing0: timing0 {
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clock-frequency = <64000000>;
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hactive = <720>;
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vactive = <1280>;
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hfront-porch = <40>;
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hsync-len = <10>;
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hback-porch = <40>;
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vfront-porch = <22>;
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vsync-len = <4>;
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vback-porch = <11>;
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hsync-active = <0>;
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vsync-active = <0>;
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de-active = <0>;
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pixelclk-active = <0>;
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};
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};
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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panel_in_dsi: endpoint {
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remote-endpoint = <&dsi_out_panel>;
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};
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};
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};
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};
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@1 {
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reg = <1>;
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dsi_out_panel: endpoint {
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remote-endpoint = <&panel_in_dsi>;
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};
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};
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};
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};
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&dsi_in_vopb {
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status = "disabled";
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};
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&dsi_in_vopl {
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status = "disabled";
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};
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&route_dsi {
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connect = <&vopb_out_dsi>;
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status = "disabled";
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};
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&rgb {
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status = "okay";
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#address-cells = <1>;
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#size-cells = <0>;
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/delete-property/ phys;
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/delete-property/ phy-names;
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pinctrl-0 = <&lcdc_m0_rgb_pins>;
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pinctrl-1 = <&lcdc_m0_sleep_pins>;
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ports {
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port@1 {
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reg = <1>;
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rgb_out_panel: endpoint {
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remote-endpoint = <&panel_in_rgb>;
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};
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};
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};
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};
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&rgb_in_vopb {
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status = "okay";
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};
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|
|
&rgb_in_vopl {
|
|
status = "disabled";
|
|
};
|
|
|
|
&route_rgb {
|
|
connect = <&vopb_out_rgb>;
|
|
status = "okay";
|
|
};
|
|
|
|
&cpu0 {
|
|
cpu-supply = <&vdd_arm>;
|
|
};
|
|
|
|
&dfi {
|
|
status = "okay";
|
|
};
|
|
|
|
&dmc {
|
|
center-supply = <&vdd_logic>;
|
|
status = "okay";
|
|
};
|
|
|
|
&emmc {
|
|
bus-width = <8>;
|
|
cap-mmc-highspeed;
|
|
mmc-hs200-1_8v;
|
|
supports-emmc;
|
|
disable-wp;
|
|
non-removable;
|
|
num-slots = <1>;
|
|
status = "okay";
|
|
};
|
|
|
|
&gpu {
|
|
mali-supply = <&vdd_logic>;
|
|
status = "okay";
|
|
};
|
|
|
|
&i2c0 {
|
|
status = "okay";
|
|
clock-frequency = <400000>;
|
|
|
|
rk809: pmic@20 {
|
|
compatible = "rockchip,rk809";
|
|
reg = <0x20>;
|
|
interrupt-parent = <&gpio0>;
|
|
interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
|
|
pinctrl-names = "default", "pmic-sleep",
|
|
"pmic-power-off", "pmic-reset";
|
|
pinctrl-0 = <&pmic_int>;
|
|
pinctrl-1 = <&soc_slppin_slp>, <&rk817_slppin_slp>;
|
|
pinctrl-2 = <&soc_slppin_gpio>, <&rk817_slppin_pwrdn>;
|
|
pinctrl-3 = <&soc_slppin_rst>, <&rk817_slppin_rst>;
|
|
rockchip,system-power-controller;
|
|
wakeup-source;
|
|
#clock-cells = <1>;
|
|
clock-output-names = "rk808-clkout1", "rk808-clkout2";
|
|
//fb-inner-reg-idxs = <2>;
|
|
/* 1: rst regs (default in codes), 0: rst the pmic */
|
|
pmic-reset-func = <1>;
|
|
|
|
vcc1-supply = <&vcc5v0_sys>;
|
|
vcc2-supply = <&vcc5v0_sys>;
|
|
vcc3-supply = <&vcc5v0_sys>;
|
|
vcc4-supply = <&vcc5v0_sys>;
|
|
vcc5-supply = <&vcc3v3_sys>;
|
|
vcc6-supply = <&vcc3v3_sys>;
|
|
vcc7-supply = <&vcc3v3_sys>;
|
|
vcc8-supply = <&vcc3v3_sys>;
|
|
vcc9-supply = <&vcc5v0_sys>;
|
|
|
|
pwrkey {
|
|
status = "okay";
|
|
};
|
|
|
|
pinctrl_rk8xx: pinctrl_rk8xx {
|
|
gpio-controller;
|
|
#gpio-cells = <2>;
|
|
|
|
rk817_slppin_null: rk817_slppin_null {
|
|
pins = "gpio_slp";
|
|
function = "pin_fun0";
|
|
};
|
|
|
|
rk817_slppin_slp: rk817_slppin_slp {
|
|
pins = "gpio_slp";
|
|
function = "pin_fun1";
|
|
};
|
|
|
|
rk817_slppin_pwrdn: rk817_slppin_pwrdn {
|
|
pins = "gpio_slp";
|
|
function = "pin_fun2";
|
|
};
|
|
|
|
rk817_slppin_rst: rk817_slppin_rst {
|
|
pins = "gpio_slp";
|
|
function = "pin_fun3";
|
|
};
|
|
};
|
|
|
|
regulators {
|
|
vdd_logic: DCDC_REG1 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <950000>;
|
|
regulator-max-microvolt = <1350000>;
|
|
regulator-ramp-delay = <6001>;
|
|
regulator-initial-mode = <0x2>;
|
|
regulator-name = "vdd_logic";
|
|
regulator-state-mem {
|
|
regulator-on-in-suspend;
|
|
regulator-suspend-microvolt = <950000>;
|
|
};
|
|
};
|
|
|
|
vdd_arm: DCDC_REG2 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <950000>;
|
|
regulator-max-microvolt = <1350000>;
|
|
regulator-ramp-delay = <6001>;
|
|
regulator-initial-mode = <0x2>;
|
|
regulator-name = "vdd_arm";
|
|
regulator-state-mem {
|
|
regulator-off-in-suspend;
|
|
regulator-suspend-microvolt = <950000>;
|
|
};
|
|
};
|
|
|
|
vcc_ddr: DCDC_REG3 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-name = "vcc_ddr";
|
|
regulator-initial-mode = <0x2>;
|
|
regulator-state-mem {
|
|
regulator-on-in-suspend;
|
|
};
|
|
};
|
|
|
|
vcc_3v3: DCDC_REG4 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <3300000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
regulator-initial-mode = <0x2>;
|
|
regulator-name = "vcc_3v3";
|
|
regulator-state-mem {
|
|
regulator-on-in-suspend;
|
|
regulator-suspend-microvolt = <3300000>;
|
|
};
|
|
};
|
|
|
|
vcc_1v0: LDO_REG1 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <1000000>;
|
|
regulator-max-microvolt = <1000000>;
|
|
regulator-name = "vcc_1v0";
|
|
regulator-state-mem {
|
|
regulator-on-in-suspend;
|
|
regulator-suspend-microvolt = <1000000>;
|
|
};
|
|
};
|
|
|
|
vcc_1v8: LDO_REG2 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
|
|
regulator-name = "vcc_1v8";
|
|
regulator-state-mem {
|
|
regulator-on-in-suspend;
|
|
regulator-suspend-microvolt = <1800000>;
|
|
};
|
|
};
|
|
|
|
vdd_1v0: LDO_REG3 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <1000000>;
|
|
regulator-max-microvolt = <1000000>;
|
|
|
|
regulator-name = "vdd_1v0";
|
|
regulator-state-mem {
|
|
regulator-on-in-suspend;
|
|
regulator-suspend-microvolt = <1000000>;
|
|
};
|
|
};
|
|
|
|
vcc3v3_pmu: LDO_REG4 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <3300000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
|
|
regulator-name = "vcc3v3_pmu";
|
|
regulator-state-mem {
|
|
regulator-on-in-suspend;
|
|
regulator-suspend-microvolt = <3000000>;
|
|
|
|
};
|
|
};
|
|
|
|
vccio_sd: LDO_REG5 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
|
|
regulator-name = "vccio_sd";
|
|
regulator-state-mem {
|
|
regulator-on-in-suspend;
|
|
regulator-suspend-microvolt = <3300000>;
|
|
};
|
|
};
|
|
|
|
vcc_sd: LDO_REG6 {
|
|
regulator-min-microvolt = <3300000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
regulator-boot-off;
|
|
|
|
regulator-name = "vcc_sd";
|
|
regulator-state-mem {
|
|
regulator-off-in-suspend;
|
|
regulator-suspend-microvolt = <3300000>;
|
|
|
|
};
|
|
};
|
|
|
|
vcc2v8_dvp: LDO_REG7 {
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <2800000>;
|
|
regulator-max-microvolt = <2800000>;
|
|
|
|
regulator-name = "vcc2v8_dvp";
|
|
regulator-state-mem {
|
|
regulator-off-in-suspend;
|
|
regulator-suspend-microvolt = <2800000>;
|
|
};
|
|
};
|
|
|
|
vcc1v8_dvp: LDO_REG8 {
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
|
|
regulator-name = "vcc1v8_dvp";
|
|
regulator-state-mem {
|
|
regulator-on-in-suspend;
|
|
regulator-suspend-microvolt = <1800000>;
|
|
};
|
|
};
|
|
|
|
vdd1v5_dvp: LDO_REG9 {
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <1500000>;
|
|
regulator-max-microvolt = <1500000>;
|
|
|
|
regulator-name = "vdd1v5_dvp";
|
|
regulator-state-mem {
|
|
regulator-off-in-suspend;
|
|
regulator-suspend-microvolt = <1500000>;
|
|
};
|
|
};
|
|
|
|
vcc3v3_sys: DCDC_REG5 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <3300000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
regulator-name = "vcc3v3_sys";
|
|
regulator-state-mem {
|
|
regulator-on-in-suspend;
|
|
regulator-suspend-microvolt = <3300000>;
|
|
};
|
|
};
|
|
|
|
vcc5v0_host: SWITCH_REG1 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-name = "vcc5v0_host";
|
|
};
|
|
|
|
vcc3v3_lcd: SWITCH_REG2 {
|
|
regulator-boot-on;
|
|
regulator-name = "vcc3v3_lcd";
|
|
};
|
|
};
|
|
|
|
rk809_codec: codec {
|
|
#sound-dai-cells = <0>;
|
|
compatible = "rockchip,rk809-codec", "rockchip,rk817-codec";
|
|
clocks = <&cru SCLK_I2S1_OUT>;
|
|
clock-names = "mclk";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&i2s1_2ch_mclk>;
|
|
hp-volume = <20>;
|
|
spk-volume = <3>;
|
|
status = "okay";
|
|
};
|
|
};
|
|
};
|
|
|
|
&i2c1 {
|
|
status = "okay";
|
|
|
|
clock-frequency = <400000>;
|
|
|
|
/* These are relatively safe rise/fall times; TODO: measure */
|
|
i2c-scl-falling-time-ns = <50>;
|
|
i2c-scl-rising-time-ns = <300>;
|
|
};
|
|
|
|
&i2s1_2ch {
|
|
status = "okay";
|
|
#sound-dai-cells = <0>;
|
|
};
|
|
|
|
&io_domains {
|
|
status = "okay";
|
|
|
|
vccio1-supply = <&vcc_3v3>;
|
|
vccio2-supply = <&vcc_3v3>;
|
|
vccio3-supply = <&vcc_3v3>;
|
|
vccio4-supply = <&vcc3v3_pmu>;
|
|
vccio5-supply = <&vcc_1v8>;
|
|
};
|
|
|
|
&isp_mmu {
|
|
status = "okay";
|
|
};
|
|
|
|
&mipi_dphy_rx0 {
|
|
status = "okay";
|
|
|
|
ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@0 {
|
|
reg = <0>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
mipi_in_ucam: endpoint@1 {
|
|
reg = <1>;
|
|
// remote-endpoint = <&ucam_out>;
|
|
data-lanes = <1 2>;
|
|
};
|
|
};
|
|
|
|
port@1 {
|
|
reg = <1>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
dphy_rx0_out: endpoint@0 {
|
|
reg = <0>;
|
|
remote-endpoint = <&isp0_mipi_in>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&pmu_io_domains {
|
|
status = "okay";
|
|
|
|
pmuio1-supply = <&vcc3v3_pmu>;
|
|
pmuio2-supply = <&vcc3v3_pmu>;
|
|
};
|
|
|
|
&pwm1 {
|
|
status = "okay";
|
|
};
|
|
|
|
&pwm3 {
|
|
status = "okay";
|
|
};
|
|
|
|
&rk_rga {
|
|
status = "okay";
|
|
};
|
|
|
|
&rkisp1 {
|
|
status = "okay";
|
|
|
|
port {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
isp0_mipi_in: endpoint@0 {
|
|
reg = <0>;
|
|
remote-endpoint = <&dphy_rx0_out>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&saradc {
|
|
status = "okay";
|
|
vref-supply = <&vcc_1v8>;
|
|
};
|
|
|
|
&sdio {
|
|
bus-width = <4>;
|
|
cap-sd-highspeed;
|
|
supports-sdio;
|
|
ignore-pm-notify;
|
|
keep-power-in-suspend;
|
|
non-removable;
|
|
mmc-pwrseq = <&sdio_pwrseq>;
|
|
sd-uhs-sdr104;
|
|
status = "okay";
|
|
};
|
|
|
|
&tsadc {
|
|
pinctrl-names = "gpio", "otpout";
|
|
pinctrl-0 = <&tsadc_otp_gpio>;
|
|
pinctrl-1 = <&tsadc_otp_out>;
|
|
status = "okay";
|
|
};
|
|
|
|
&uart1 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&uart1_xfer &uart1_cts>;
|
|
status = "okay";
|
|
};
|
|
|
|
&u2phy {
|
|
status = "okay";
|
|
|
|
u2phy_host: host-port {
|
|
status = "okay";
|
|
phy-supply = <&vcc5v0_host>;
|
|
};
|
|
|
|
u2phy_otg: otg-port {
|
|
status = "okay";
|
|
};
|
|
};
|
|
|
|
&usb20_otg {
|
|
status = "okay";
|
|
};
|
|
|
|
&usb_host0_ehci {
|
|
status = "okay";
|
|
};
|
|
|
|
&usb_host0_ohci {
|
|
status = "okay";
|
|
};
|
|
|
|
&vopb {
|
|
status = "okay";
|
|
};
|
|
|
|
&vopb_mmu {
|
|
status = "okay";
|
|
};
|
|
|
|
&vopl {
|
|
status = "okay";
|
|
};
|
|
|
|
&vopl_mmu {
|
|
status = "okay";
|
|
};
|
|
|
|
&mpp_srv {
|
|
status = "okay";
|
|
};
|
|
|
|
&vdpu {
|
|
status = "okay";
|
|
};
|
|
|
|
&vepu {
|
|
status = "okay";
|
|
};
|
|
|
|
&vpu_mmu {
|
|
status = "okay";
|
|
};
|
|
|
|
&hevc {
|
|
status = "okay";
|
|
};
|
|
|
|
&hevc_mmu {
|
|
status = "okay";
|
|
};
|
|
|
|
&pinctrl {
|
|
lcd {
|
|
lcd0_pwren: lcd0-pwren {
|
|
rockchip,pins = <1 RK_PD6 RK_FUNC_GPIO &pcfg_output_high>;
|
|
};
|
|
lcd0_rst: lcd0-rst {
|
|
rockchip,pins = <1 RK_PD7 RK_FUNC_GPIO &pcfg_output_high>;
|
|
};
|
|
mipi_en: mipi-en {
|
|
rockchip,pins = <2 RK_PB4 RK_FUNC_GPIO &pcfg_output_high>;
|
|
};
|
|
pwdn_rgb: pwdn-rgb {
|
|
rockchip,pins = <1 RK_PD4 RK_FUNC_GPIO &pcfg_output_high>;
|
|
};
|
|
};
|
|
|
|
pmic {
|
|
pmic_int: pmic_int {
|
|
rockchip,pins =
|
|
<0 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
};
|
|
|
|
soc_slppin_gpio: soc_slppin_gpio {
|
|
rockchip,pins =
|
|
<0 RK_PA4 RK_FUNC_GPIO &pcfg_output_low>;
|
|
};
|
|
|
|
soc_slppin_slp: soc_slppin_slp {
|
|
rockchip,pins =
|
|
<0 RK_PA4 1 &pcfg_pull_none>;
|
|
};
|
|
|
|
soc_slppin_rst: soc_slppin_rst {
|
|
rockchip,pins =
|
|
<0 RK_PA4 2 &pcfg_pull_none>;
|
|
};
|
|
};
|
|
|
|
sdio-pwrseq {
|
|
wifi_enable_h: wifi-enable-h {
|
|
rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
};
|
|
};
|
|
};
|