426 lines
7.8 KiB
Plaintext
426 lines
7.8 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
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*/
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/dts-v1/;
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#include "rk3399-evb-ind.dtsi"
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#include "rk3399-android.dtsi"
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/ {
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model = "Rockchip RK3399 EVB IND LPDDR4 Board edp (Android)";
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compatible = "rockchip,android", "rockchip,rk3399-evb-ind-v13-lpddr4-android", "rockchip,rk3399";
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chosen: chosen {
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bootargs = "earlycon=uart8250,mmio32,0xff1a0000 console=ttyFIQ0 init=/init initrd=0x62000001,0x00800000 coherent_pool=1m";
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};
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iram: sram@ff8d0000 {
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compatible = "mmio-sram";
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reg = <0x0 0xff8d0000 0x0 0x20000>;
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};
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hub_reset: hub_reset {
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compatible = "regulator-fixed";
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enable-active-high;
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gpio = <&gpio4 18 GPIO_ACTIVE_HIGH>;
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regulator-name = "hub_reset";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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};
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vcc_lcd: vcc-lcd {
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compatible = "regulator-fixed";
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regulator-name = "vcc_lcd";
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startup-delay-us = <20000>;
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enable-active-high;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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vin-supply = <&vcc5v0_sys>;
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};
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panel: panel {
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compatible = "simple-panel";
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backlight = <&backlight>;
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power-supply = <&vcc_lcd>;
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reset-gpios = <&gpio1 23 GPIO_ACTIVE_LOW>;
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prepare-delay-ms = <20>;
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reset-delay-ms = <20>;
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enable-delay-ms = <20>;
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display-timings {
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native-mode = <&timing0>;
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timing0: timing0 {
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clock-frequency = <200000000>;
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hactive = <1536>;
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vactive = <2048>;
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hfront-porch = <12>;
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hsync-len = <16>;
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hback-porch = <48>;
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vfront-porch = <8>;
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vsync-len = <4>;
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vback-porch = <8>;
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hsync-active = <0>;
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vsync-active = <0>;
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de-active = <0>;
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pixelclk-active = <0>;
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};
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};
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ports {
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panel_in: endpoint {
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remote-endpoint = <&edp_out>;
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};
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};
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};
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test-power {
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status = "okay";
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};
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};
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&backlight {
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enable-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
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};
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&dmac_bus {
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iram = <&iram>;
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rockchip,force-iram;
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};
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&dp_sound {
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status = "disabled";
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};
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&edp {
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status = "okay";
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force-hpd;
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ports {
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port@1 {
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reg = <1>;
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edp_out: endpoint {
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remote-endpoint = <&panel_in>;
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};
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};
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};
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};
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&edp_in_vopl {
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status = "disabled";
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};
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&i2c1 {
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status = "okay";
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sgm3784: sgm3784@30 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "sgmicro,gsm3784";
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reg = <0x30>;
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rockchip,camera-module-index = <0>;
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rockchip,camera-module-facing = "back";
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//enable-gpio = <&gpio2 RK_PB4 GPIO_ACTIVE_HIGH>;
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//strobe-gpio = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>;
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status = "okay";
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sgm3784_led0: led@0 {
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reg = <0x0>;
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led-max-microamp = <299200>;
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flash-max-microamp = <1122000>;
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flash-max-timeout-us = <1600000>;
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};
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sgm3784_led1: led@1 {
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reg = <0x1>;
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led-max-microamp = <299200>;
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flash-max-microamp = <1122000>;
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flash-max-timeout-us = <1600000>;
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};
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};
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vm149c: vm149c@0c {
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compatible = "silicon touch,vm149c";
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status = "okay";
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reg = <0x0c>;
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rockchip,camera-module-index = <0>;
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rockchip,camera-module-facing = "back";
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};
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gc2145: gc2145@3c{
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status = "okay";
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compatible = "galaxycore,gc2145";
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reg = <0x3c>;
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pinctrl-names = "rockchip,camera_default";
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pinctrl-0 = <&cif_clkout>;
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clocks = <&cru SCLK_CIF_OUT>;
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clock-names = "xvclk";
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/* avdd-supply = <>; */
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/* dvdd-supply = <>; */
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/* dovdd-supply = <>; */
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power-gpios = <&gpio4 26 GPIO_ACTIVE_HIGH>;
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pwdn-gpios = <&gpio2 12 GPIO_ACTIVE_HIGH>;
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rockchip,camera-module-index = <1>;
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rockchip,camera-module-facing = "front";
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rockchip,camera-module-name = "CameraKing";
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rockchip,camera-module-lens-name = "Largan";
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port {
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gc2145_out: endpoint {
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remote-endpoint = <&dvp_in_fcam>;
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};
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};
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};
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ov13850: ov13850@10 {
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compatible = "ovti,ov13850";
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status = "okay";
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reg = <0x10>;
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clocks = <&cru SCLK_CIF_OUT>;
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clock-names = "xvclk";
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/* avdd-supply = <>; */
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/* dvdd-supply = <>; */
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/* dovdd-supply = <>; */
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/* reset-gpios = <>; */
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reset-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
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pwdn-gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "rockchip,camera_default";
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pinctrl-0 = <&cif_clkout>;
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rockchip,camera-module-index = <0>;
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rockchip,camera-module-facing = "back";
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rockchip,camera-module-name = "CMK-CT0116";
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rockchip,camera-module-lens-name = "Largan-50013A1";
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lens-focus = <&vm149c>;
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flash-leds = <&sgm3784_led0 &sgm3784_led1>;
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port {
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ucam_out0: endpoint {
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remote-endpoint = <&mipi_in_ucam0>;
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//remote-endpoint = <&mipi_in_ucam1>;
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data-lanes = <1 2>;
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};
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};
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};
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ov4689: ov4689@36 {
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compatible = "ovti,ov4689";
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status = "disabled";
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reg = <0x36>;
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clocks = <&cru SCLK_CIF_OUT>;
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clock-names = "xvclk";
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/* avdd-supply = <>; */
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/* dvdd-supply = <>; */
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/* dovdd-supply = <>; */
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/* reset-gpios = <>; */
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reset-gpios = <&gpio2 10 GPIO_ACTIVE_HIGH>;
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pwdn-gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "rockchip,camera_default";
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pinctrl-0 = <&cif_clkout>;
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rockchip,camera-module-index = <1>;
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rockchip,camera-module-facing = "front";
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rockchip,camera-module-name = "JSD3425-C1";
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rockchip,camera-module-lens-name = "JSD3425-C1";
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port {
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ucam_out1: endpoint {
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//remote-endpoint = <&mipi_in_ucam0>;
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remote-endpoint = <&mipi_in_ucam1>;
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data-lanes = <1 2>;
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};
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};
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};
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};
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&i2s2 {
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#sound-dai-cells = <0>;
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status = "okay";
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};
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&isp0_mmu {
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status = "okay";
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};
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&isp1_mmu {
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status = "okay";
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};
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&mipi_dphy_rx0 {
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status = "okay";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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mipi_in_ucam0: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&ucam_out0>;
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data-lanes = <1 2>;
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};
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};
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port@1 {
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reg = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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dphy_rx0_out: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&isp0_mipi_in>;
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};
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};
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};
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};
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&mipi_dphy_tx1rx1 {
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status = "okay";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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mipi_in_ucam1: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&ucam_out1>;
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data-lanes = <1 2>;
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};
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};
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port@1 {
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reg = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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dphy_tx1rx1_out: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&isp1_mipi_in>;
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};
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};
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};
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};
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&hdmi_sound {
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status = "okay";
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};
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&route_edp {
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status = "okay";
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};
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&route_hdmi {
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status = "okay";
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connect = <&vopl_out_hdmi>;
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};
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&i2s1 {
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#sound-dai-cells = <0>;
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status = "okay";
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};
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&rk809_sound {
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status = "okay";
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};
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&hdmi_in_vopb {
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status = "disabled";
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};
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&rkisp1_0 {
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status = "okay";
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port {
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#address-cells = <1>;
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#size-cells = <0>;
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isp0_mipi_in: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&dphy_rx0_out>;
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};
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};
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};
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&rkisp1_1 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&cif_clkout &isp_dvp_d0d7>;
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port {
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#address-cells = <1>;
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#size-cells = <0>;
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isp1_mipi_in: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&dphy_tx1rx1_out>;
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};
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dvp_in_fcam: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&gc2145_out>;
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};
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};
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};
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&vcca_0v9 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <900000>;
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regulator-max-microvolt = <900000>;
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regulator-name = "vcca_0v9";
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regulator-state-mem {
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regulator-on-in-suspend;
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regulator-suspend-microvolt = <900000>;
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};
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};
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&vcc0v9_soc {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <900000>;
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regulator-max-microvolt = <900000>;
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regulator-name = "vcc0v9_soc";
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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/*
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* if enable dp_sound, should disable spdif_sound and spdif_out
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*/
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&spdif_out {
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status = "disabled";
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};
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&spdif_sound {
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status = "disabled";
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};
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&i2s0 {
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#sound-dai-cells = <0>;
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status = "disabled";
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};
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&tc358749x_sound {
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status = "disabled";
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};
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&pinctrl {
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lcd-panel {
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lcd_panel_reset: lcd-panel-reset {
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rockchip,pins = <1 RK_PC7 RK_FUNC_GPIO &pcfg_pull_up>;
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};
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};
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};
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