1040 lines
22 KiB
Plaintext
1040 lines
22 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2022 Rockchip Electronics Co., Ltd.
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*
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*/
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/dts-v1/;
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#include "dt-bindings/pwm/pwm.h"
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#include "rk3399.dtsi"
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#include "rk3399-opp.dtsi"
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#include "rk3399-linux.dtsi"
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#include <dt-bindings/input/input.h>
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/ {
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model = "Rockchip RK3399 Firefly Board (Linux Opensource)";
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compatible = "rockchip,rk3399-firefly-linux", "rockchip,rk3399";
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backlight: backlight {
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status = "disabled";
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compatible = "pwm-backlight";
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pwms = <&pwm0 0 25000 0>;
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brightness-levels = <
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0 1 2 3 4 5 6 7
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8 9 10 11 12 13 14 15
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16 17 18 19 20 21 22 23
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24 25 26 27 28 29 30 31
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32 33 34 35 36 37 38 39
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40 41 42 43 44 45 46 47
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48 49 50 51 52 53 54 55
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56 57 58 59 60 61 62 63
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64 65 66 67 68 69 70 71
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72 73 74 75 76 77 78 79
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80 81 82 83 84 85 86 87
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88 89 90 91 92 93 94 95
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96 97 98 99 100 101 102 103
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104 105 106 107 108 109 110 111
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112 113 114 115 116 117 118 119
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120 121 122 123 124 125 126 127
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128 129 130 131 132 133 134 135
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136 137 138 139 140 141 142 143
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144 145 146 147 148 149 150 151
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152 153 154 155 156 157 158 159
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160 161 162 163 164 165 166 167
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168 169 170 171 172 173 174 175
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176 177 178 179 180 181 182 183
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184 185 186 187 188 189 190 191
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192 193 194 195 196 197 198 199
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200 201 202 203 204 205 206 207
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208 209 210 211 212 213 214 215
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216 217 218 219 220 221 222 223
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224 225 226 227 228 229 230 231
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232 233 234 235 236 237 238 239
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240 241 242 243 244 245 246 247
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248 249 250 251 252 253 254 255>;
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default-brightness-level = <200>;
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};
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clkin_gmac: external-gmac-clock {
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compatible = "fixed-clock";
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clock-frequency = <125000000>;
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clock-output-names = "clkin_gmac";
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#clock-cells = <0>;
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};
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dw_hdmi_audio: dw-hdmi-audio {
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status = "disabled";
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compatible = "rockchip,dw-hdmi-audio";
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#sound-dai-cells = <0>;
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};
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edp_panel: edp-panel {
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status = "disabled";
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compatible = "sharp,lcd-f402", "panel-simple";
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backlight = <&backlight>;
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power-supply = <&vcc_lcd>;
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enable-gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&lcd_panel_reset>;
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ports {
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panel_in_edp: endpoint {
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remote-endpoint = <&edp_out_panel>;
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};
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};
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};
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gpio-keys {
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compatible = "gpio-keys";
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#address-cells = <1>;
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#size-cells = <0>;
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autorepeat;
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pinctrl-names = "default";
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pinctrl-0 = <&pwrbtn>;
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button@0 {
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gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_POWER>;
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label = "GPIO Key Power";
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linux,input-type = <1>;
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gpio-key,wakeup = <1>;
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debounce-interval = <100>;
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};
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};
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rt5640-sound {
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compatible = "simple-audio-card";
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simple-audio-card,format = "i2s";
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simple-audio-card,name = "rockchip,rt5640-codec";
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simple-audio-card,mclk-fs = <256>;
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simple-audio-card,widgets =
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"Microphone", "Mic Jack",
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"Headphone", "Headphone Jack";
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simple-audio-card,routing =
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"Mic Jack", "MICBIAS1",
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"IN1P", "Mic Jack",
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"Headphone Jack", "HPOL",
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"Headphone Jack", "HPOR";
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simple-audio-card,cpu {
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sound-dai = <&i2s1>;
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};
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simple-audio-card,codec {
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sound-dai = <&rt5640>;
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};
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};
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hdmi_sound: hdmi-sound {
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status = "disabled";
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compatible = "simple-audio-card";
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simple-audio-card,format = "i2s";
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simple-audio-card,mclk-fs = <256>;
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simple-audio-card,name = "rockchip,hdmi";
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simple-audio-card,cpu {
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sound-dai = <&i2s2>;
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};
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simple-audio-card,codec {
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sound-dai = <&dw_hdmi_audio>;
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};
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};
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hdmi_codec: hdmi-codec {
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compatible = "simple-audio-card";
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simple-audio-card,format = "i2s";
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simple-audio-card,mclk-fs = <256>;
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simple-audio-card,name = "HDMI-CODEC";
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simple-audio-card,cpu {
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sound-dai = <&i2s2>;
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};
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simple-audio-card,codec {
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sound-dai = <&hdmi>;
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};
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};
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spdif-sound {
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status = "okay";
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compatible = "simple-audio-card";
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simple-audio-card,name = "ROCKCHIP,SPDIF";
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simple-audio-card,mclk-fs = <128>;
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simple-audio-card,cpu {
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sound-dai = <&spdif>;
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};
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simple-audio-card,codec {
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sound-dai = <&spdif_out>;
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};
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};
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spdif_out: spdif-out {
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status = "okay";
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compatible = "linux,spdif-dit";
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#sound-dai-cells = <0>;
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};
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sdio_pwrseq: sdio-pwrseq {
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compatible = "mmc-pwrseq-simple";
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clocks = <&rk808 1>;
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clock-names = "ext_clock";
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pinctrl-names = "default";
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pinctrl-0 = <&wifi_enable_h>;
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/*
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* On the module itself this is one of these (depending
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* on the actual card populated):
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* - SDIO_RESET_L_WL_REG_ON
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* - PDN (power down when low)
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*/
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reset-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; /* GPIO0_B2 */
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};
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vcc3v3_pcie: vcc3v3-pcie-regulator {
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compatible = "regulator-fixed";
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enable-active-high;
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regulator-always-on;
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regulator-boot-on;
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gpio = <&gpio1 17 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&pcie_drv>;
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regulator-name = "vcc3v3_pcie";
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};
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vcc3v3_sys: vcc3v3-sys {
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compatible = "regulator-fixed";
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regulator-name = "vcc3v3_sys";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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};
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vcc5v0_host: vcc5v0-host-regulator {
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compatible = "regulator-fixed";
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enable-active-high;
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gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&host_vbus_drv>;
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regulator-name = "vcc5v0_host";
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regulator-always-on;
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};
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vcc5v0_sys: vcc5v0-sys {
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compatible = "regulator-fixed";
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regulator-name = "vcc5v0_sys";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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};
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vcc_phy: vcc-phy-regulator {
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compatible = "regulator-fixed";
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regulator-name = "vcc_phy";
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regulator-always-on;
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regulator-boot-on;
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};
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vdd_log: vdd-log {
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compatible = "pwm-regulator";
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pwms = <&pwm2 0 25000 1>;
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regulator-name = "vdd_log";
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regulator-min-microvolt = <800000>;
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/*
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* the firefly hardware using 3.0 v as APIO2_VDD
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* voltage, but the pwm divider resistance is designed
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* based on hardware which the APIO2_VDD is 1.8v, so we
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* need to change the regulator-max-microvolt from 1.4v
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* to 1.0v, so the pwm can output 0.9v voltage.
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*/
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regulator-max-microvolt = <1000000>;
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regulator-always-on;
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regulator-boot-on;
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/* for rockchip boot on */
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rockchip,pwm_id= <2>;
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rockchip,pwm_voltage = <900000>;
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};
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vccadc_ref: vccadc-ref {
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compatible = "regulator-fixed";
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regulator-name = "vcc1v8_sys";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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};
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vcc_lcd: vcc-lcd-regulator {
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compatible = "regulator-fixed";
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regulator-always-on;
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regulator-boot-on;
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enable-active-high;
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gpio = <&gpio1 1 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&lcd_en>;
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regulator-name = "vcc_lcd";
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};
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xin32k: xin32k {
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compatible = "fixed-clock";
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clock-frequency = <32768>;
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clock-output-names = "xin32k";
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#clock-cells = <0>;
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};
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wireless-wlan {
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compatible = "wlan-platdata";
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rockchip,grf = <&grf>;
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wifi_chip_type = "ap6354";
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sdio_vref = <1800>;
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WIFI,host_wake_irq = <&gpio0 3 GPIO_ACTIVE_HIGH>; /* GPIO0_a3 */
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status = "okay";
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};
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wireless-bluetooth {
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compatible = "bluetooth-platdata";
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//wifi-bt-power-toggle;
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uart_rts_gpios = <&gpio2 19 GPIO_ACTIVE_LOW>; /* GPIO2_C3 */
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pinctrl-names = "default", "rts_gpio";
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pinctrl-0 = <&uart0_rts>;
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pinctrl-1 = <&uart0_gpios>;
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//BT,power_gpio = <&gpio3 19 GPIO_ACTIVE_HIGH>; /* GPIOx_xx */
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BT,reset_gpio = <&gpio0 9 GPIO_ACTIVE_HIGH>; /* GPIO0_B1 */
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BT,wake_gpio = <&gpio2 26 GPIO_ACTIVE_HIGH>; /* GPIO2_D2 */
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BT,wake_host_irq = <&gpio0 4 GPIO_ACTIVE_HIGH>; /* GPIO0_A4 */
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status = "okay";
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};
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};
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&cpu_l0 {
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cpu-supply = <&vdd_cpu_l>;
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};
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&cpu_l1 {
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cpu-supply = <&vdd_cpu_l>;
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};
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&cpu_l2 {
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cpu-supply = <&vdd_cpu_l>;
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};
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&cpu_l3 {
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cpu-supply = <&vdd_cpu_l>;
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};
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&cpu_b0 {
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cpu-supply = <&vdd_cpu_b>;
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};
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&cpu_b1 {
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cpu-supply = <&vdd_cpu_b>;
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};
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&display_subsystem {
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status = "okay";
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};
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&edp {
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status = "disabled";
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ports {
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edp_out: port@1 {
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reg = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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edp_out_panel: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&panel_in_edp>;
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};
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};
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};
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};
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&emmc_phy {
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status = "okay";
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};
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&gmac {
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phy-supply = <&vcc_phy>;
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phy-mode = "rgmii";
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clock_in_out = "input";
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snps,reset-gpio = <&gpio3 15 GPIO_ACTIVE_LOW>;
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snps,reset-active-low;
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snps,reset-delays-us = <0 10000 50000>;
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assigned-clocks = <&cru SCLK_RMII_SRC>;
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assigned-clock-parents = <&clkin_gmac>;
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pinctrl-names = "default";
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pinctrl-0 = <&rgmii_pins>;
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tx_delay = <0x28>;
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rx_delay = <0x11>;
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status = "okay";
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};
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&gpu {
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status = "okay";
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mali-supply = <&vdd_gpu>;
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};
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&hdmi {
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#address-cells = <1>;
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#size-cells = <0>;
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#sound-dai-cells = <0>;
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status = "okay";
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};
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&i2c0 {
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status = "okay";
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i2c-scl-rising-time-ns = <168>;
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i2c-scl-falling-time-ns = <4>;
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clock-frequency = <400000>;
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vdd_cpu_b: syr827@40 {
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compatible = "silergy,syr827";
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reg = <0x40>;
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vin-supply = <&vcc5v0_sys>;
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regulator-compatible = "fan53555-reg";
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regulator-name = "vdd_cpu_b";
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regulator-min-microvolt = <712500>;
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regulator-max-microvolt = <1500000>;
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regulator-ramp-delay = <1000>;
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vsel-gpios = <&gpio1 18 GPIO_ACTIVE_HIGH>;
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fcs,suspend-voltage-selector = <1>;
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regulator-always-on;
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regulator-boot-on;
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regulator-initial-state = <3>;
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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vdd_gpu: syr828@41 {
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compatible = "silergy,syr828";
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reg = <0x41>;
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vin-supply = <&vcc5v0_sys>;
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regulator-compatible = "fan53555-reg";
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regulator-name = "vdd_gpu";
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regulator-min-microvolt = <712500>;
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regulator-max-microvolt = <1500000>;
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regulator-ramp-delay = <1000>;
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fcs,suspend-voltage-selector = <1>;
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regulator-always-on;
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regulator-boot-on;
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regulator-initial-state = <3>;
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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rk808: pmic@1b {
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compatible = "rockchip,rk808";
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reg = <0x1b>;
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interrupt-parent = <&gpio1>;
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interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
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pinctrl-names = "default";
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pinctrl-0 = <&pmic_int_l &pmic_dvs2>;
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rockchip,system-power-controller;
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wakeup-source;
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#clock-cells = <1>;
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clock-output-names = "rk808-clkout1", "rk808-clkout2";
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vcc1-supply = <&vcc3v3_sys>;
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vcc2-supply = <&vcc3v3_sys>;
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vcc3-supply = <&vcc3v3_sys>;
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vcc4-supply = <&vcc3v3_sys>;
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vcc6-supply = <&vcc3v3_sys>;
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vcc7-supply = <&vcc3v3_sys>;
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vcc8-supply = <&vcc3v3_sys>;
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vcc9-supply = <&vcc3v3_sys>;
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vcc10-supply = <&vcc3v3_sys>;
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vcc11-supply = <&vcc3v3_sys>;
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vcc12-supply = <&vcc3v3_sys>;
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vddio-supply = <&vcc1v8_pmu>;
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regulators {
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vdd_center: DCDC_REG1 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <750000>;
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regulator-max-microvolt = <1350000>;
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regulator-ramp-delay = <6001>;
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regulator-name = "vdd_center";
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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vdd_cpu_l: DCDC_REG2 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <750000>;
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regulator-max-microvolt = <1350000>;
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regulator-ramp-delay = <6001>;
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regulator-name = "vdd_cpu_l";
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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vcc_ddr: DCDC_REG3 {
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regulator-always-on;
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regulator-boot-on;
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regulator-name = "vcc_ddr";
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regulator-state-mem {
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regulator-on-in-suspend;
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};
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};
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vcc_1v8: DCDC_REG4 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-name = "vcc_1v8";
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regulator-state-mem {
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regulator-on-in-suspend;
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regulator-suspend-microvolt = <1800000>;
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};
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};
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vcc1v8_dvp: LDO_REG1 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-name = "vcc1v8_dvp";
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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|
|
vcc3v0_tp: LDO_REG2 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <3000000>;
|
|
regulator-max-microvolt = <3000000>;
|
|
regulator-name = "vcc3v0_tp";
|
|
regulator-state-mem {
|
|
regulator-off-in-suspend;
|
|
};
|
|
};
|
|
|
|
vcc1v8_pmu: LDO_REG3 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
regulator-name = "vcc1v8_pmu";
|
|
regulator-state-mem {
|
|
regulator-on-in-suspend;
|
|
regulator-suspend-microvolt = <1800000>;
|
|
};
|
|
};
|
|
|
|
vcc_sd: LDO_REG4 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <3000000>;
|
|
regulator-name = "vcc_sd";
|
|
regulator-state-mem {
|
|
regulator-on-in-suspend;
|
|
regulator-suspend-microvolt = <3000000>;
|
|
};
|
|
};
|
|
|
|
vcca3v0_codec: LDO_REG5 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <3000000>;
|
|
regulator-max-microvolt = <3000000>;
|
|
regulator-name = "vcca3v0_codec";
|
|
regulator-state-mem {
|
|
regulator-off-in-suspend;
|
|
};
|
|
};
|
|
|
|
vcc_1v5: LDO_REG6 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <1500000>;
|
|
regulator-max-microvolt = <1500000>;
|
|
regulator-name = "vcc_1v5";
|
|
regulator-state-mem {
|
|
regulator-on-in-suspend;
|
|
regulator-suspend-microvolt = <1500000>;
|
|
};
|
|
};
|
|
|
|
vcca1v8_codec: LDO_REG7 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
regulator-name = "vcca1v8_codec";
|
|
regulator-state-mem {
|
|
regulator-off-in-suspend;
|
|
};
|
|
};
|
|
|
|
vcc_3v0: LDO_REG8 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <3000000>;
|
|
regulator-max-microvolt = <3000000>;
|
|
regulator-name = "vcc_3v0";
|
|
regulator-state-mem {
|
|
regulator-on-in-suspend;
|
|
regulator-suspend-microvolt = <3000000>;
|
|
};
|
|
};
|
|
|
|
vcc3v3_s3: SWITCH_REG1 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-name = "vcc3v3_s3";
|
|
regulator-state-mem {
|
|
regulator-off-in-suspend;
|
|
};
|
|
};
|
|
|
|
vcc3v3_s0: SWITCH_REG2 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-name = "vcc3v3_s0";
|
|
regulator-state-mem {
|
|
regulator-off-in-suspend;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&i2c1 {
|
|
status = "okay";
|
|
i2c-scl-rising-time-ns = <300>;
|
|
i2c-scl-falling-time-ns = <15>;
|
|
|
|
rt5640: rt5640@1c {
|
|
#sound-dai-cells = <0>;
|
|
compatible = "realtek,rt5640";
|
|
reg = <0x1c>;
|
|
clocks = <&cru SCLK_I2S_8CH_OUT>;
|
|
clock-names = "mclk";
|
|
realtek,in1-differential;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&rt5640_hpcon &i2s_8ch_mclk>;
|
|
hp-con-gpio = <&gpio4 21 GPIO_ACTIVE_HIGH>;
|
|
//hp-det-gpio = <&gpio4 28 GPIO_ACTIVE_LOW>;
|
|
io-channels = <&saradc 4>;
|
|
hp-det-adc-value = <500>;
|
|
};
|
|
|
|
camera0: ov13850@10 {
|
|
status = "okay";
|
|
compatible = "omnivision,ov13850-v4l2-i2c-subdev";
|
|
reg = < 0x10 >;
|
|
device_type = "v4l2-i2c-subdev";
|
|
|
|
clocks = <&cru SCLK_CIF_OUT>;
|
|
clock-names = "clk_cif_out";
|
|
|
|
pinctrl-names = "rockchip,camera_default", "rockchip,camera_sleep";
|
|
pinctrl-0 = <&cam0_default_pins>;
|
|
pinctrl-1 = <&cam0_sleep_pins>;
|
|
|
|
rockchip,pd-gpio = <&gpio2 12 GPIO_ACTIVE_LOW>;
|
|
rockchip,pwr-gpio = <&gpio1 23 GPIO_ACTIVE_HIGH>;
|
|
rockchip,pwr-2nd-gpio = <&gpio1 22 GPIO_ACTIVE_HIGH>;
|
|
rockchip,rst-gpio = <&gpio0 8 GPIO_ACTIVE_LOW>;
|
|
|
|
rockchip,camera-module-mclk-name = "clk_cif_out";
|
|
rockchip,camera-module-facing = "back";
|
|
rockchip,camera-module-name = "cmk-cb0695-fv1";
|
|
rockchip,camera-module-len-name = "lg9569a2";
|
|
rockchip,camera-module-fov-h = "66.0";
|
|
rockchip,camera-module-fov-v = "50.1";
|
|
rockchip,camera-module-orientation = <0>;
|
|
rockchip,camera-module-iq-flip = <0>;
|
|
rockchip,camera-module-iq-mirror = <0>;
|
|
rockchip,camera-module-flip = <1>;
|
|
rockchip,camera-module-mirror = <0>;
|
|
|
|
rockchip,camera-module-defrect0 = <2112 1568 0 0 2112 1568>;
|
|
rockchip,camera-module-defrect1 = <4224 3136 0 0 4224 3136>;
|
|
rockchip,camera-module-defrect3 = <3264 2448 0 0 3264 2448>;
|
|
rockchip,camera-module-flash-support = <0>;
|
|
rockchip,camera-module-mipi-dphy-index = <0>;
|
|
};
|
|
};
|
|
|
|
&i2c3 {
|
|
status = "okay";
|
|
i2c-scl-rising-time-ns = <450>;
|
|
i2c-scl-falling-time-ns = <15>;
|
|
};
|
|
|
|
&i2c4 {
|
|
status = "okay";
|
|
i2c-scl-rising-time-ns = <600>;
|
|
i2c-scl-falling-time-ns = <20>;
|
|
|
|
fusb0: fusb30x@22 {
|
|
compatible = "fairchild,fusb302";
|
|
reg = <0x22>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&fusb0_int>;
|
|
int-n-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
|
|
vbus-5v-gpios = <&gpio2 0 GPIO_ACTIVE_HIGH>;
|
|
status = "okay";
|
|
};
|
|
|
|
gsl3680: gsl3680@41 {
|
|
status = "disabled";
|
|
compatible = "gslX680-pad";
|
|
reg = <0x41>;
|
|
screen_max_x = <1536>;
|
|
screen_max_y = <2048>;
|
|
touch-gpio = <&gpio1 20 IRQ_TYPE_LEVEL_LOW>;
|
|
reset-gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>;
|
|
};
|
|
|
|
mpu6050: mpu@68 {
|
|
status = "disabled";
|
|
compatible = "invensense,mpu6050";
|
|
reg = <0x68>;
|
|
mpu-int_config = <0x10>;
|
|
mpu-level_shifter = <0>;
|
|
mpu-orientation = <0 1 0 1 0 0 0 0 1>;
|
|
orientation-x= <1>;
|
|
orientation-y= <1>;
|
|
orientation-z= <1>;
|
|
irq-gpio = <&gpio1 4 IRQ_TYPE_LEVEL_LOW>;
|
|
mpu-debug = <1>;
|
|
};
|
|
};
|
|
|
|
&i2s0 {
|
|
status = "okay";
|
|
rockchip,i2s-broken-burst-len;
|
|
rockchip,playback-channels = <8>;
|
|
rockchip,capture-channels = <8>;
|
|
#sound-dai-cells = <0>;
|
|
};
|
|
|
|
&i2s1 {
|
|
status = "okay";
|
|
rockchip,i2s-broken-burst-len;
|
|
rockchip,playback-channels = <2>;
|
|
rockchip,capture-channels = <2>;
|
|
#sound-dai-cells = <0>;
|
|
};
|
|
|
|
&i2s2 {
|
|
#sound-dai-cells = <0>;
|
|
status = "okay";
|
|
};
|
|
|
|
&io_domains {
|
|
status = "okay";
|
|
|
|
bt656-supply = <&vcc1v8_dvp>; /* bt656_gpio2ab_ms */
|
|
audio-supply = <&vcca1v8_codec>; /* audio_gpio3d4a_ms */
|
|
sdmmc-supply = <&vcc_sd>; /* sdmmc_gpio4b_ms */
|
|
gpio1830-supply = <&vcc_3v0>; /* gpio1833_gpio4cd_ms */
|
|
};
|
|
|
|
&pcie_phy {
|
|
status = "okay";
|
|
};
|
|
|
|
&pcie0 {
|
|
ep-gpios = <&gpio4 25 GPIO_ACTIVE_HIGH>;
|
|
num-lanes = <4>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pcie_clkreqn_cpm>;
|
|
status = "okay";
|
|
};
|
|
|
|
&pmu_io_domains {
|
|
status = "okay";
|
|
pmu1830-supply = <&vcc_3v0>;
|
|
};
|
|
|
|
&pinctrl {
|
|
buttons {
|
|
pwrbtn: pwrbtn {
|
|
rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
};
|
|
};
|
|
|
|
lcd-panel {
|
|
lcd_panel_reset: lcd-panel-reset {
|
|
rockchip,pins = <4 RK_PD5 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
};
|
|
|
|
lcd_en: lcd-en {
|
|
rockchip,pins = <1 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
};
|
|
};
|
|
|
|
pcie {
|
|
pcie_drv: pcie-drv {
|
|
rockchip,pins =
|
|
<1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
};
|
|
pcie_3g_drv: pcie-3g-drv {
|
|
rockchip,pins =
|
|
<0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
};
|
|
};
|
|
|
|
pmic {
|
|
vsel1_gpio: vsel1-gpio {
|
|
rockchip,pins =
|
|
<1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
|
|
};
|
|
|
|
vsel2_gpio: vsel2-gpio {
|
|
rockchip,pins =
|
|
<1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
|
|
};
|
|
};
|
|
|
|
sdio-pwrseq {
|
|
wifi_enable_h: wifi-enable-h {
|
|
rockchip,pins =
|
|
<0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
};
|
|
};
|
|
|
|
wireless-bluetooth {
|
|
uart0_gpios: uart0-gpios {
|
|
rockchip,pins =
|
|
<2 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
};
|
|
};
|
|
|
|
rt5640 {
|
|
rt5640_hpcon: rt5640-hpcon {
|
|
rockchip,pins = <4 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
};
|
|
};
|
|
|
|
pmic {
|
|
pmic_int_l: pmic-int-l {
|
|
rockchip,pins =
|
|
<1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
};
|
|
|
|
pmic_dvs2: pmic-dvs2 {
|
|
rockchip,pins =
|
|
<1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
|
|
};
|
|
};
|
|
|
|
usb2 {
|
|
host_vbus_drv: host-vbus-drv {
|
|
rockchip,pins =
|
|
<4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
};
|
|
};
|
|
|
|
fusb30x {
|
|
fusb0_int: fusb0-int {
|
|
rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&pwm0 {
|
|
status = "okay";
|
|
};
|
|
|
|
&pwm2 {
|
|
status = "okay";
|
|
pinctrl-names = "active";
|
|
pinctrl-0 = <&pwm2_pin_pull_down>;
|
|
};
|
|
|
|
&rockchip_suspend {
|
|
rockchip,power-ctrl =
|
|
<&gpio1 18 GPIO_ACTIVE_LOW>,
|
|
<&gpio1 14 GPIO_ACTIVE_HIGH>;
|
|
};
|
|
|
|
&route_edp {
|
|
status = "disabled";
|
|
};
|
|
|
|
&saradc {
|
|
status = "okay";
|
|
vref-supply = <&vccadc_ref>;
|
|
};
|
|
|
|
&sdhci {
|
|
bus-width = <8>;
|
|
keep-power-in-suspend;
|
|
mmc-hs400-1_8v;
|
|
mmc-hs400-enhanced-strobe;
|
|
non-removable;
|
|
status = "okay";
|
|
no-sdio;
|
|
no-sd;
|
|
};
|
|
|
|
&sdmmc {
|
|
max-frequency = <150000000>;
|
|
no-sdio;
|
|
no-mmc;
|
|
bus-width = <4>;
|
|
cap-mmc-highspeed;
|
|
cap-sd-highspeed;
|
|
disable-wp;
|
|
num-slots = <1>;
|
|
vqmmc-supply = <&vcc_sd>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
|
|
status = "okay";
|
|
};
|
|
|
|
&sdio0 {
|
|
max-frequency = <50000000>;
|
|
no-sd;
|
|
no-mmc;
|
|
bus-width = <4>;
|
|
disable-wp;
|
|
cap-sd-highspeed;
|
|
keep-power-in-suspend;
|
|
mmc-pwrseq = <&sdio_pwrseq>;
|
|
non-removable;
|
|
num-slots = <1>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
|
|
sd-uhs-sdr104;
|
|
status = "okay";
|
|
};
|
|
|
|
&spdif {
|
|
status = "okay";
|
|
pinctrl-0 = <&spdif_bus_1>;
|
|
i2c-scl-rising-time-ns = <450>;
|
|
i2c-scl-falling-time-ns = <15>;
|
|
#sound-dai-cells = <0>;
|
|
};
|
|
|
|
&tcphy0 {
|
|
extcon = <&fusb0>;
|
|
status = "okay";
|
|
};
|
|
|
|
&tcphy1 {
|
|
status = "okay";
|
|
};
|
|
|
|
&tsadc {
|
|
/* tshut mode 0:CRU 1:GPIO */
|
|
rockchip,hw-tshut-mode = <1>;
|
|
/* tshut polarity 0:LOW 1:HIGH */
|
|
rockchip,hw-tshut-polarity = <1>;
|
|
status = "okay";
|
|
};
|
|
|
|
&u2phy0 {
|
|
status = "okay";
|
|
extcon = <&fusb0>;
|
|
|
|
u2phy0_otg: otg-port {
|
|
status = "okay";
|
|
};
|
|
|
|
u2phy0_host: host-port {
|
|
phy-supply = <&vcc5v0_host>;
|
|
status = "okay";
|
|
};
|
|
};
|
|
|
|
&u2phy1 {
|
|
status = "okay";
|
|
|
|
u2phy1_otg: otg-port {
|
|
status = "okay";
|
|
};
|
|
|
|
u2phy1_host: host-port {
|
|
phy-supply = <&vcc5v0_host>;
|
|
status = "okay";
|
|
};
|
|
};
|
|
|
|
&uart0 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&uart0_xfer &uart0_cts>;
|
|
status = "okay";
|
|
};
|
|
|
|
&uart2 {
|
|
status = "okay";
|
|
};
|
|
|
|
&usbdrd3_0 {
|
|
status = "okay";
|
|
};
|
|
|
|
&usbdrd3_1 {
|
|
status = "okay";
|
|
};
|
|
|
|
&usbdrd_dwc3_0 {
|
|
status = "okay";
|
|
extcon = <&fusb0>;
|
|
};
|
|
|
|
&usbdrd_dwc3_1 {
|
|
status = "okay";
|
|
dr_mode = "host";
|
|
};
|
|
|
|
&usb_host0_ehci {
|
|
status = "okay";
|
|
};
|
|
|
|
&usb_host0_ohci {
|
|
status = "okay";
|
|
};
|
|
|
|
&usb_host1_ehci {
|
|
status = "okay";
|
|
};
|
|
|
|
&usb_host1_ohci {
|
|
status = "okay";
|
|
};
|
|
|
|
&cif_isp0 {
|
|
rockchip,camera-modules-attached = <&camera0>;
|
|
status = "okay";
|
|
};
|
|
|
|
&isp0_mmu {
|
|
status = "okay";
|
|
};
|
|
|
|
&vopb {
|
|
status = "okay";
|
|
};
|
|
|
|
&vopb_mmu {
|
|
status = "okay";
|
|
};
|
|
|
|
&vopl {
|
|
status = "okay";
|
|
};
|
|
|
|
&vopl_mmu {
|
|
status = "okay";
|
|
};
|