1040 lines
22 KiB
Plaintext
1040 lines
22 KiB
Plaintext
/*
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* Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
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*
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* SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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*/
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/dts-v1/;
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#include <dt-bindings/pwm/pwm.h>
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#include <dt-bindings/sensor-dev.h>
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#include "rk3399.dtsi"
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#include "rk3399-android.dtsi"
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#include "rk3399-opp.dtsi"
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#include "rk3399-vop-clk-set.dtsi"
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#include <dt-bindings/display/mipi_dsi.h>
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/ {
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adc_keys {
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compatible = "adc-keys";
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io-channels = <&saradc 1>;
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io-channel-names = "buttons";
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keyup-threshold-microvolt = <1800000>;
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poll-interval = <100>;
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vol-up-key {
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label = "volume up";
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linux,code = <KEY_VOLUMEUP>;
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press-threshold-microvolt = <1000>;
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};
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vol-down-key {
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label = "volume down";
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linux,code = <KEY_VOLUMEDOWN>;
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press-threshold-microvolt = <170000>;
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};
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};
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backlight: backlight {
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compatible = "pwm-backlight";
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pwms = <&pwm0 0 25000 0>;
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brightness-levels = <
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0 20 20 21 21 22 22 23
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23 24 24 25 25 26 26 27
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27 28 28 29 29 30 30 31
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31 32 32 33 33 34 34 35
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35 36 36 37 37 38 38 39
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40 41 42 43 44 45 46 47
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48 49 50 51 52 53 54 55
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56 57 58 59 60 61 62 63
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64 65 66 67 68 69 70 71
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72 73 74 75 76 77 78 79
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80 81 82 83 84 85 86 87
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88 89 90 91 92 93 94 95
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96 97 98 99 100 101 102 103
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104 105 106 107 108 109 110 111
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112 113 114 115 116 117 118 119
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120 121 122 123 124 125 126 127
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128 129 130 131 132 133 134 135
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136 137 138 139 140 141 142 143
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144 145 146 147 148 149 150 151
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152 153 154 155 156 157 158 159
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160 161 162 163 164 165 166 167
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168 169 170 171 172 173 174 175
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176 177 178 179 180 181 182 183
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184 185 186 187 188 189 190 191
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192 193 194 195 196 197 198 199
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200 201 202 203 204 205 206 207
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208 209 210 211 212 213 214 215
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216 217 218 219 220 221 222 223
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224 225 226 227 228 229 230 231
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232 233 234 235 236 237 238 239
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240 241 242 243 244 245 246 247
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248 249 250 251 252 253 254 255
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>;
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default-brightness-level = <200>;
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};
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es8316-sound {
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compatible = "simple-audio-card";
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simple-audio-card,format = "i2s";
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simple-audio-card,name = "rockchip,es8316-codec";
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simple-audio-card,mclk-fs = <256>;
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simple-audio-card,widgets =
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"Microphone", "Mic Jack",
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"Headphone", "Headphone Jack";
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simple-audio-card,routing =
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"Mic Jack", "MICBIAS1",
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"IN1P", "Mic Jack",
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"Headphone Jack", "HPOL",
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"Headphone Jack", "HPOR";
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simple-audio-card,cpu {
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sound-dai = <&i2s0>;
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system-clock-frequency = <11289600>;
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};
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simple-audio-card,codec {
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sound-dai = <&es8316>;
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system-clock-frequency = <11289600>;
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};
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};
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rk_headset: rk-headset {
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compatible = "rockchip_headset";
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headset_gpio = <&gpio4 RK_PD4 GPIO_ACTIVE_LOW>;
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pinctrl-names = "default";
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pinctrl-0 = <&hp_det>;
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io-channels = <&saradc 2>;
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};
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charge-animation {
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compatible = "rockchip,uboot-charge";
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rockchip,uboot-charge-on = <1>;
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rockchip,android-charge-on = <0>;
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rockchip,uboot-low-power-voltage = <6700>;
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rockchip,screen-on-voltage = <6800>;
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status = "okay";
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};
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sdio_pwrseq: sdio-pwrseq {
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compatible = "mmc-pwrseq-simple";
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clocks = <&rk808 1>;
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clock-names = "ext_clock";
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pinctrl-names = "default";
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pinctrl-0 = <&wifi_enable_h>;
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/*
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* On the module itself this is one of these (depending
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* on the actual card populated):
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* - SDIO_RESET_L_WL_REG_ON
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* - PDN (power down when low)
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*/
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reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
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};
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vcc_sys: vcc-sys {
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compatible = "regulator-fixed";
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regulator-name = "vcc_sys";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <3900000>;
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regulator-max-microvolt = <3900000>;
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};
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vcc3v3_sys: vcc3v3-sys {
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compatible = "regulator-fixed";
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regulator-name = "vcc3v3_sys";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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};
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vcc5v0_host: vcc5v0-host-regulator {
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compatible = "regulator-fixed";
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gpio = <&gpio4 RK_PD1 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&host_vbus_drv>;
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regulator-name = "vcc5v0_host";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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regulator-always-on;
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enable-active-high;
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};
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vdd_log: vdd-log {
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compatible = "pwm-regulator";
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pwms = <&pwm2 0 25000 1>;
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rockchip,pwm_id= <2>;
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rockchip,pwm_voltage = <900000>;
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regulator-name = "vdd_log";
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regulator-min-microvolt = <750000>;
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regulator-max-microvolt = <1350000>;
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regulator-always-on;
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regulator-boot-on;
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};
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xin32k: xin32k {
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compatible = "fixed-clock";
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clock-frequency = <32768>;
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clock-output-names = "xin32k";
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#clock-cells = <0>;
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};
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wireless-wlan {
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compatible = "wlan-platdata";
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rockchip,grf = <&grf>;
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wifi_chip_type = "ap6255";
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sdio_vref = <1800>;
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WIFI,host_wake_irq = <&gpio0 RK_PA3 GPIO_ACTIVE_HIGH>;
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status = "okay";
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};
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wireless-bluetooth {
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compatible = "bluetooth-platdata";
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clocks = <&rk808 1>;
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clock-names = "ext_clock";
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uart_rts_gpios = <&gpio2 RK_PC3 GPIO_ACTIVE_LOW>;
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pinctrl-names = "default", "rts_gpio";
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pinctrl-0 = <&uart0_rts>, <&bt_reset_gpio>, <&bt_wake_gpio>, <&bt_irq_gpio>;
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pinctrl-1 = <&uart0_gpios>;
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BT,reset_gpio = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>;
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BT,wake_gpio = <&gpio2 RK_PD2 GPIO_ACTIVE_HIGH>;
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BT,wake_host_irq = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>;
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status = "okay";
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};
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};
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&cdn_dp {
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status = "okay";
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extcon = <&fusb0>;
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phys = <&tcphy0_dp>;
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};
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&cpu_l0 {
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cpu-supply = <&vdd_cpu_l>;
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};
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&cpu_l1 {
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cpu-supply = <&vdd_cpu_l>;
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};
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&cpu_l2 {
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cpu-supply = <&vdd_cpu_l>;
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};
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&cpu_l3 {
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cpu-supply = <&vdd_cpu_l>;
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};
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&cpu_b0 {
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cpu-supply = <&vdd_cpu_b>;
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};
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&cpu_b1 {
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cpu-supply = <&vdd_cpu_b>;
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};
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&dfi {
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status = "okay";
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};
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&dmc {
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status = "okay";
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center-supply = <&vdd_center>;
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upthreshold = <20>;
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downdifferential = <10>;
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system-status-freq = <
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/*system status freq(KHz)*/
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SYS_STATUS_NORMAL 856000
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SYS_STATUS_REBOOT 856000
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SYS_STATUS_SUSPEND 416000
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SYS_STATUS_VIDEO_1080P 416000
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SYS_STATUS_VIDEO_4K 666000
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SYS_STATUS_VIDEO_4K_10B 856000
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SYS_STATUS_PERFORMANCE 856000
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SYS_STATUS_BOOST 856000
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SYS_STATUS_DUALVIEW 856000
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SYS_STATUS_ISP 856000
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>;
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vop-bw-dmc-freq = <
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/* min_bw(MB/s) max_bw(MB/s) freq(KHz) */
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0 762 328000
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763 3012 666000
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3013 99999 856000
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>;
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auto-min-freq = <328000>;
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auto-freq-en = <1>;
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};
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&dmc_opp_table {
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compatible = "operating-points-v2";
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opp-200000000 {
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opp-hz = /bits/ 64 <200000000>;
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opp-microvolt = <900000>;
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status = "disabled";
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};
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opp-300000000 {
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opp-hz = /bits/ 64 <300000000>;
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opp-microvolt = <900000>;
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status = "disabled";
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};
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opp-328000000 {
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opp-hz = /bits/ 64 <328000000>;
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opp-microvolt = <900000>;
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};
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opp-400000000 {
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opp-hz = /bits/ 64 <400000000>;
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opp-microvolt = <900000>;
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status = "disabled";
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};
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opp-416000000 {
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opp-hz = /bits/ 64 <416000000>;
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opp-microvolt = <900000>;
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};
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opp-528000000 {
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opp-hz = /bits/ 64 <528000000>;
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opp-microvolt = <900000>;
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status = "disabled";
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};
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opp-600000000 {
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opp-hz = /bits/ 64 <600000000>;
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opp-microvolt = <900000>;
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status = "disabled";
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};
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opp-666000000 {
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opp-hz = /bits/ 64 <666000000>;
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opp-microvolt = <900000>;
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};
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opp-800000000 {
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opp-hz = /bits/ 64 <800000000>;
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opp-microvolt = <900000>;
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status = "disabled";
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};
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opp-856000000 {
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opp-hz = /bits/ 64 <856000000>;
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opp-microvolt = <900000>;
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};
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opp-928000000 {
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opp-hz = /bits/ 64 <928000000>;
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opp-microvolt = <900000>;
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status = "disabled";
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};
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};
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&dp_in_vopb {
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status = "disabled";
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};
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&dsi {
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status = "okay";
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rockchip,lane-rate = <1000>;
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dsi_panel: panel@0 {
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status = "okay";
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compatible = "simple-panel-dsi";
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reg = <0>;
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backlight = <&backlight>;
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reset-gpios = <&gpio3 RK_PA4 GPIO_ACTIVE_LOW>;
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pinctrl-names = "default";
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pinctrl-0 = <&lcd_rst_gpio>;
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reset-delay-ms = <60>;
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enable-delay-ms = <60>;
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prepare-delay-ms = <60>;
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unprepare-delay-ms = <60>;
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disable-delay-ms = <60>;
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dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
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MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
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dsi,format = <MIPI_DSI_FMT_RGB888>;
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dsi,lanes = <4>;
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panel-init-sequence = [
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15 05 02 8F A5
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15 14 02 01 00
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15 05 02 8F A5
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15 00 02 83 AA
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15 00 02 84 11
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15 00 02 A9 4B
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15 00 02 83 00
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15 00 02 84 00
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15 00 02 8F 00
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];
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disp_timings: display-timings {
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native-mode = <&timing0>;
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timing0: timing0 {
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clock-frequency = <150000000>;
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hactive = <1200>;
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hfront-porch = <80>;
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hback-porch = <60>;
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hsync-len = <1>;
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vactive = <1920>;
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vfront-porch = <35>;
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vback-porch = <25>;
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vsync-len = <1>;
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hsync-active = <0>;
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vsync-active = <0>;
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de-active = <0>;
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pixelclk-active = <0>;
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};
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};
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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panel_in_dsi: endpoint {
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remote-endpoint = <&dsi_out_panel>;
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};
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};
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};
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};
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@1 {
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reg = <1>;
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dsi_out_panel: endpoint {
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remote-endpoint = <&panel_in_dsi>;
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};
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};
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};
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};
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&dsi_in_vopl {
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status = "disabled";
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};
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&emmc_phy {
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status = "okay";
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};
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&gpu {
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status = "okay";
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mali-supply = <&vdd_gpu>;
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};
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&hdmi {
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status = "okay";
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};
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&hdmi_dp_sound {
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status = "okay";
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};
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&hdmi_in_vopb {
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status = "disabled";
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};
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&i2c0 {
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status = "okay";
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i2c-scl-rising-time-ns = <180>;
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i2c-scl-falling-time-ns = <30>;
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clock-frequency = <400000>;
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vdd_cpu_b: syr837@40 {
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compatible = "silergy,syr827";
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reg = <0x40>;
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vin-supply = <&vcc_sys>;
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regulator-compatible = "fan53555-reg";
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pinctrl-0 = <&vsel1_gpio>;
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vsel-gpios = <&gpio1 RK_PC1 GPIO_ACTIVE_HIGH>;
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regulator-name = "vdd_cpu_b";
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regulator-min-microvolt = <712500>;
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regulator-max-microvolt = <1500000>;
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regulator-ramp-delay = <1000>;
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fcs,suspend-voltage-selector = <1>;
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regulator-always-on;
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regulator-initial-state = <3>;
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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vdd_gpu: syr828@41 {
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compatible = "silergy,syr828";
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status = "okay";
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reg = <0x41>;
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vin-supply = <&vcc_sys>;
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regulator-compatible = "fan53555-reg";
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pinctrl-0 = <&vsel2_gpio>;
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vsel-gpios = <&gpio1 RK_PB6 GPIO_ACTIVE_HIGH>;
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regulator-name = "vdd_gpu";
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regulator-min-microvolt = <735000>;
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regulator-max-microvolt = <1400000>;
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regulator-ramp-delay = <1000>;
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fcs,suspend-voltage-selector = <1>;
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regulator-always-on;
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regulator-boot-on;
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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rk808: pmic@1b {
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compatible = "rockchip,rk808";
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reg = <0x1b>;
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interrupt-parent = <&gpio1>;
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interrupts = <RK_PC5 IRQ_TYPE_LEVEL_LOW>;
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pinctrl-0 = <&pmic_int_l>;
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rockchip,system-power-controller;
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wakeup-source;
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#clock-cells = <1>;
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clock-output-names = "rk808-clkout1", "rk808-clkout2";
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vcc1-supply = <&vcc3v3_sys>;
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vcc2-supply = <&vcc3v3_sys>;
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vcc3-supply = <&vcc3v3_sys>;
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vcc4-supply = <&vcc3v3_sys>;
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vcc6-supply = <&vcc3v3_sys>;
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vcc7-supply = <&vcc3v3_sys>;
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vcc8-supply = <&vcc3v3_sys>;
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vcc9-supply = <&vcc3v3_sys>;
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vcc10-supply = <&vcc3v3_sys>;
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vcc11-supply = <&vcc3v3_sys>;
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vcc12-supply = <&vcc3v3_sys>;
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vddio-supply = <&vcc1v8_pmu>;
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regulators {
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vdd_center: DCDC_REG1 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <750000>;
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regulator-max-microvolt = <1350000>;
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regulator-ramp-delay = <6001>;
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regulator-name = "vdd_center";
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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vdd_cpu_l: DCDC_REG2 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <750000>;
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regulator-max-microvolt = <1350000>;
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regulator-ramp-delay = <6001>;
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regulator-name = "vdd_cpu_l";
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regulator-state-mem {
|
|
regulator-off-in-suspend;
|
|
};
|
|
};
|
|
vcc_ddr: DCDC_REG3 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-name = "vcc_ddr";
|
|
regulator-state-mem {
|
|
regulator-on-in-suspend;
|
|
};
|
|
};
|
|
vcc_1v8: DCDC_REG4 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
regulator-name = "vcc_1v8";
|
|
regulator-state-mem {
|
|
regulator-on-in-suspend;
|
|
regulator-suspend-microvolt = <1800000>;
|
|
};
|
|
};
|
|
vcc1v8_dvp: LDO_REG1 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
regulator-name = "vcc1v8_dvp";
|
|
regulator-state-mem {
|
|
regulator-off-in-suspend;
|
|
};
|
|
};
|
|
vcc3v0_tp: LDO_REG2 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <3000000>;
|
|
regulator-max-microvolt = <3000000>;
|
|
regulator-name = "vcc3v0_tp";
|
|
regulator-state-mem {
|
|
regulator-on-in-suspend;
|
|
};
|
|
};
|
|
vcc1v8_pmu: LDO_REG3 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
regulator-name = "vcc1v8_pmu";
|
|
regulator-state-mem {
|
|
regulator-on-in-suspend;
|
|
regulator-suspend-microvolt = <1800000>;
|
|
};
|
|
};
|
|
vcc_sd: LDO_REG4 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <3000000>;
|
|
regulator-max-microvolt = <3000000>;
|
|
regulator-name = "vcc_sd";
|
|
regulator-state-mem {
|
|
regulator-on-in-suspend;
|
|
regulator-suspend-microvolt = <3000000>;
|
|
};
|
|
};
|
|
vcca3v0_codec: LDO_REG5 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <3000000>;
|
|
regulator-max-microvolt = <3000000>;
|
|
regulator-name = "vcca3v0_codec";
|
|
regulator-state-mem {
|
|
regulator-off-in-suspend;
|
|
};
|
|
};
|
|
vcc_1v5: LDO_REG6 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <1500000>;
|
|
regulator-max-microvolt = <1500000>;
|
|
regulator-name = "vcc_1v5";
|
|
regulator-state-mem {
|
|
regulator-on-in-suspend;
|
|
regulator-suspend-microvolt = <1500000>;
|
|
};
|
|
};
|
|
vcca1v8_codec: LDO_REG7 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
regulator-name = "vcca1v8_codec";
|
|
regulator-state-mem {
|
|
regulator-off-in-suspend;
|
|
};
|
|
};
|
|
vcc_3v0: LDO_REG8 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <3000000>;
|
|
regulator-max-microvolt = <3000000>;
|
|
regulator-name = "vcc_3v0";
|
|
regulator-state-mem {
|
|
regulator-on-in-suspend;
|
|
regulator-suspend-microvolt = <3000000>;
|
|
};
|
|
};
|
|
vcc3v3_s3: SWITCH_REG1 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-name = "vcc3v3_s3";
|
|
regulator-state-mem {
|
|
regulator-off-in-suspend;
|
|
};
|
|
};
|
|
vcc3v3_s0: SWITCH_REG2 {
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
regulator-name = "vcc3v3_s0";
|
|
regulator-state-mem {
|
|
regulator-off-in-suspend;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&i2c1 {
|
|
status = "okay";
|
|
i2c-scl-rising-time-ns = <140>;
|
|
i2c-scl-falling-time-ns = <30>;
|
|
|
|
es8316: es8316@11 {
|
|
#sound-dai-cells = <0>;
|
|
compatible = "everest,es8316";
|
|
reg = <0x11>;
|
|
clocks = <&cru SCLK_I2S_8CH_OUT>;
|
|
clock-names = "mclk";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&i2s_8ch_mclk>;
|
|
spk-con-gpio = <&gpio0 RK_PB3 GPIO_ACTIVE_HIGH>;
|
|
extcon = <&rk_headset>;
|
|
};
|
|
};
|
|
|
|
&i2c4 {
|
|
status = "okay";
|
|
i2c-scl-rising-time-ns = <345>;
|
|
i2c-scl-falling-time-ns = <11>;
|
|
clock-frequency = <100000>;
|
|
|
|
bq25700: bq25700@6b {
|
|
compatible = "ti,bq25703";
|
|
reg = <0x6b>;
|
|
extcon = <&fusb0>;
|
|
interrupt-parent = <&gpio1>;
|
|
interrupts = <RK_PC7 IRQ_TYPE_LEVEL_LOW>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&charger_ok>;
|
|
ti,charge-current = <1500000>;
|
|
ti,max-charge-voltage = <8704000>;
|
|
ti,max-input-voltage = <20000000>;
|
|
ti,max-input-current = <6000000>;
|
|
ti,input-current-sdp = <500000>;
|
|
ti,input-current-dcp = <2000000>;
|
|
ti,input-current-cdp = <2000000>;
|
|
ti,input-current-dc = <2000000>;
|
|
ti,minimum-sys-voltage = <6700000>;
|
|
ti,otg-voltage = <5000000>;
|
|
ti,otg-current = <500000>;
|
|
ti,input-current = <500000>;
|
|
pd-charge-only = <0>;
|
|
typec0-enable-gpios = <&gpio1 RK_PA3 GPIO_ACTIVE_LOW>;
|
|
status = "okay";
|
|
};
|
|
|
|
cw2015: cw2015@62 {
|
|
status = "okay";
|
|
compatible = "cw201x";
|
|
reg = <0x62>;
|
|
bat_config_info = <0x15 0xA8 0x5D 0x5D 0x59 0x55 0x57 0x50
|
|
0x4B 0x4F 0x55 0x53 0x43 0x37 0x2F 0x28
|
|
0x21 0x18 0x15 0x17 0x27 0x43 0x57 0x4F
|
|
0x13 0x5E 0x0A 0xE1 0x19 0x31 0x3C 0x46
|
|
0x4C 0x52 0x50 0x54 0x44 0x1E 0x7E 0x4C
|
|
0x1C 0x4A 0x52 0x87 0x8F 0x91 0x94 0x52
|
|
0x82 0x8C 0x92 0x96 0x00 0xAD 0xFB 0xCB
|
|
0x2F 0x7D 0x72 0xA5 0xB5 0xC1 0x1C 0x09>;
|
|
monitor_sec = <2>;
|
|
virtual_power = <0>;
|
|
divider_res1 = <200>;
|
|
divider_res2 = <200>;
|
|
};
|
|
|
|
fusb0: fusb30x@22 {
|
|
compatible = "fairchild,fusb302";
|
|
reg = <0x22>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&fusb0_int>;
|
|
vbus-5v-gpios = <&gpio1 RK_PD0 GPIO_ACTIVE_HIGH>;
|
|
int-n-gpios = <&gpio1 RK_PA2 GPIO_ACTIVE_HIGH>;
|
|
discharge-gpios = <&gpio0 RK_PB4 GPIO_ACTIVE_HIGH>;
|
|
charge-dev = <&bq25700>;
|
|
support-uboot-charge = <1>;
|
|
port-num = <0>;
|
|
status = "okay";
|
|
};
|
|
|
|
kxtj: kxtj2@0e {
|
|
status = "okay";
|
|
compatible = "gs_kxtj9";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&kxtj2_irq_gpio>;
|
|
reg = <0x0e>;
|
|
irq-gpio = <&gpio1 RK_PC6 IRQ_TYPE_EDGE_RISING>;
|
|
type = <SENSOR_TYPE_ACCEL>;
|
|
irq_enable = <0>;
|
|
poll_delay_ms = <30>;
|
|
power-off-in-suspend = <1>;
|
|
layout = <5>;
|
|
};
|
|
};
|
|
|
|
&i2c5 {
|
|
status = "okay";
|
|
i2c-scl-rising-time-ns = <150>;
|
|
i2c-scl-falling-time-ns = <30>;
|
|
clock-frequency = <100000>;
|
|
|
|
gslx680: gslx680@40 {
|
|
compatible = "gslX680_tve";
|
|
reg = <0x40>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&tp_irq_gpio>;
|
|
touch-gpio = <&gpio3 RK_PB0 IRQ_TYPE_EDGE_RISING>;
|
|
reset-gpio = <&gpio4 RK_PC6 GPIO_ACTIVE_LOW>;
|
|
max-x = <1200>;
|
|
max-y = <1920>;
|
|
tp-size = <80>;
|
|
tp-supply = <&vcc3v0_tp>;
|
|
status = "okay";
|
|
};
|
|
};
|
|
|
|
&i2s0 {
|
|
status = "okay";
|
|
rockchip,i2s-broken-burst-len;
|
|
rockchip,playback-channels = <8>;
|
|
rockchip,capture-channels = <8>;
|
|
#sound-dai-cells = <0>;
|
|
};
|
|
|
|
&i2s2 {
|
|
#sound-dai-cells = <0>;
|
|
status = "okay";
|
|
};
|
|
|
|
&io_domains {
|
|
status = "okay";
|
|
bt656-supply = <&vcc1v8_dvp>;
|
|
audio-supply = <&vcca1v8_codec>;
|
|
sdmmc-supply = <&vcc_sd>;
|
|
gpio1830-supply = <&vcc_3v0>;
|
|
};
|
|
|
|
&isp0_mmu {
|
|
status = "okay";
|
|
};
|
|
|
|
&isp1_mmu {
|
|
status = "okay";
|
|
};
|
|
|
|
&pinctrl {
|
|
|
|
charger {
|
|
charger_ok: charge-ok {
|
|
rockchip,pins =
|
|
<1 RK_PC7 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
};
|
|
};
|
|
|
|
fusb30x {
|
|
fusb0_int: fusb0-int {
|
|
rockchip,pins =
|
|
<1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>,
|
|
<0 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
};
|
|
};
|
|
|
|
headphone {
|
|
hp_det: hp-det {
|
|
rockchip,pins = <4 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
};
|
|
};
|
|
|
|
kxtj2 {
|
|
kxtj2_irq_gpio: kxtj2-irq-gpio {
|
|
rockchip,pins = <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
};
|
|
};
|
|
|
|
lcd_rst {
|
|
lcd_rst_gpio: lcd-rst-gpio {
|
|
rockchip,pins = <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
};
|
|
};
|
|
|
|
pmic {
|
|
pmic_int_l: pmic-int-l {
|
|
rockchip,pins =
|
|
<1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
};
|
|
vsel1_gpio: vsel1-gpio {
|
|
rockchip,pins =
|
|
<1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>;
|
|
};
|
|
vsel2_gpio: vsel2-gpio {
|
|
rockchip,pins =
|
|
<1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
|
|
};
|
|
};
|
|
|
|
sdio-pwrseq {
|
|
wifi_enable_h: wifi-enable-h {
|
|
rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
};
|
|
};
|
|
|
|
tp_irq {
|
|
tp_irq_gpio: tp-irq-gpio {
|
|
rockchip,pins = <3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
};
|
|
};
|
|
|
|
usb2 {
|
|
host_vbus_drv: host-vbus-drv {
|
|
rockchip,pins =
|
|
<4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
};
|
|
};
|
|
|
|
wireless-bluetooth {
|
|
uart0_gpios: uart0-gpios {
|
|
rockchip,pins = <2 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
};
|
|
|
|
bt_reset_gpio: bt-reset-gpio {
|
|
rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
};
|
|
|
|
bt_wake_gpio: bt-wake-gpio {
|
|
rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
};
|
|
|
|
bt_irq_gpio: bt-irq-gpio {
|
|
rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_down>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&pmu_io_domains {
|
|
status = "okay";
|
|
pmu1830-supply = <&vcc_1v8>;
|
|
};
|
|
|
|
&pwm0 {
|
|
status = "okay";
|
|
};
|
|
|
|
&pwm2 {
|
|
status = "okay";
|
|
pinctrl-names = "active";
|
|
pinctrl-0 = <&pwm2_pin_pull_down>;
|
|
};
|
|
|
|
&rockchip_suspend {
|
|
status = "okay";
|
|
rockchip,sleep-debug-en = <1>;
|
|
rockchip,sleep-mode-config = <
|
|
(0
|
|
| RKPM_SLP_ARMPD
|
|
| RKPM_SLP_PERILPPD
|
|
| RKPM_SLP_DDR_RET
|
|
| RKPM_SLP_PLLPD
|
|
| RKPM_SLP_CENTER_PD
|
|
| RKPM_SLP_OSC_DIS
|
|
| RKPM_SLP_AP_PWROFF
|
|
)
|
|
>;
|
|
rockchip,wakeup-config = <
|
|
(0
|
|
| RKPM_GPIO_WKUP_EN
|
|
)
|
|
>;
|
|
rockchip,pwm-regulator-config = <
|
|
(0
|
|
| PWM2_REGULATOR_EN
|
|
)
|
|
>;
|
|
rockchip,power-ctrl =
|
|
<&gpio1 RK_PC1 GPIO_ACTIVE_HIGH>,
|
|
<&gpio1 RK_PB6 GPIO_ACTIVE_HIGH>;
|
|
};
|
|
|
|
&route_dsi {
|
|
status = "okay";
|
|
logo,mode = "center";
|
|
};
|
|
|
|
&saradc {
|
|
status = "okay";
|
|
};
|
|
|
|
&sdhci {
|
|
bus-width = <8>;
|
|
mmc-hs400-1_8v;
|
|
no-sdio;
|
|
no-sd;
|
|
non-removable;
|
|
keep-power-in-suspend;
|
|
mmc-hs400-enhanced-strobe;
|
|
status = "okay";
|
|
};
|
|
|
|
&sdio0 {
|
|
clock-frequency = <100000000>;
|
|
clock-freq-min-max = <200000 100000000>;
|
|
no-sd;
|
|
no-mmc;
|
|
bus-width = <4>;
|
|
disable-wp;
|
|
cap-sd-highspeed;
|
|
cap-sdio-irq;
|
|
keep-power-in-suspend;
|
|
mmc-pwrseq = <&sdio_pwrseq>;
|
|
non-removable;
|
|
num-slots = <1>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
|
|
sd-uhs-sdr104;
|
|
status = "okay";
|
|
};
|
|
|
|
&sdmmc {
|
|
clock-frequency = <50000000>;
|
|
clock-freq-min-max = <400000 150000000>;
|
|
no-sdio;
|
|
no-mmc;
|
|
bus-width = <4>;
|
|
cap-mmc-highspeed;
|
|
cap-sd-highspeed;
|
|
disable-wp;
|
|
num-slots = <1>;
|
|
//sd-uhs-sdr104;
|
|
vqmmc-supply = <&vcc_sd>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
|
|
status = "okay";
|
|
};
|
|
|
|
&tcphy0 {
|
|
extcon = <&fusb0>;
|
|
status = "okay";
|
|
};
|
|
|
|
&tsadc {
|
|
rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */
|
|
rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */
|
|
status = "okay";
|
|
};
|
|
|
|
&u2phy0 {
|
|
status = "okay";
|
|
extcon = <&fusb0>;
|
|
|
|
u2phy0_otg: otg-port {
|
|
status = "okay";
|
|
};
|
|
|
|
u2phy0_host: host-port {
|
|
phy-supply = <&vcc5v0_host>;
|
|
status = "okay";
|
|
};
|
|
};
|
|
|
|
&uart0 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&uart0_xfer &uart0_cts>;
|
|
status = "okay";
|
|
};
|
|
|
|
&uart2 {
|
|
status = "disabled";
|
|
};
|
|
|
|
&usb_host0_ehci {
|
|
status = "okay";
|
|
};
|
|
|
|
&usb_host0_ohci {
|
|
status = "okay";
|
|
};
|
|
|
|
&usbdrd3_0 {
|
|
status = "okay";
|
|
};
|
|
|
|
&usbdrd_dwc3_0 {
|
|
status = "okay";
|
|
extcon = <&fusb0>;
|
|
};
|
|
|
|
&vopb {
|
|
assigned-clocks = <&cru DCLK_VOP0_DIV>;
|
|
assigned-clock-parents = <&cru PLL_CPLL>;
|
|
};
|
|
|
|
&vopl {
|
|
assigned-clocks = <&cru DCLK_VOP1_DIV>;
|
|
assigned-clock-parents = <&cru PLL_VPLL>;
|
|
};
|