59 lines
1.2 KiB
Plaintext
59 lines
1.2 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2022 Rockchip Electronics Co., Ltd.
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*/
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/ {
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rockchip_amp: rockchip-amp {
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compatible = "rockchip,mcu-amp";
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clocks = <&cru FCLK_BUS_CM0_CORE>, <&cru CLK_BUS_CM0_RTC>,
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<&cru PCLK_MAILBOX>, <&cru PCLK_INTC>,
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<&cru SCLK_UART7>, <&cru PCLK_UART7>,
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<&cru PCLK_TIMER>, <&cru CLK_TIMER4>, <&cru CLK_TIMER5>;
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pinctrl-names = "default";
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pinctrl-0 = <&uart7m1_xfer>;
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status = "okay";
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};
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rpmsg: rpmsg@a0000000 {
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compatible = "rockchip,rk3562-rpmsg";
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mbox-names = "rpmsg-rx", "rpmsg-tx";
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mboxes = <&mailbox 0 &mailbox 3>;
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rockchip,vdev-nums = <1>;
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rockchip,link-id = <0x04>;
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reg = <0x0 0xa0000000 0x0 0x20000>;
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memory-region = <&rpmsg_dma_reserved>;
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status = "okay";
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};
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reserved-memory {
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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/* mcu address */
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mcu_reserved: mcu@8200000 {
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reg = <0x0 0x8200000 0x0 0x100000>;
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no-map;
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};
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rpmsg_reserved: rpmsg@a0000000 {
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reg = <0x0 0xa0000000 0x0 0x400000>;
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no-map;
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};
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rpmsg_dma_reserved: rpmsg-dma@a0400000 {
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compatible = "shared-dma-pool";
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reg = <0x0 0xa0400000 0x0 0x100000>;
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no-map;
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};
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};
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};
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&mailbox {
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status = "okay";
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};
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