128 lines
2.1 KiB
Plaintext
128 lines
2.1 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2023 Rockchip Electronics Co., Ltd.
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*
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*/
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#include <dt-bindings/display/media-bus-format.h>
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#include "rk3562-evb1-lp4x-v10.dtsi"
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#include "rk3562-android.dtsi"
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#include "rk3562-rk817.dtsi"
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/ {
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model = "Rockchip RK3562 EVB1 LP4X V10 Board + RK EVB VOP3 RGB24BIT DISPLAY Ext Board";
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compatible = "rockchip,rk3562-evb1-lp4x-v10-rgb-FX070-DHM11BOE-A", "rockchip,rk3562";
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panel: panel {
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compatible = "simple-panel";
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bus-format = <MEDIA_BUS_FMT_RGB888_1X24>;
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backlight = <&backlight>;
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enable-gpios = <&gpio3 RK_PA6 GPIO_ACTIVE_LOW>;
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enable-delay-ms = <20>;
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reset-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_LOW>;
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reset-value = <0>;
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reset-delay-ms = <10>;
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status = "okay";
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display-timings {
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native-mode = <&fx070_dhm11boe_timing>;
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fx070_dhm11boe_timing: timing0 {
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clock-frequency = <50000000>;
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hactive = <1024>;
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vactive = <600>;
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hback-porch = <140>;
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hfront-porch = <160>;
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vback-porch = <20>;
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vfront-porch = <20>;
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hsync-len = <20>;
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vsync-len = <2>; //value range <2~22>
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hsync-active = <0>;
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vsync-active = <0>;
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de-active = <0>;
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pixelclk-active = <0>;
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};
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};
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port {
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panel_in_rgb: endpoint {
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remote-endpoint = <&rgb_out_panel>;
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};
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};
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};
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};
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&backlight {
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pwms = <&pwm9 0 25000 0>;
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status = "okay";
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};
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&csi2_dphy0 {
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status = "disabled";
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};
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&dsi {
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status = "disabled";
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};
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/*
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* The pins of gmac0/pcie2x1/pdm_codec and rgb are multiplexed
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*/
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&gmac0 {
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status = "disabled";
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};
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&pcie2x1 {
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status = "disabled";
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};
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&pdm_codec {
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status = "disabled";
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};
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&pwm9 {
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pinctrl-names = "active";
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pinctrl-0 = <&pwm9m0_pins>;
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status = "okay";
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};
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&rgb {
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status = "okay";
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pinctrl-0 = <&rgb666_pins>;
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ports {
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port@1 {
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reg = <1>;
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rgb_out_panel: endpoint {
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remote-endpoint = <&panel_in_rgb>;
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};
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};
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};
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};
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&rgb_in_vp0 {
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status = "okay";
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};
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&route_rgb {
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status = "okay";
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connect = <&vp0_out_rgb>;
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};
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/*
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* The pins of sai0/vcc_mipicsi0 and rgb are multiplexed
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*/
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&sai0 {
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status = "disabled";
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};
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&vcc_mipicsi0 {
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status = "disabled";
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};
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&video_phy {
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status = "disabled";
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};
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