442 lines
9.0 KiB
Plaintext
442 lines
9.0 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2020 Rockchip Electronics Co., Ltd.
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*
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*/
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/dts-v1/;
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#include "rk3568-nvr.dtsi"
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#include <dt-bindings/clock/rk618-cru.h>
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/ {
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model = "Rockchip RK3568 NVR DEMO V10 Board";
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compatible = "rockchip,rk3568-nvr-demo-v10", "rockchip,rk3568";
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gpio-leds {
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compatible = "gpio-leds";
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hdd-led {
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gpios = <&gpio4 RK_PC5 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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net-led {
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gpios = <&gpio4 RK_PC6 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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work-led {
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gpios = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "timer";
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};
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};
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i2s1_sound: i2s1-sound {
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status = "okay";
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compatible = "simple-audio-card";
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simple-audio-card,format = "i2s";
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simple-audio-card,mclk-fs = <256>;
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simple-audio-card,name = "rockchip,i2s1-sound";
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simple-audio-card,cpu {
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sound-dai = <&i2s1_8ch>;
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};
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simple-audio-card,codec {
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sound-dai = <&es8311>;
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};
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};
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vcc2v5_sys: vcc2v5-ddr {
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compatible = "regulator-fixed";
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regulator-name = "vcc2v5-sys";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <2500000>;
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regulator-max-microvolt = <2500000>;
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vin-supply = <&vcc3v3_sys>;
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};
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vcc3v3_pcie: gpio-regulator {
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compatible = "regulator-fixed";
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regulator-name = "vcc3v3_pcie";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
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startup-delay-us = <5000>;
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vin-supply = <&dc_12v>;
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};
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pcie30_avdd0v9: pcie30-avdd0v9 {
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compatible = "regulator-fixed";
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regulator-name = "pcie30_avdd0v9";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <900000>;
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regulator-max-microvolt = <900000>;
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vin-supply = <&vcc3v3_sys>;
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};
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pcie30_avdd1v8: pcie30-avdd1v8 {
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compatible = "regulator-fixed";
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regulator-name = "pcie30_avdd1v8";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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vin-supply = <&vcc3v3_sys>;
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};
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vcc3v3_bu: vcc3v3-bu {
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compatible = "regulator-fixed";
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regulator-name = "vcc3v3_bu";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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vin-supply = <&vcc5v0_sys>;
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};
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};
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&combphy1_usq {
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pinctrl-names = "default";
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pinctrl-0 = <&sata_pm_reset>;
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rockchip,dis-u3otg1-port;
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status = "okay";
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};
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&combphy2_psq{
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status = "okay";
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};
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&gmac0 {
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phy-mode = "rgmii";
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clock_in_out = "output";
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snps,reset-gpio = <&gpio1 RK_PB0 GPIO_ACTIVE_LOW>;
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snps,reset-active-low;
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/* Reset time is 20ms, 100ms for rtl8211f */
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snps,reset-delays-us = <0 20000 100000>;
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assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>;
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assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&cru CLK_MAC0_2TOP>;
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assigned-clock-rates = <0>, <125000000>;
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pinctrl-names = "default";
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pinctrl-0 = <&gmac0_miim
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&gmac0_tx_bus2
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&gmac0_rx_bus2
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&gmac0_rgmii_clk
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&gmac0_rgmii_bus>;
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tx_delay = <0x43>;
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rx_delay = <0x33>;
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phy-handle = <&rgmii_phy0>;
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status = "okay";
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};
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&gmac1 {
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phy-mode = "rgmii";
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clock_in_out = "output";
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snps,reset-gpio = <&gpio1 RK_PB1 GPIO_ACTIVE_LOW>;
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snps,reset-active-low;
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/* Reset time is 20ms, 100ms for rtl8211f */
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snps,reset-delays-us = <0 20000 100000>;
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assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
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assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru CLK_MAC1_2TOP>;
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assigned-clock-rates = <0>, <125000000>;
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pinctrl-names = "default";
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pinctrl-0 = <&gmac1m1_miim
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&gmac1m1_tx_bus2
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&gmac1m1_rx_bus2
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&gmac1m1_rgmii_clk
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&gmac1m1_rgmii_bus>;
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tx_delay = <0x4f>;
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rx_delay = <0x2d>;
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phy-handle = <&rgmii_phy1>;
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status = "okay";
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};
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&i2c1 {
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status = "okay";
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hym8563: hym8563@51 {
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compatible = "haoyu,hym8563";
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reg = <0x51>;
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pinctrl-names = "default";
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pinctrl-0 = <&rtc_int>;
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interrupt-parent = <&gpio0>;
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interrupts = <RK_PD3 IRQ_TYPE_LEVEL_LOW>;
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};
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};
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&i2c3 {
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status = "okay";
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clock-frequency = <400000>;
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es8311: es8311@18 {
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compatible = "everest,es8311";
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reg = <0x18>;
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clocks = <&cru I2S1_MCLKOUT>;
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clock-names = "mclk";
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adc-pga-gain = <6>; /* 18dB */
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adc-volume = <0xbf>; /* 0dB */
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dac-volume = <0xbf>; /* 0dB */
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aec-mode = "dac left, adc right";
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pinctrl-names = "default";
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pinctrl-0 = <&i2s1m0_mclk>;
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assigned-clocks = <&cru I2S1_MCLKOUT>, <&cru I2S1_MCLK_TX_IOE>;
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assigned-clock-rates = <12288000>;
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assigned-clock-parents = <&cru I2S1_MCLKOUT_TX>, <&cru I2S1_MCLKOUT_TX>;
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spk-ctl-gpios = <&gpio2 RK_PA5 GPIO_ACTIVE_HIGH>;
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#sound-dai-cells = <0>;
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};
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rk618@50 {
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compatible = "rockchip,rk618";
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reg = <0x50>;
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pinctrl-names = "default";
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pinctrl-0 = <&i2s3m1_mclk &rk618_int>;
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clocks = <&cru I2S3_MCLKOUT>;
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clock-names = "clkin";
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assigned-clocks =<&cru I2S3_MCLKOUT>, <&cru I2S3_MCLK_IOE>;
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assigned-clock-parents = <&cru I2S3_MCLKOUT_TX>, <&cru I2S3_MCLKOUT>;
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assigned-clock-rates = <11289600>;
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reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_LOW>;
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status = "okay";
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clock: cru {
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compatible = "rockchip,rk618-cru";
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clocks = <&cru I2S3_MCLKOUT>, <&cru DCLK_VOP2>;
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clock-names = "clkin", "lcdc0_dclkp";
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assigned-clocks = <&clock SCALER_PLLIN_CLK>,
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<&clock VIF_PLLIN_CLK>,
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<&clock SCALER_CLK>,
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<&clock VIF0_PRE_CLK>,
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<&clock CODEC_CLK>,
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<&clock DITHER_CLK>;
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assigned-clock-parents = <&cru I2S3_MCLKOUT_TX>,
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<&clock LCDC0_CLK>,
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<&clock SCALER_PLL_CLK>,
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<&clock VIF_PLL_CLK>,
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<&cru I2S3_MCLKOUT>,
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<&clock VIF0_CLK>;
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#clock-cells = <1>;
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status = "okay";
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};
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hdmi {
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compatible = "rockchip,rk618-hdmi";
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clocks = <&clock HDMI_CLK>;
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clock-names = "hdmi";
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assigned-clocks = <&clock HDMI_CLK>;
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assigned-clock-parents = <&clock VIF0_CLK>;
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interrupt-parent = <&gpio0>;
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interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
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status = "okay";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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hdmi_in_rgb: endpoint {
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remote-endpoint = <&rgb_out_hdmi>;
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};
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};
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};
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};
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};
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};
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&mdio0 {
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rgmii_phy0: phy@0 {
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compatible = "ethernet-phy-ieee802.3-c22";
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reg = <0x0>;
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};
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};
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&mdio1 {
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rgmii_phy1: phy@0 {
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compatible = "ethernet-phy-ieee802.3-c22";
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reg = <0x0>;
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};
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};
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&pcie30phy {
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status = "okay";
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};
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&pcie3x1 {
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reset-gpios = <&gpio0 RK_PC3 GPIO_ACTIVE_HIGH>;
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vpcie3v3-supply = <&vcc3v3_pcie>;
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status = "okay";
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};
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&pcie3x2 {
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reset-gpios = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>;
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vpcie3v3-supply = <&vcc3v3_pcie>;
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status = "okay";
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};
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&pwm15 {
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compatible = "rockchip,remotectl-pwm";
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pinctrl-names = "default";
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pinctrl-0 = <&pwm15m1_pins>;
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remote_pwm_id = <3>;
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handle_cpu_id = <1>;
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remote_support_psci = <0>;
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status = "okay";
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ir_key1 {
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rockchip,usercode = <0x4040>;
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rockchip,key_table =
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<0xf2 KEY_REPLY>,
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<0xba KEY_BACK>,
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<0xf4 KEY_UP>,
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<0xf1 KEY_DOWN>,
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<0xef KEY_LEFT>,
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<0xee KEY_RIGHT>,
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<0xbd KEY_HOME>,
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<0xea KEY_VOLUMEUP>,
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<0xe3 KEY_VOLUMEDOWN>,
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<0xe2 KEY_SEARCH>,
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<0xb2 KEY_POWER>,
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<0xbc KEY_MUTE>,
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<0xec KEY_MENU>,
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<0xbf 0x190>,
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<0xe0 0x191>,
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<0xe1 0x192>,
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<0xe9 183>,
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<0xe6 248>,
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<0xe8 185>,
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<0xe7 186>,
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<0xf0 388>,
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<0xbe 0x175>;
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};
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ir_key2 {
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rockchip,usercode = <0xff00>;
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rockchip,key_table =
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<0xf9 KEY_HOME>,
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<0xbf KEY_BACK>,
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<0xfb KEY_MENU>,
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<0xaa KEY_REPLY>,
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<0xb9 KEY_UP>,
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<0xe9 KEY_DOWN>,
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<0xb8 KEY_LEFT>,
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<0xea KEY_RIGHT>,
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<0xeb KEY_VOLUMEDOWN>,
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<0xef KEY_VOLUMEUP>,
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<0xf7 KEY_MUTE>,
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<0xe7 KEY_POWER>,
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<0xfc KEY_POWER>,
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<0xa9 KEY_VOLUMEDOWN>,
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<0xa8 KEY_PLAYPAUSE>,
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<0xe0 KEY_VOLUMEDOWN>,
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<0xa5 KEY_VOLUMEDOWN>,
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<0xab 183>,
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<0xb7 388>,
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<0xe8 388>,
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<0xf8 184>,
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<0xaf 185>,
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<0xed KEY_VOLUMEDOWN>,
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<0xee 186>,
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<0xb3 KEY_VOLUMEDOWN>,
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<0xf1 KEY_VOLUMEDOWN>,
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<0xf2 KEY_VOLUMEDOWN>,
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<0xf3 KEY_SEARCH>,
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<0xb4 KEY_VOLUMEDOWN>,
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<0xa4 KEY_SETUP>,
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<0xbe KEY_SEARCH>;
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};
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ir_key3 {
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rockchip,usercode = <0x1dcc>;
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rockchip,key_table =
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<0xee KEY_REPLY>,
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<0xf0 KEY_BACK>,
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<0xf8 KEY_UP>,
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<0xbb KEY_DOWN>,
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<0xef KEY_LEFT>,
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<0xed KEY_RIGHT>,
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<0xfc KEY_HOME>,
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<0xf1 KEY_VOLUMEUP>,
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<0xfd KEY_VOLUMEDOWN>,
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<0xb7 KEY_SEARCH>,
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<0xff KEY_POWER>,
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<0xf3 KEY_MUTE>,
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<0xbf KEY_MENU>,
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<0xf9 0x191>,
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<0xf5 0x192>,
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<0xb3 388>,
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<0xbe KEY_1>,
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<0xba KEY_2>,
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<0xb2 KEY_3>,
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<0xbd KEY_4>,
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<0xf9 KEY_5>,
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<0xb1 KEY_6>,
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<0xfc KEY_7>,
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<0xf8 KEY_8>,
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<0xb0 KEY_9>,
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<0xb6 KEY_0>,
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<0xb5 KEY_BACKSPACE>;
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};
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};
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&rgb {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&lcdc_ctl>;
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ports {
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port@1 {
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reg = <1>;
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rgb_out_hdmi: endpoint {
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remote-endpoint = <&hdmi_in_rgb>;
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};
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};
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};
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};
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&rgb_in_vp2 {
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status = "okay";
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};
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&sata1 {
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status = "okay";
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};
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&sata2 {
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status = "okay";
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};
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&pinctrl {
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rk618 {
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rk618_reset: rk618-reeset {
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rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_output_high>;
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};
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rk618_int: rk618-int {
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rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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rtc {
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rtc_int: rtc-int {
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rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>;
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};
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};
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sata {
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sata_pm_reset: sata-pm-reset {
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rockchip,pins = <4 RK_PD2 RK_FUNC_GPIO &pcfg_output_high>;
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};
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};
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};
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