608 lines
12 KiB
Plaintext
608 lines
12 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2023 Rockchip Electronics Co., Ltd.
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*
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*/
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/pinctrl/rockchip.h>
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#include "rk3568.dtsi"
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#include "rk3568-toybrick.dtsi"
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/delete-node/ &adc_keys;
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/ {
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compatible = "rockchip,rk3568-toybrick-sd0", "rockchip,rk3568";
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bt-sound {
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status = "okay";
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compatible = "simple-audio-card";
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simple-audio-card,format = "dsp_a";
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simple-audio-card,bitclock-inversion = <1>;
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simple-audio-card,mclk-fs = <512>;
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simple-audio-card,name = "rockchip,bt";
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#simple-audio-card,bitclock-master = <&sound2_master>;
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#simple-audio-card,frame-master = <&sound2_master>;
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simple-audio-card,cpu {
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sound-dai = <&i2s2_2ch>;
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};
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sound2_master:simple-audio-card,codec {
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#sound-dai-cells = <0>;
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sound-dai = <&bt_sco>;
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};
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};
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pcie30_avdd0v9: pcie30-avdd0v9 {
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compatible = "regulator-fixed";
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regulator-name = "pcie30_avdd0v9";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <900000>;
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regulator-max-microvolt = <900000>;
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vin-supply = <&vcc3v3_sys>;
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};
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pcie30_avdd1v8: pcie30-avdd1v8 {
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compatible = "regulator-fixed";
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regulator-name = "pcie30_avdd1v8";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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vin-supply = <&vcc3v3_sys>;
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};
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pcie30_3v3: gpio-regulator {
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compatible = "regulator-gpio";
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regulator-name = "pcie30_3v3";
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regulator-min-microvolt = <100000>;
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regulator-max-microvolt = <3300000>;
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gpios = <&gpio2 RK_PD7 GPIO_ACTIVE_HIGH>;
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gpios-states = <0x1>;
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states = <100000 0x0
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3300000 0x1>;
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};
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rk_headset: rk-headset {
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compatible = "rockchip_headset";
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headset_gpio = <&gpio4 RK_PC4 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&hp_det>;
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io-channels = <&saradc 2>;
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};
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vcc2v5_sys: vcc2v5-ddr {
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compatible = "regulator-fixed";
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regulator-name = "vcc2v5-sys";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <2500000>;
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regulator-max-microvolt = <2500000>;
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vin-supply = <&vcc3v3_sys>;
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};
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vcc3v3_pcie: gpio-regulator {
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compatible = "regulator-fixed";
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regulator-name = "vcc3v3_pcie";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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enable-active-high;
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startup-delay-us = <5000>;
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vin-supply = <&vcc5v0_sys>;
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};
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vcc3v3_bu: vcc3v3-bu {
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compatible = "regulator-fixed";
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regulator-name = "vcc3v3_bu";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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vin-supply = <&vcc5v0_sys>;
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};
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vcc_camera: vcc-camera-regulator {
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compatible = "regulator-fixed";
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gpio = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&camera_pwr>;
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regulator-name = "vcc_camera";
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enable-active-high;
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regulator-always-on;
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regulator-boot-on;
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};
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vcc5v0_host: vcc5v0-host-regulator {
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compatible = "regulator-fixed";
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enable-active-high;
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gpio = <&gpio0 RK_PC2 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&vcc5v0_host_en>;
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regulator-name = "vcc5v0_host";
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regulator-always-on;
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};
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vcc5v0_otg: vcc5v0-otg-regulator {
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compatible = "regulator-fixed";
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enable-active-high;
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gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&vcc5v0_otg_en>;
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regulator-name = "vcc5v0_otg";
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};
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};
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&bus_npu {
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status = "okay";
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};
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&combphy0_us {
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status = "okay";
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};
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&combphy1_usq {
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status = "okay";
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};
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&combphy2_psq {
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status = "okay";
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};
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&csi2_dphy_hw {
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status = "okay";
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};
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&csi2_dphy0 {
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status = "okay";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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mipi_in_ucam0: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&imx415_out>;
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data-lanes = <1 2 3 4>;
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};
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mipi_in_ucam1: endpoint@2 {
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reg = <2>;
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remote-endpoint = <&ov50c40_out>;
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data-lanes = <1 2 3 4>;
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};
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};
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port@1 {
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reg = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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csidphy_out: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&isp0_in>;
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};
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};
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};
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};
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&gmac1 {
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phy-mode = "rgmii";
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clock_in_out = "output";
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snps,reset-gpio = <&gpio2 RK_PD1 GPIO_ACTIVE_LOW>;
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snps,reset-active-low;
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/* Reset time is 20ms, 100ms for rtl8211f */
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snps,reset-delays-us = <0 20000 100000>;
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assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>, <&cru CLK_MAC1_OUT>;
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assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>;
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assigned-clock-rates = <0>, <125000000>, <25000000>;
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pinctrl-names = "default";
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pinctrl-0 = <&gmac1m1_miim
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&gmac1m1_tx_bus2
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&gmac1m1_rx_bus2
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&gmac1m1_rgmii_clk
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&gmac1m1_rgmii_bus
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ð1m1_pins>;
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tx_delay = <0x30>;
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rx_delay = <0x28>;
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phy-handle = <&rgmii_phy1>;
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status = "okay";
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};
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&i2s2_2ch {
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status = "okay";
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#sound-dai-cells = <0>;
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};
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&i2c0 {
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status = "okay";
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rk809: pmic@20 {
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compatible = "rockchip,rk809";
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reg = <0x20>;
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regulators {
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vccio_acodec: LDO_REG4 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-name = "vccio_acodec";
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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};
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};
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};
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&i2s1_8ch {
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status = "okay";
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#sound-dai-cells = <0>;
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rockchip,clk-trcm = <1>;
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pinctrl-names = "default";
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pinctrl-0 = <&i2s1m0_sclktx
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&i2s1m0_lrcktx
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&i2s1m0_sdo0
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&i2s1m0_sdi0>;
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};
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&i2c5 {
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status = "okay";
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hym8563: hym8563@51 {
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compatible = "haoyu,hym8563";
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reg = <0x51>;
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#clock-cells = <0>;
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clock-frequency = <32768>;
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clock-output-names = "hym8563";
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pinctrl-names = "default";
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pinctrl-0 = <&rtc_int>;
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interrupt-parent = <&gpio0>;
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interrupts = <RK_PD3 IRQ_TYPE_LEVEL_LOW>;
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};
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};
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&i2c2 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&i2c2m1_xfer>;
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imx415: imx415@1a {
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compatible = "sony,imx415";
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reg = <0x1a>;
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clocks = <&cru CLK_CIF_OUT>;
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clock-names = "xvclk";
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power-domains = <&power RK3568_PD_VI>;
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pinctrl-names = "default";
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pinctrl-0 = <&cif_clk>;
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// must be high at last
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power-gpios = <&gpio4 RK_PB2 GPIO_ACTIVE_HIGH>;
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// must be high at last do at vcc_camera
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//reset-gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_LOW>;
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rockchip,camera-module-index = <0>;
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rockchip,camera-module-facing = "back";
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rockchip,camera-module-name = "CMK-OT2022-PX1";
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rockchip,camera-module-lens-name = "IR0147-50IRC-8M-F20-RK3568";
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//lens-focus = <&cam_ircut0>;
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port {
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imx415_out: endpoint {
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remote-endpoint = <&mipi_in_ucam0>;
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data-lanes = <1 2 3 4>;
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};
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};
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};
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aw8601: aw8601@c {
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compatible = "awinic,aw8601";
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status = "okay";
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reg = <0x0c>;
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rockchip,vcm-start-current = <56>;
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rockchip,vcm-rated-current = <96>;
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rockchip,vcm-step-mode = <4>;
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rockchip,camera-module-index = <0>;
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rockchip,camera-module-facing = "back";
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};
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otp_eeprom: otp_eeprom@50 {
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compatible = "rk,otp_eeprom";
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status = "okay";
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reg = <0x50>;
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};
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ov50c40: ov50c40@36 {
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compatible = "ovti,ov50c40";
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reg = <0x36>;
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clocks = <&cru CLK_CIF_OUT>;
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clock-names = "xvclk";
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power-domains = <&power RK3568_PD_VI>;
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pinctrl-names = "default";
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pinctrl-0 = <&cif_clk>;
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pwdn-gpios = <&gpio4 RK_PB2 GPIO_ACTIVE_LOW>;// must be high at last
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reset-gpios = <&gpio4 RK_PC0 GPIO_ACTIVE_LOW>;// must be high at last
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rockchip,camera-module-index = <0>;
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rockchip,camera-module-facing = "back";
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rockchip,camera-module-name = "HZGA06";
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rockchip,camera-module-lens-name = "ZE0082C1-RK3568";
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eeprom-ctrl = <&otp_eeprom>;
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lens-focus = <&aw8601>;
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port {
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ov50c40_out: endpoint {
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remote-endpoint = <&mipi_in_ucam1>;
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data-lanes = <1 2 3 4>;
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};
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};
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};
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};
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&leds {
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status = "okay";
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compatible = "gpio-leds";
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work_led: work {
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gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "heartbeat";
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};
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};
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&mdio1 {
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rgmii_phy1: phy@0 {
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compatible = "ethernet-phy-ieee802.3-c22";
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reg = <0x0>;
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clocks = <&cru CLK_MAC1_OUT>;
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};
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};
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&pcie2x1 {
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reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&rtl8111_isolate>;
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status = "okay";
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};
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&pcie30phy {
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status = "okay";
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};
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&pcie3x2 {
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reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
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vpcie3v3-supply = <&pcie30_3v3>;
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status = "okay";
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};
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&reserved_memory {
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linux,cma {
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compatible = "shared-dma-pool";
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inactive;
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reusable;
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reg = <0x0 0x10000000 0x0 0x08000000>;
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linux,cma-default;
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};
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};
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&rkisp {
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status = "okay";
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};
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&rkisp_mmu {
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status = "okay";
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};
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&rkisp_vir0 {
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status = "okay";
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port {
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#address-cells = <1>;
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#size-cells = <0>;
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isp0_in: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&csidphy_out>;
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};
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};
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};
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&rockchip_suspend {
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status = "disabled";
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};
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&rknpu {
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status = "okay";
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};
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&rknpu_mmu {
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status = "okay";
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};
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&sdio_pwrseq {
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compatible = "mmc-pwrseq-simple";
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clocks = <&rk809 1>;
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clock-names = "ext_clock";
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pinctrl-names = "default";
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pinctrl-0 = <&wifi_enable_h>;
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/*
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* On the module itself this is one of these (depending
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* on the actual card populated):
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* - SDIO_RESET_L_WL_REG_ON
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* - PDN (power down when low)
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*/
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reset-gpios = <&gpio2 RK_PB1 GPIO_ACTIVE_LOW>;
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post-power-on-delay-ms = <200>;
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status = "okay";
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};
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&sdmmc1 {
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status = "disabled";
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};
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&sdmmc2 {
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max-frequency = <150000000>;
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supports-sdio;
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bus-width = <4>;
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disable-wp;
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cap-sd-highspeed;
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cap-sdio-irq;
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keep-power-in-suspend;
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mmc-pwrseq = <&sdio_pwrseq>;
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non-removable;
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pinctrl-names = "default";
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pinctrl-0 = <&sdmmc2m0_bus4 &sdmmc2m0_cmd &sdmmc2m0_clk>;
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sd-uhs-sdr104;
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status = "okay";
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};
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&uart1 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn>;
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};
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&video_phy0 {
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status = "okay";
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};
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&video_phy1 {
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status = "disabled";
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};
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&wireless_wlan {
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pinctrl-names = "default";
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pinctrl-0 = <&wifi_host_wake_irq>;
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WIFI,host_wake_irq = <&gpio2 RK_PB2 GPIO_ACTIVE_HIGH>;
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};
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&wireless_bluetooth {
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compatible = "bluetooth-platdata";
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clocks = <&rk809 1>;
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clock-names = "ext_clock";
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//wifi-bt-power-toggle;
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uart_rts_gpios = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>;
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pinctrl-names = "default", "rts_gpio";
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pinctrl-0 = <&uart1m0_rtsn>;
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pinctrl-1 = <&uart1_pin>;
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BT,reset_gpio = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
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BT,wake_gpio = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>;
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BT,wake_host_irq = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>;
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status = "okay";
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};
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&pinctrl {
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cam {
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camera_pwr: camera-pwr {
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rockchip,pins =
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/* camera power en */
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<0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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headphone {
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hp_det: hp-det {
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rockchip,pins = <4 RK_PC4 RK_FUNC_GPIO &pcfg_pull_up>;
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};
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};
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i2s1 {
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/omit-if-no-ref/
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i2s1m0_lrckrx: i2s1m0-lrckrx {
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rockchip,pins =
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/* i2s1m0_lrckrx */
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<1 RK_PA6 1 &pcfg_pull_up_drv_level_4>;
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};
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/omit-if-no-ref/
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i2s1m0_lrcktx: i2s1m0-lrcktx {
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rockchip,pins =
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/* i2s1m0_lrcktx */
|
|
<1 RK_PA5 1 &pcfg_pull_up_drv_level_4>;
|
|
};
|
|
/omit-if-no-ref/
|
|
i2s1m0_mclk: i2s1m0-mclk {
|
|
rockchip,pins =
|
|
/* i2s1m0_mclk */
|
|
<1 RK_PA2 1 &pcfg_pull_up_drv_level_4>;
|
|
};
|
|
/omit-if-no-ref/
|
|
i2s1m0_sclkrx: i2s1m0-sclkrx {
|
|
rockchip,pins =
|
|
/* i2s1m0_sclkrx */
|
|
<1 RK_PA4 1 &pcfg_pull_up_drv_level_4>;
|
|
};
|
|
/omit-if-no-ref/
|
|
i2s1m0_sclktx: i2s1m0-sclktx {
|
|
rockchip,pins =
|
|
/* i2s1m0_sclktx */
|
|
<1 RK_PA3 1 &pcfg_pull_up_drv_level_4>;
|
|
};
|
|
/omit-if-no-ref/
|
|
i2s1m0_sdi0: i2s1m0-sdi0 {
|
|
rockchip,pins =
|
|
/* i2s1m0_sdi0 */
|
|
<1 RK_PB3 1 &pcfg_pull_up_drv_level_4>;
|
|
};
|
|
/omit-if-no-ref/
|
|
i2s1m0_sdi1: i2s1m0-sdi1 {
|
|
rockchip,pins =
|
|
/* i2s1m0_sdi1 */
|
|
<1 RK_PB2 2 &pcfg_pull_up_drv_level_4>;
|
|
};
|
|
/omit-if-no-ref/
|
|
i2s1m0_sdi2: i2s1m0-sdi2 {
|
|
rockchip,pins =
|
|
/* i2s1m0_sdi2 */
|
|
<1 RK_PB1 2 &pcfg_pull_up_drv_level_4>;
|
|
};
|
|
/omit-if-no-ref/
|
|
i2s1m0_sdi3: i2s1m0-sdi3 {
|
|
rockchip,pins =
|
|
/* i2s1m0_sdi3 */
|
|
<1 RK_PB0 2 &pcfg_pull_up_drv_level_4>;
|
|
};
|
|
/omit-if-no-ref/
|
|
i2s1m0_sdo0: i2s1m0-sdo0 {
|
|
rockchip,pins =
|
|
/* i2s1m0_sdo0 */
|
|
<1 RK_PA7 1 &pcfg_pull_up_drv_level_4>;
|
|
};
|
|
};
|
|
|
|
rtc {
|
|
rtc_int: rtc-int {
|
|
rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
};
|
|
};
|
|
|
|
rtl8111 {
|
|
rtl8111_isolate: rtl8111-isolate {
|
|
rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
};
|
|
};
|
|
|
|
sdio-pwrseq {
|
|
wifi_enable_h: wifi-enable-h {
|
|
rockchip,pins = <2 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
};
|
|
};
|
|
|
|
usb {
|
|
vcc5v0_host_en: vcc5v0-host-en {
|
|
rockchip,pins = <0 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
};
|
|
|
|
vcc5v0_otg_en: vcc5v0-otg-en {
|
|
rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
};
|
|
};
|
|
|
|
wireless-wlan {
|
|
wifi_host_wake_irq: wifi-host-wake-irq {
|
|
rockchip,pins = <2 RK_PB2 RK_FUNC_GPIO &pcfg_pull_down>;
|
|
};
|
|
};
|
|
|
|
wireless-bluetooth {
|
|
uart1_pin: uart1-pin {
|
|
rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
};
|
|
};
|
|
};
|