android13/kernel-5.10/arch/arm64/boot/dts/rockchip/rk3588-android.dtsi

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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2021 Rockchip Electronics Co., Ltd.
*
*/
/ {
chosen: chosen {
bootargs = "earlycon=uart8250,mmio32,0xfeb50000 console=ttyFIQ0 irqchip.gicv3_pseudo_nmi=0";
};
cspmu: cspmu@fd10c000 {
compatible = "rockchip,cspmu";
reg = <0x0 0xfd10c000 0x0 0x1000>,
<0x0 0xfd10d000 0x0 0x1000>,
<0x0 0xfd10e000 0x0 0x1000>,
<0x0 0xfd10f000 0x0 0x1000>,
<0x0 0xfd12c000 0x0 0x1000>,
<0x0 0xfd12d000 0x0 0x1000>,
<0x0 0xfd12e000 0x0 0x1000>,
<0x0 0xfd12f000 0x0 0x1000>;
};
debug: debug@fd104000 {
compatible = "rockchip,debug";
reg = <0x0 0xfd104000 0x0 0x1000>,
<0x0 0xfd105000 0x0 0x1000>,
<0x0 0xfd106000 0x0 0x1000>,
<0x0 0xfd107000 0x0 0x1000>,
<0x0 0xfd124000 0x0 0x1000>,
<0x0 0xfd125000 0x0 0x1000>,
<0x0 0xfd126000 0x0 0x1000>,
<0x0 0xfd127000 0x0 0x1000>;
};
fiq_debugger: fiq-debugger {
compatible = "rockchip,fiq-debugger";
rockchip,serial-id = <2>;
rockchip,wake-irq = <0>;
/* If enable uart uses irq instead of fiq */
rockchip,irq-mode-enable = <1>;
rockchip,baudrate = <1500000>; /* Only 115200 and 1500000 */
interrupts = <GIC_SPI 423 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&uart2m0_xfer>;
status = "okay";
};
firmware {
optee: optee {
compatible = "linaro,optee-tz";
method = "smc";
};
};
minidump: minidump {
compatible = "rockchip,minidump";
smem-region = <&minidump_smem>;
minidump-region = <&minidump_mem>;
status = "disabled";
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
cma {
compatible = "shared-dma-pool";
reusable;
size = <0x0 (8 * 0x100000)>;
linux,cma-default;
};
drm_logo: drm-logo@00000000 {
compatible = "rockchip,drm-logo";
reg = <0x0 0x0 0x0 0x0>;
};
drm_cubic_lut: drm-cubic-lut@00000000 {
compatible = "rockchip,drm-cubic-lut";
reg = <0x0 0x0 0x0 0x0>;
};
vendor_storage_rm: vendor-storage-rm@00000000 {
compatible = "rockchip,vendor-storage-rm";
reg = <0x0 0x0 0x0 0x0>;
};
ramoops: ramoops@110000 {
compatible = "ramoops";
/* 0x110000 to 0x1f0000 is for ramoops */
reg = <0x0 0x110000 0x0 0xe0000>;
boot-log-size = <0x8000>; /* do not change */
boot-log-count = <0x1>; /* do not change */
console-size = <0x80000>;
pmsg-size = <0x30000>;
ftrace-size = <0x00000>;
record-size = <0x14000>;
};
minidump_smem: minidump-smem@1f0000 {
reg = <0x0 0x1f0000 0x0 0x100>; /* do not change */
no-map;
status = "disabled";
};
minidump_mem: minidump-mem@c000000 {
reg = <0x0 0x0c000000 0x0 0x2000000>; /* changing according to your project */
no-map;
status = "disabled";
};
};
vendor_storage: vendor-storage {
compatible = "rockchip,ram-vendor-storage";
memory-region = <&vendor_storage_rm>;
status = "okay";
};
};
&display_subsystem {
memory-region = <&drm_logo>;
memory-region-names = "drm-logo";
};
&dfi {
status = "okay";
};
&dmc {
status = "okay";
center-supply = <&vdd_ddr_s0>;
mem-supply = <&vdd_log_s0>;
};
&rng {
status = "okay";
};
&vop {
support-multi-area;
};