android13/kernel-5.10/arch/arm64/boot/dts/rockchip/rk3588-evb7-v11.dtsi

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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2022 Rockchip Electronics Co., Ltd.
*
*/
#include "dt-bindings/usb/pd.h"
#include "rk3588.dtsi"
#include "rk3588-evb.dtsi"
#include "rk3588-rk806-single.dtsi"
/ {
/* If hdmirx node is disabled, delete the reserved-memory node here. */
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
/* Reserve 128MB memory for hdmirx-controller@fdee0000 */
cma {
compatible = "shared-dma-pool";
reusable;
reg = <0x0 (256 * 0x100000) 0x0 (128 * 0x100000)>;
linux,cma-default;
};
};
es8388_sound: es8388-sound {
status = "okay";
compatible = "rockchip,multicodecs-card";
rockchip,card-name = "rockchip-es8388";
hp-det-gpio = <&gpio1 RK_PC4 GPIO_ACTIVE_LOW>;
io-channels = <&saradc 3>;
io-channel-names = "adc-detect";
keyup-threshold-microvolt = <1800000>;
poll-interval = <100>;
spk-con-gpio = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>;
hp-con-gpio = <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>;
rockchip,format = "i2s";
rockchip,mclk-fs = <256>;
rockchip,cpu = <&i2s0_8ch>;
rockchip,codec = <&es8388>;
rockchip,audio-routing =
"Headphone", "LOUT1",
"Headphone", "ROUT1",
"Speaker", "LOUT2",
"Speaker", "ROUT2",
"Headphone", "Headphone Power",
"Headphone", "Headphone Power",
"Speaker", "Speaker Power",
"Speaker", "Speaker Power",
"LINPUT1", "Main Mic",
"LINPUT2", "Main Mic",
"RINPUT1", "Headset Mic",
"RINPUT2", "Headset Mic";
pinctrl-names = "default";
pinctrl-0 = <&hp_det>;
play-pause-key {
label = "playpause";
linux,code = <KEY_PLAYPAUSE>;
press-threshold-microvolt = <2000>;
};
};
fan: pwm-fan {
compatible = "pwm-fan";
#cooling-cells = <2>;
pwms = <&pwm3 0 50000 0>;
cooling-levels = <0 50 100 150 200 255>;
rockchip,temp-trips = <
50000 1
55000 2
60000 3
65000 4
70000 5
>;
};
hdmiin-sound {
compatible = "rockchip,hdmi";
rockchip,mclk-fs = <128>;
rockchip,format = "i2s";
rockchip,bitclock-master = <&hdmirx_ctrler>;
rockchip,frame-master = <&hdmirx_ctrler>;
rockchip,card-name = "rockchip,hdmiin";
rockchip,cpu = <&i2s7_8ch>;
rockchip,codec = <&hdmirx_ctrler 0>;
rockchip,jack-det;
};
pcie20_avdd0v85: pcie20-avdd0v85 {
compatible = "regulator-fixed";
regulator-name = "pcie20_avdd0v85";
regulator-boot-on;
regulator-always-on;
regulator-min-microvolt = <850000>;
regulator-max-microvolt = <850000>;
vin-supply = <&vdd_0v85_s0>;
};
pcie20_avdd1v8: pcie20-avdd1v8 {
compatible = "regulator-fixed";
regulator-name = "pcie20_avdd1v8";
regulator-boot-on;
regulator-always-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
vin-supply = <&avcc_1v8_s0>;
};
pcie30_avdd0v75: pcie30-avdd0v75 {
compatible = "regulator-fixed";
regulator-name = "pcie30_avdd0v75";
regulator-boot-on;
regulator-always-on;
regulator-min-microvolt = <750000>;
regulator-max-microvolt = <750000>;
vin-supply = <&avdd_0v75_s0>;
};
pcie30_avdd1v8: pcie30-avdd1v8 {
compatible = "regulator-fixed";
regulator-name = "pcie30_avdd1v8";
regulator-boot-on;
regulator-always-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
vin-supply = <&avcc_1v8_s0>;
};
sdio_pwrseq: sdio-pwrseq {
compatible = "mmc-pwrseq-simple";
clocks = <&hym8563>;
clock-names = "ext_clock";
pinctrl-names = "default";
pinctrl-0 = <&wifi_enable_h>;
/*
* On the module itself this is one of these (depending
* on the actual card populated):
* - SDIO_RESET_L_WL_REG_ON
* - PDN (power down when low)
*/
post-power-on-delay-ms = <200>;
reset-gpios = <&gpio0 RK_PC4 GPIO_ACTIVE_LOW>;
};
rk_headset: rk-headset {
status = "disabled";
compatible = "rockchip_headset";
headset_gpio = <&gpio1 RK_PD5 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&hp_det>;
io-channels = <&saradc 3>;
};
vcc_1v1_nldo_s3: vcc-1v1-nldo-s3 {
compatible = "regulator-fixed";
regulator-name = "vcc_1v1_nldo_s3";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1100000>;
vin-supply = <&vcc5v0_sys>;
};
vbus5v0_typec: vbus5v0-typec {
compatible = "regulator-fixed";
regulator-name = "vbus5v0_typec";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
gpio = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>;
vin-supply = <&vcc5v0_usb>;
pinctrl-names = "default";
pinctrl-0 = <&typec5v_pwren>;
};
vcc3v3_lcd_n: vcc3v3-lcd0-n {
compatible = "regulator-fixed";
regulator-name = "vcc3v3_lcd0_n";
regulator-boot-on;
enable-active-high;
gpio = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>;
vin-supply = <&vcc_1v8_s0>;
};
vcc3v3_pcie30: vcc3v3-pcie30 {
compatible = "regulator-fixed";
regulator-name = "vcc3v3_pcie30";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
enable-active-high;
gpios = <&gpio2 RK_PC5 GPIO_ACTIVE_HIGH>;
startup-delay-us = <5000>;
vin-supply = <&vcc12v_dcin>;
};
vcc5v0_host: vcc5v0-host {
compatible = "regulator-fixed";
regulator-name = "vcc5v0_host";
regulator-boot-on;
regulator-always-on;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
gpio = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>;
vin-supply = <&vcc5v0_usb>;
pinctrl-names = "default";
pinctrl-0 = <&vcc5v0_host_en>;
};
vcc_mipicsi0: vcc-mipicsi0-regulator {
compatible = "regulator-fixed";
gpio = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&mipicsi0_pwr>;
regulator-name = "vcc_mipicsi0";
enable-active-high;
};
vcc_mipicsi1: vcc-mipicsi1-regulator {
compatible = "regulator-fixed";
gpio = <&gpio1 RK_PD3 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&mipicsi1_pwr>;
regulator-name = "vcc_mipicsi1";
enable-active-high;
};
vcc_mipidcphy0: vcc-mipidcphy0-regulator {
compatible = "regulator-fixed";
gpio = <&gpio2 RK_PC4 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&mipidcphy0_pwr>;
regulator-name = "vcc_mipidcphy0";
enable-active-high;
};
vcc_3v3_sd_s0: vcc-3v3-sd-s0-regulator {
compatible = "regulator-fixed";
gpio = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&sd_s0_pwr>;
regulator-name = "vcc_3v3_sd_s0";
enable-active-high;
};
wireless_bluetooth: wireless-bluetooth {
compatible = "bluetooth-platdata";
clocks = <&hym8563>;
clock-names = "ext_clock";
uart_rts_gpios = <&gpio4 RK_PC4 GPIO_ACTIVE_LOW>;
pinctrl-names = "default", "rts_gpio";
pinctrl-0 = <&uart9m0_rtsn>, <&bt_reset_gpio>, <&bt_wake_gpio>, <&bt_irq_gpio>;
pinctrl-1 = <&uart9_gpios>;
BT,reset_gpio = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>;
BT,wake_gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
BT,wake_host_irq = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;
status = "okay";
};
wireless_wlan: wireless-wlan {
compatible = "wlan-platdata";
wifi_chip_type = "ap6398s";
pinctrl-names = "default";
pinctrl-0 = <&wifi_host_wake_irq>;
WIFI,host_wake_irq = <&gpio0 RK_PB2 GPIO_ACTIVE_HIGH>;
WIFI,poweren_gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>;
status = "okay";
};
};
&backlight {
pwms = <&pwm1 0 25000 0>;
status = "okay";
};
&combphy0_ps {
status = "okay";
};
&combphy1_ps {
status = "okay";
};
&combphy2_psu {
status = "okay";
};
&dp0 {
status = "okay";
};
&dp0_in_vp2 {
status = "okay";
};
&dp0_sound{
status = "okay";
};
&dp1 {
pinctrl-names = "default";
pinctrl-0 = <&dp1m0_pins>;
status = "okay";
};
&dp1_in_vp2 {
status = "okay";
};
/*
* mipi_dcphy0 needs to be enabled
* when dsi0 is enabled
*/
&dsi0 {
status = "okay";
};
&dsi0_in_vp2 {
status = "disabled";
};
&dsi0_in_vp3 {
status = "okay";
};
&dsi0_panel {
power-supply = <&vcc3v3_lcd_n>;
reset-gpios = <&gpio0 RK_PD3 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&lcd_rst_gpio>;
};
/*
* mipi_dcphy1 needs to be enabled
* when dsi1 is enabled
*/
&dsi1 {
status = "disabled";
};
&dsi1_in_vp2 {
status = "disabled";
};
&dsi1_in_vp3 {
status = "disabled";
};
&dsi1_panel {
power-supply = <&vcc3v3_lcd_n>;
/*
* because in hardware, the two screens share the reset pin,
* so reset-gpios need only in dsi1 enable and dsi0 disabled
* case.
*/
//reset-gpios = <&gpio0 RK_PD3 GPIO_ACTIVE_LOW>;
//pinctrl-names = "default";
//pinctrl-0 = <&lcd_rst_gpio>;
};
&gmac1 {
/* Use rgmii-rxid mode to disable rx delay inside Soc */
phy-mode = "rgmii-rxid";
clock_in_out = "output";
snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
snps,reset-active-low;
/* Reset time is 20ms, 100ms for rtl8211f */
snps,reset-delays-us = <0 20000 100000>;
pinctrl-names = "default";
pinctrl-0 = <&gmac1_miim
&gmac1_tx_bus2
&gmac1_rx_bus2
&gmac1_rgmii_clk
&gmac1_rgmii_bus>;
tx_delay = <0x43>;
/* rx_delay = <0x3f>; */
phy-handle = <&rgmii_phy>;
status = "okay";
};
&hdmi0 {
enable-gpios = <&gpio4 RK_PB1 GPIO_ACTIVE_HIGH>;
status = "okay";
};
&hdmi0_in_vp0 {
status = "okay";
};
&hdmi0_sound {
status = "okay";
};
&hdmi1 {
enable-gpios = <&gpio4 RK_PB2 GPIO_ACTIVE_HIGH>;
status = "okay";
};
&hdmi1_in_vp1 {
status = "okay";
};
&hdmi1_sound {
status = "okay";
};
/* Should work with at least 128MB cma reserved above. */
&hdmirx_ctrler {
status = "okay";
#sound-dai-cells = <1>;
/* Effective level used to trigger HPD: 0-low, 1-high */
hpd-trigger-level = <1>;
hdmirx-det-gpios = <&gpio1 RK_PD5 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&hdmim1_rx &hdmirx_det>;
};
&hdptxphy_hdmi0 {
status = "okay";
};
&hdptxphy_hdmi1 {
status = "okay";
};
&i2c0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&i2c0m2_xfer>;
vdd_cpu_big0_s0: vdd_cpu_big0_mem_s0: rk8602@42 {
compatible = "rockchip,rk8602";
reg = <0x42>;
vin-supply = <&vcc5v0_sys>;
regulator-compatible = "rk860x-reg";
regulator-name = "vdd_cpu_big0_s0";
regulator-min-microvolt = <550000>;
regulator-max-microvolt = <1050000>;
regulator-ramp-delay = <2300>;
rockchip,suspend-voltage-selector = <1>;
regulator-boot-on;
regulator-always-on;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vdd_cpu_big1_s0: vdd_cpu_big1_mem_s0: rk8603@43 {
compatible = "rockchip,rk8603";
reg = <0x43>;
vin-supply = <&vcc5v0_sys>;
regulator-compatible = "rk860x-reg";
regulator-name = "vdd_cpu_big1_s0";
regulator-min-microvolt = <550000>;
regulator-max-microvolt = <1050000>;
regulator-ramp-delay = <2300>;
rockchip,suspend-voltage-selector = <1>;
regulator-boot-on;
regulator-always-on;
regulator-state-mem {
regulator-off-in-suspend;
};
};
};
&i2c1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&i2c1m2_xfer>;
vdd_npu_s0: vdd_npu_mem_s0: rk8602@42 {
compatible = "rockchip,rk8602";
reg = <0x42>;
vin-supply = <&vcc5v0_sys>;
regulator-compatible = "rk860x-reg";
regulator-name = "vdd_npu_s0";
regulator-min-microvolt = <550000>;
regulator-max-microvolt = <950000>;
regulator-ramp-delay = <2300>;
rockchip,suspend-voltage-selector = <1>;
regulator-boot-on;
regulator-always-on;
regulator-state-mem {
regulator-off-in-suspend;
};
};
};
&i2c4 {
status = "okay";
pinctrl-0 = <&i2c4m1_xfer>;
ls_stk3332: light@47 {
compatible = "ls_stk3332";
status = "disabled";
reg = <0x47>;
type = <SENSOR_TYPE_LIGHT>;
irq_enable = <0>;
als_threshold_high = <100>;
als_threshold_low = <10>;
als_ctrl_gain = <2>; /* 0:x1 1:x4 2:x16 3:x64 */
poll_delay_ms = <100>;
};
ps_stk3332: proximity@47 {
compatible = "ps_stk3332";
status = "disabled";
reg = <0x47>;
type = <SENSOR_TYPE_PROXIMITY>;
//pinctrl-names = "default";
//pinctrl-0 = <&gpio3_c6>;
//irq-gpio = <&gpio3 RK_PC6 IRQ_TYPE_LEVEL_LOW>;
//irq_enable = <1>;
ps_threshold_high = <0x200>;
ps_threshold_low = <0x100>;
ps_ctrl_gain = <3>; /* 0:x1 1:x2 2:x5 3:x8 */
ps_led_current = <4>; /* 0:3.125mA 1:6.25mA 2:12.5mA 3:25mA 4:50mA 5:100mA*/
poll_delay_ms = <100>;
};
icm42607_acc: icm_acc@68 {
status = "okay";
compatible = "icm42607_acc";
reg = <0x68>;
irq-gpio = <&gpio4 RK_PC2 IRQ_TYPE_EDGE_RISING>;
irq_enable = <0>;
poll_delay_ms = <30>;
type = <SENSOR_TYPE_ACCEL>;
layout = <0>;
};
icm42607_gyro: icm_gyro@68 {
status = "okay";
compatible = "icm42607_gyro";
reg = <0x68>;
poll_delay_ms = <30>;
type = <SENSOR_TYPE_GYROSCOPE>;
layout = <0>;
};
};
&i2c5 {
status = "okay";
gt1x: gt1x@14 {
compatible = "goodix,gt1x";
reg = <0x14>;
pinctrl-names = "default";
pinctrl-0 = <&touch_gpio>;
goodix,rst-gpio = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>;
goodix,irq-gpio = <&gpio3 RK_PC0 IRQ_TYPE_LEVEL_LOW>;
power-supply = <&vcc3v3_lcd_n>;
};
};
&i2c6 {
status = "okay";
usbc0: husb311@4e {
compatible = "hynetek,husb311";
reg = <0x4e>;
interrupt-parent = <&gpio3>;
interrupts = <RK_PB6 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&usbc0_int>;
vbus-supply = <&vbus5v0_typec>;
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
usbc0_role_sw: endpoint@0 {
remote-endpoint = <&dwc3_0_role_switch>;
};
};
};
usb_con: connector {
compatible = "usb-c-connector";
label = "USB-C";
data-role = "dual";
power-role = "dual";
try-power-role = "sink";
op-sink-microwatt = <1000000>;
sink-pdos =
<PDO_FIXED(5000, 1000, PDO_FIXED_USB_COMM)>;
source-pdos =
<PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
altmodes {
#address-cells = <1>;
#size-cells = <0>;
altmode@0 {
reg = <0>;
svid = <0xff01>;
vdo = <0xffffffff>;
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
usbc0_orien_sw: endpoint {
remote-endpoint = <&usbdp_phy0_orientation_switch>;
};
};
port@1 {
reg = <1>;
dp_altmode_mux: endpoint {
remote-endpoint = <&usbdp_phy0_dp_altmode_mux>;
};
};
};
};
};
hym8563: hym8563@51 {
compatible = "haoyu,hym8563";
reg = <0x51>;
#clock-cells = <0>;
clock-frequency = <32768>;
clock-output-names = "hym8563";
pinctrl-names = "default";
pinctrl-0 = <&hym8563_int>;
interrupt-parent = <&gpio0>;
interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>;
wakeup-source;
};
};
&i2c7 {
status = "okay";
es8388: es8388@11 {
status = "okay";
#sound-dai-cells = <0>;
compatible = "everest,es8388", "everest,es8323";
reg = <0x11>;
clocks = <&mclkout_i2s0>;
clock-names = "mclk";
assigned-clocks = <&mclkout_i2s0>;
assigned-clock-rates = <12288000>;
pinctrl-names = "default";
pinctrl-0 = <&i2s0_mclk>;
};
};
&i2s5_8ch {
status = "okay";
};
&i2s6_8ch {
status = "okay";
};
&i2s7_8ch {
status = "okay";
};
&mdio1 {
rgmii_phy: phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0x1>;
};
};
&mipi_dcphy0 {
status = "okay";
};
&mipi_dcphy1 {
status = "disabled";
};
&pcie2x1l0 {
reset-gpios = <&gpio1 RK_PB4 GPIO_ACTIVE_HIGH>;
status = "okay";
};
&pcie30phy {
rockchip,pcie30-phymode = <PHY_MODE_PCIE_AGGREGATION>;
status = "okay";
};
&pcie3x4 {
reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc3v3_pcie30>;
pinctrl-names = "default";
pinctrl-0 = <&pcie20x1_0_clkreqn_m1>;
status = "okay";
};
&pinctrl {
cam {
mipicsi0_pwr: mipicsi0-pwr {
rockchip,pins =
/* camera power en */
<1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
};
mipicsi1_pwr: mipicsi1-pwr {
rockchip,pins =
/* camera power en */
<1 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
};
mipidcphy0_pwr: mipidcphy0-pwr {
rockchip,pins =
/* camera power en */
<2 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
hdmi {
hdmirx_det: hdmirx-det {
rockchip,pins = <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
headphone {
hp_det: hp-det {
rockchip,pins = <1 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
hym8563 {
hym8563_int: hym8563-int {
rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
lcd {
lcd_rst_gpio: lcd-rst-gpio {
rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
leds {
work_leds_gpio: work-leds-gpio {
rockchip,pins = <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_down>;
};
};
sdio-pwrseq {
wifi_enable_h: wifi-enable-h {
rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
sdmmc {
sd_s0_pwr: sd-s0-pwr {
rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
touch {
touch_gpio: touch-gpio {
rockchip,pins =
<3 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>,
<3 RK_PC0 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
usb {
vcc5v0_host_en: vcc5v0-host-en {
rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
usb-typec {
usbc0_int: usbc0-int {
rockchip,pins = <3 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up>;
};
typec5v_pwren: typec5v-pwren {
rockchip,pins = <3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
wireless-bluetooth {
uart9_gpios: uart9-gpios {
rockchip,pins = <4 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>;
};
bt_reset_gpio: bt-reset-gpio {
rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
};
bt_wake_gpio: bt-wake-gpio {
rockchip,pins = <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
};
bt_irq_gpio: bt-irq-gpio {
rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
wireless-wlan {
wifi_host_wake_irq: wifi-host-wake-irq {
rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_down>;
};
};
pcie {
pcie20x1_0_clkreqn_m1: pcie20x1-0-clkreqn-m1 {
rockchip,pins = <4 RK_PB4 RK_FUNC_GPIO &pcfg_output_low>;
};
};
};
&pwm1 {
status = "okay";
};
&pwm3 {
pinctrl-0 = <&pwm3m1_pins>;
status = "okay";
};
&route_dsi0 {
status = "okay";
connect = <&vp3_out_dsi0>;
};
&route_dsi1 {
status = "disabled";
connect = <&vp3_out_dsi1>;
};
&route_hdmi0 {
status = "okay";
};
&route_hdmi1 {
status = "okay";
};
&sata0 {
status = "okay";
};
&sdio {
max-frequency = <150000000>;
no-sd;
no-mmc;
bus-width = <4>;
disable-wp;
cap-sd-highspeed;
cap-sdio-irq;
keep-power-in-suspend;
mmc-pwrseq = <&sdio_pwrseq>;
non-removable;
pinctrl-names = "default";
pinctrl-0 = <&sdiom0_pins>;
sd-uhs-sdr104;
status = "okay";
};
&sdmmc {
status = "okay";
vmmc-supply = <&vcc_3v3_sd_s0>;
};
&uart9 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart9m0_xfer &uart9m0_ctsn>;
};
&u2phy0_otg {
rockchip,typec-vbus-det;
};
&u2phy1_otg {
phy-supply = <&vcc5v0_host>;
};
&u2phy2_host {
phy-supply = <&vcc5v0_host>;
};
&u2phy3_host {
phy-supply = <&vcc5v0_host>;
};
&usbdp_phy0 {
orientation-switch;
svid = <0xff01>;
sbu1-dc-gpios = <&gpio4 RK_PA0 GPIO_ACTIVE_HIGH>;
sbu2-dc-gpios = <&gpio4 RK_PA1 GPIO_ACTIVE_HIGH>;
port {
#address-cells = <1>;
#size-cells = <0>;
usbdp_phy0_orientation_switch: endpoint@0 {
reg = <0>;
remote-endpoint = <&usbc0_orien_sw>;
};
usbdp_phy0_dp_altmode_mux: endpoint@1 {
reg = <1>;
remote-endpoint = <&dp_altmode_mux>;
};
};
};
&usbdp_phy1 {
rockchip,dp-lane-mux = <0 1 2 3>;
};
&usbdrd_dwc3_0 {
dr_mode = "otg";
usb-role-switch;
port {
#address-cells = <1>;
#size-cells = <0>;
dwc3_0_role_switch: endpoint@0 {
reg = <0>;
remote-endpoint = <&usbc0_role_sw>;
};
};
};
&usbhost3_0 {
status = "disabled";
};
&usbhost_dwc3_0 {
status = "disabled";
};
&work_led {
gpios = <&gpio1 RK_PC6 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&work_leds_gpio>;
};