253 lines
4.8 KiB
Plaintext
253 lines
4.8 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2023 Rockchip Electronics Co., Ltd.
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*
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*/
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#include "rk3588m.dtsi"
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#include "rk3588-vehicle-s66.dtsi"
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#include "rk3588-rk806-dual.dtsi"
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/ {
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pcie20_avdd0v85: pcie20-avdd0v85 {
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compatible = "regulator-fixed";
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regulator-name = "pcie20_avdd0v85";
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regulator-boot-on;
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regulator-always-on;
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regulator-min-microvolt = <850000>;
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regulator-max-microvolt = <850000>;
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vin-supply = <&vdd_0v85_s0>;
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};
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pcie20_avdd1v8: pcie20-avdd1v8 {
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compatible = "regulator-fixed";
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regulator-name = "pcie20_avdd1v8";
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regulator-boot-on;
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regulator-always-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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vin-supply = <&avcc_1v8_s0>;
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};
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pcie30_avdd0v75: pcie30-avdd0v75 {
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compatible = "regulator-fixed";
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regulator-name = "pcie30_avdd0v75";
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regulator-boot-on;
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regulator-always-on;
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regulator-min-microvolt = <750000>;
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regulator-max-microvolt = <750000>;
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vin-supply = <&avdd_0v75_s0>;
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};
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pcie30_avdd1v8: pcie30-avdd1v8 {
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compatible = "regulator-fixed";
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regulator-name = "pcie30_avdd1v8";
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regulator-boot-on;
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regulator-always-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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vin-supply = <&avcc_1v8_s0>;
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};
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vcc3v3_pcie_wifi: vcc3v3-pcie-wifi {
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compatible = "regulator-fixed";
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regulator-name = "vcc3v3_pcie_wifi";
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regulator-always-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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enable-active-high;
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gpios = <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>;
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startup-delay-us = <5000>;
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vin-supply = <&vcc_3v3_s0>;
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};
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vcc5v0_host: vcc5v0-host {
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compatible = "regulator-fixed";
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regulator-name = "vcc5v0_host";
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regulator-boot-on;
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regulator-always-on;
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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enable-active-high;
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//gpio = <&gpio4 RK_PA3 GPIO_ACTIVE_HIGH>;
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vin-supply = <&vcc5v0_usb>;
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//pinctrl-names = "default";
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//pinctrl-0 = <&vcc5v0_host_en>;
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//TODO: should powered by MCU
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};
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wireless_bluetooth: wireless-bluetooth {
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compatible = "bluetooth-platdata";
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BT,reset_gpio = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>;
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status = "okay";
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};
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wireless_wlan: wireless-wlan {
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compatible = "wlan-platdata";
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wifi_chip_type = "ap6398s";
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WIFI,poweren_gpio = <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>;
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status = "okay";
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};
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};
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&combphy0_ps {
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status = "okay";
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};
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&combphy1_ps {
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status = "okay";
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};
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&combphy2_psu {
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status = "okay";
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};
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&gmac0 {
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/* Use rgmii-rxid mode to disable rx delay inside Soc */
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phy-mode = "rgmii-rxid";
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clock_in_out = "output";
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snps,reset-gpio = <&gpio2 RK_PC5 GPIO_ACTIVE_LOW>;
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snps,reset-active-low;
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/* Reset time is 20ms, 100ms for rtl8211f */
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snps,reset-delays-us = <0 20000 100000>;
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pinctrl-0 = <&gmac0_miim
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&gmac0_tx_bus2
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&gmac0_rx_bus2
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&gmac0_rgmii_clk
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&gmac0_rgmii_bus>;
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tx_delay = <0x43>;
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//rx_delay = <0x3f>;
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phy-handle = <&rgmii_phy>;
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status = "okay";
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};
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&i2c3 {
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status = "okay";
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iam20680_acc: acc@69 {
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compatible = "iam20680_acc";
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reg = <0x69>;
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irq-gpio = <&gpio1 RK_PC2 IRQ_TYPE_LEVEL_LOW>;
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irq_enable = <1>;
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poll_delay_ms = <30>;
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type = <SENSOR_TYPE_ACCEL>;
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layout = <1>;
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};
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iam20680_gyro: gyro@69 {
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compatible = "iam20680_gyro";
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reg = <0x69>;
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irq_enable = <0>;
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poll_delay_ms = <30>;
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type = <SENSOR_TYPE_GYROSCOPE>;
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layout = <1>;
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};
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//todo, add mfi
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};
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&i2c4 {
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status = "okay";
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pinctrl-0 = <&i2c4m0_xfer>;
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//todo, add LT9211
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};
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&mdio0 {
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rgmii_phy: phy@1 {
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compatible = "ethernet-phy-ieee802.3-c22";
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reg = <0x1>;
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};
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};
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&pcie2x1l0 {
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status = "disabled";
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};
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&pcie2x1l1 {
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status = "disabled";
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};
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&pcie2x1l2 {
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reset-gpios = <&gpio4 RK_PC1 GPIO_ACTIVE_HIGH>;
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rockchip,skip-scan-in-resume;
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rockchip,perst-inactive-ms = <500>;
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vpcie3v3-supply = <&vcc3v3_pcie_wifi>;
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status = "okay";
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};
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&pcie30phy {
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rockchip,pcie30-phymode = <PHY_MODE_PCIE_NABIBI>;
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status = "disabled";
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};
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&pcie3x4 {
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num-lanes = <1>;
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status = "disabled";
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};
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&sata0 {
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status = "disabled";
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};
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&sdmmc {
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status = "disabled";
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};
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&uart1 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&uart1m1_xfer &uart1m1_ctsn &uart1m1_rtsn>;
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};
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&u2phy1_otg {
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phy-supply = <&vcc5v0_host>;
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};
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&u2phy2_host {
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phy-supply = <&vcc5v0_host>;
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};
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&u2phy3_host {
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phy-supply = <&vcc5v0_host>;
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};
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&usbdp_phy0 {
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rockchip,dp-lane-mux = <2 3>;
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status = "okay";
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};
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&usbdp_phy0_dp {
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status = "okay";
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};
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&usbdp_phy0_u3 {
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status = "okay";
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};
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&usbdp_phy1 {
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rockchip,dp-lane-mux = <3 2 1 0>;
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status = "disabled";
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};
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&usbdp_phy1_dp {
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status = "disabled";
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};
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&usbdp_phy1_u3 {
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maximum-speed = "high-speed";
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status = "okay";
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};
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&usbdrd_dwc3_0 {
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dr_mode = "peripheral";
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maximum-speed = "high-speed";
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extcon = <&u2phy0>;
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status = "okay";
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};
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&usbdrd_dwc3_1 {
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dr_mode = "host";
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maximum-speed = "high-speed";
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snps,dis_u2_susphy_quirk;
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status = "okay";
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};
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