346 lines
6.3 KiB
Plaintext
346 lines
6.3 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2021 Rockchip Electronics Co., Ltd.
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*
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*/
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&csi2_dcphy0 {
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status = "okay";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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dp_mipi_in: endpoint@1 {
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reg = <1>;
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remote-endpoint = <<7911d_out>;
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data-lanes = <1 2 3 4>;
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};
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mipi_in_dcphy0: endpoint@2 {
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reg = <2>;
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remote-endpoint = <&ov50c40_out0>;
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data-lanes = <1 2 3 4>;
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};
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};
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port@1 {
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reg = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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csidcphy0_out: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&mipi0_csi2_input>;
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};
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};
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};
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};
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&csi2_dcphy1 {
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status = "okay";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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mipi_in_dcphy1: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&ov50c40_out1>;
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data-lanes = <1 2 3 4>;
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};
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};
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port@1 {
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reg = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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csidcphy1_out: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&mipi1_csi2_input>;
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};
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};
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};
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};
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&i2c6 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&i2c6m4_xfer>;
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aw8601: aw8601@c {
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compatible = "awinic,aw8601";
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status = "okay";
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reg = <0x0c>;
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rockchip,vcm-start-current = <56>;
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rockchip,vcm-rated-current = <96>;
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rockchip,vcm-step-mode = <4>;
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rockchip,camera-module-index = <0>;
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rockchip,camera-module-facing = "back";
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};
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lt7911d: lt7911d@2b {
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compatible = "lontium,lt7911d";
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status = "okay";
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reg = <0x2b>;
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clocks = <&cru CLK_MIPI_CAMARAOUT_M1>;
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clock-names = "xvclk";
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interrupt-parent = <&gpio3>;
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interrupts = <RK_PD4 IRQ_TYPE_EDGE_RISING>;
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power-domains = <&power RK3588_PD_VI>;
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pinctrl-names = "default";
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pinctrl-0 = <&mipim1_camera1_clk>;
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reset-gpios = <&gpio3 RK_PC4 GPIO_ACTIVE_LOW>;
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power-gpios = <&gpio1 RK_PA6 GPIO_ACTIVE_HIGH>;
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// hpd-ctl-gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>;
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// plugin-det-gpios = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>;
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rockchip,camera-module-index = <0>;
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rockchip,camera-module-facing = "back";
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rockchip,camera-module-name = "LT7911D";
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rockchip,camera-module-lens-name = "NC";
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port {
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lt7911d_out: endpoint {
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remote-endpoint = <&dp_mipi_in>;
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data-lanes = <1 2 3 4>;
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};
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};
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};
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ov50c40: ov50c40@36 {
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compatible = "ovti,ov50c40";
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status = "okay";
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reg = <0x36>;
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clocks = <&cru CLK_MIPI_CAMARAOUT_M1>;
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clock-names = "xvclk";
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power-domains = <&power RK3588_PD_VI>;
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pinctrl-names = "default";
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pinctrl-0 = <&mipim1_camera1_clk>;
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rockchip,grf = <&sys_grf>;
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reset-gpios = <&gpio3 RK_PC4 GPIO_ACTIVE_LOW>;
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pwdn-gpios = <&gpio3 RK_PD4 GPIO_ACTIVE_LOW>;
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rockchip,camera-module-index = <0>;
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rockchip,camera-module-facing = "back";
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rockchip,camera-module-name = "HZGA06";
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rockchip,camera-module-lens-name = "ZE0082C1";
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eeprom-ctrl = <&otp_eeprom>;
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lens-focus = <&aw8601>;
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port {
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ov50c40_out0: endpoint {
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remote-endpoint = <&mipi_in_dcphy0>;
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data-lanes = <1 2 3 4>;
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};
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};
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};
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otp_eeprom: otp_eeprom@50 {
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compatible = "rk,otp_eeprom";
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status = "okay";
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reg = <0x50>;
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};
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};
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&i2c7 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&i2c7m2_xfer>;
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aw8601b: aw8601b@c {
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compatible = "awinic,aw8601";
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status = "okay";
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reg = <0x0c>;
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rockchip,vcm-start-current = <56>;
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rockchip,vcm-rated-current = <96>;
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rockchip,vcm-step-mode = <4>;
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rockchip,camera-module-index = <1>;
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rockchip,camera-module-facing = "back";
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};
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ov50c40b: ov50c40b@36 {
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compatible = "ovti,ov50c40";
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status = "okay";
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reg = <0x36>;
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clocks = <&cru CLK_MIPI_CAMARAOUT_M2>;
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clock-names = "xvclk";
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power-domains = <&power RK3588_PD_VI>;
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pinctrl-names = "default";
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pinctrl-0 = <&mipim1_camera2_clk>;
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rockchip,grf = <&sys_grf>;
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reset-gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_LOW>;
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pwdn-gpios = <&gpio3 RK_PD5 GPIO_ACTIVE_LOW>;
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rockchip,camera-module-index = <1>;
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rockchip,camera-module-facing = "back";
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rockchip,camera-module-name = "HZGA06";
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rockchip,camera-module-lens-name = "ZE0082C1";
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eeprom-ctrl = <&otp_eeprom_b>;
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lens-focus = <&aw8601b>;
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port {
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ov50c40_out1: endpoint {
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remote-endpoint = <&mipi_in_dcphy1>;
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data-lanes = <1 2 3 4>;
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};
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};
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};
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otp_eeprom_b: otp_eeprom_b@50 {
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compatible = "rk,otp_eeprom";
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status = "okay";
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reg = <0x50>;
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};
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};
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&mipi_dcphy0 {
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status = "okay";
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};
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&mipi_dcphy1 {
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status = "okay";
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};
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&mipi0_csi2 {
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status = "okay";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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mipi0_csi2_input: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&csidcphy0_out>;
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};
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};
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port@1 {
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reg = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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mipi0_csi2_output: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&cif_mipi_in0>;
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};
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};
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};
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};
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&mipi1_csi2 {
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status = "okay";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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mipi1_csi2_input: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&csidcphy1_out>;
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};
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};
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port@1 {
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reg = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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mipi1_csi2_output: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&cif_mipi_in1>;
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};
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};
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};
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};
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&rkcif {
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status = "okay";
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};
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&rkcif_mipi_lvds {
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status = "okay";
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port {
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cif_mipi_in0: endpoint {
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remote-endpoint = <&mipi0_csi2_output>;
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};
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};
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};
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&rkcif_mipi_lvds_sditf {
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status = "okay";
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port {
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mipi_lvds_sditf: endpoint {
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remote-endpoint = <&isp1_in1>;
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};
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};
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};
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&rkcif_mipi_lvds1 {
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status = "okay";
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port {
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cif_mipi_in1: endpoint {
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remote-endpoint = <&mipi1_csi2_output>;
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};
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};
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};
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&rkcif_mipi_lvds1_sditf {
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status = "okay";
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port {
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mipi1_lvds_sditf: endpoint {
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remote-endpoint = <&isp1_in2>;
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};
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};
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};
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&rkcif_mmu {
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status = "okay";
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};
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&rkisp_unite {
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status = "okay";
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};
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&rkisp_unite_mmu {
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status = "okay";
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};
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&rkisp0_vir0 {
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status = "okay";
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/*
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* dual isp process image case
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* other rkisp hw and virtual nodes should disabled
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*/
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rockchip,hw = <&rkisp_unite>;
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port {
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#address-cells = <1>;
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#size-cells = <0>;
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isp1_in1: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&mipi_lvds_sditf>;
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};
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isp1_in2: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&mipi1_lvds_sditf>;
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};
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};
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};
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