181 lines
3.0 KiB
Plaintext
181 lines
3.0 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2022 Rockchip Electronics Co., Ltd.
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*
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*/
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/ {
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vcc_mipidcphy0: vcc-mipidcphy0-regulator {
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compatible = "regulator-fixed";
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gpio = <&gpio1 RK_PB3 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&mipidcphy0_pwr>;
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regulator-name = "vcc_mipidcphy0";
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enable-active-high;
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regulator-boot-on;
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regulator-always-on;
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};
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};
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&csi2_dcphy0 {
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status = "okay";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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mipi_in_ucam0: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&s5k3l6_out0>;
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data-lanes = <1 2 3 4>;
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};
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};
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port@1 {
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reg = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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csidcphy0_out: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&mipi0_csi2_input>;
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};
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};
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};
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};
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&i2c6 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&i2c6m4_xfer>;
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fp5510: fp5510@c {
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compatible = "fitipower,fp5510";
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status = "okay";
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reg = <0x0c>;
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rockchip,camera-module-index = <0>;
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rockchip,camera-module-facing = "back";
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};
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s5k3l6: s5k3l6@10 {
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compatible = "samsung,s5k3l6xx";
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reg = <0x10>;
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clocks = <&cru CLK_MIPI_CAMARAOUT_M1>;
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clock-names = "xvclk";
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power-domains = <&power RK3588_PD_VI>;
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pinctrl-names = "default";
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pinctrl-0 = <&mipim1_camera1_clk>;
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// power-gpios = <&gpio1 RK_PB3 GPIO_ACTIVE_HIGH>;
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reset-gpios = <&gpio4 RK_PA6 GPIO_ACTIVE_HIGH>;
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//pwdn-gpios = <&gpio1 RK_PA0 GPIO_ACTIVE_HIGH>;
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rockchip,camera-module-index = <0>;
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rockchip,camera-module-facing = "back";
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rockchip,camera-module-name = "default";
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rockchip,camera-module-lens-name = "default";
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lens-focus = <&fp5510>;
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port {
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s5k3l6_out0: endpoint {
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remote-endpoint = <&mipi_in_ucam0>;
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data-lanes = <1 2 3 4>;
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};
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};
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};
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};
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&mipi_dcphy0 {
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status = "okay";
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};
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&mipi0_csi2 {
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status = "okay";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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mipi0_csi2_input: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&csidcphy0_out>;
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};
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};
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port@1 {
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reg = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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mipi0_csi2_output: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&cif_mipi_in0>;
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};
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};
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};
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};
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&rkcif {
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status = "okay";
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};
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&rkcif_mipi_lvds {
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status = "okay";
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port {
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cif_mipi_in0: endpoint {
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remote-endpoint = <&mipi0_csi2_output>;
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};
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};
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};
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&rkcif_mipi_lvds_sditf {
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status = "okay";
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port {
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mipi_lvds_sditf: endpoint {
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remote-endpoint = <&isp0_vir0>;
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};
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};
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};
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&rkcif_mmu {
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status = "okay";
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};
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&rkisp0 {
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status = "okay";
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};
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&isp0_mmu {
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status = "okay";
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};
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&rkisp0_vir0 {
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status = "okay";
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port {
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#address-cells = <1>;
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#size-cells = <0>;
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isp0_vir0: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&mipi_lvds_sditf>;
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};
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};
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};
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&pinctrl {
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cam {
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mipidcphy0_pwr: mipidcphy0-pwr {
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rockchip,pins =
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/* camera power en */
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<1 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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};
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