5485 lines
169 KiB
C
5485 lines
169 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* ar0822 driver
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*
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* Copyright (C) 2023 Rockchip Electronics Co., Ltd.
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*
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* V0.0X01.0X00 first version.
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* V0.0X01.0X01 support conversion gain switch.
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* V0.0X01.0X02 add debug interface for conversion gain switch.
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* V0.0X01.0X03 support enum sensor fmt
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* V0.0X01.0X04 add quick stream on/off
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*/
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#include <linux/clk.h>
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#include <linux/device.h>
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#include <linux/delay.h>
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#include <linux/gpio/consumer.h>
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#include <linux/i2c.h>
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#include <linux/module.h>
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#include <linux/pm_runtime.h>
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#include <linux/regulator/consumer.h>
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#include <linux/sysfs.h>
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#include <linux/slab.h>
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#include <linux/version.h>
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#include <linux/rk-camera-module.h>
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#include <media/media-entity.h>
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#include <media/v4l2-async.h>
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#include <media/v4l2-ctrls.h>
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#include <media/v4l2-subdev.h>
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#include <linux/pinctrl/consumer.h>
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#include <linux/rk-preisp.h>
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#include "../platform/rockchip/isp/rkisp_tb_helper.h"
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#define DRIVER_VERSION KERNEL_VERSION(0, 0x01, 0x04)
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#ifndef V4L2_CID_DIGITAL_GAIN
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#define V4L2_CID_DIGITAL_GAIN V4L2_CID_GAIN
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#endif
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#define MIPI_FREQ_492M 492000000//500000000
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#define MIPI_FREQ_657M 657000000
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#define MIPI_FREQ_823M 823000000
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#define MIPI_FREQ_986M 986000000/*657M for 1.314Gbps,986M for 1.972Gbps */
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#define PIXEL_RATE_MAX (MIPI_FREQ_986M / 12 *2 * 4)
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#define OF_CAMERA_HDR_MODE "rockchip,camera-hdr-mode"
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#define AR0822_XVCLK_FREQ 27000000 /*MCLK* need to config if XCLK from SOC; open.k*/
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#define CHIP_ID 0x0F56
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#define AR0822_REG_CHIP_ID 0x3000
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#define AR0822_REG_CTRL_MODE 0x301A
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#define AR0822_MODE_SW_STANDBY 0x0018
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#define AR0822_MODE_STREAMING 0x001C
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#define AR0822_EXPOSURE_MIN 2 /* 最小曝光时间 行 * need to config; open.k*/
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#define AR0822_EXPOSURE_STEP 1
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#define AR0822_VTS_MAX 0xffff /* Frame length line; open.k*/
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#define AR0822_REG_EXP 0x3012
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#define AR0822_REG_GAIN 0x5900
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#define AR0822_REG_GAIN2 0x5902
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#define AR0822_REG_GAIN3 0x5904
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#define AR0822_GAIN_MIN 0
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#define AR0822_GAIN_MAX 119
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#define AR0822_GAIN_STEP 1
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#define AR0822_GAIN_DEFAULT 0x20
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#define AR0822_GROUP_UPDATE_ADDRESS 0x301A
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#define AR0822_GROUP_UPDATE_START_DATA 0x801C
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#define AR0822_GROUP_UPDATE_END_DATA 0x001C /* make sure exposure and gain take effect from N+2 frame; open.k*/
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#define AR0822_SOFTWARE_RESET_REG 0x301A
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#define AR0822_REG_VTS 0x300A
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#define REG_NULL 0xFFFF /* Flag address for I2C array write,indicate this is the last row of I2C register table; open.k*/
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#define REG_DELAY 0xFFFE
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#define AR0822_REG_VALUE_08BIT 1
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#define AR0822_REG_VALUE_16BIT 2
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#define AR0822_REG_VALUE_24BIT 3
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#define AR0822_LANES 4
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#define AR0822_BPP12 12
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#define AR0822_BPP14 14
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#define OF_CAMERA_PINCTRL_STATE_DEFAULT "rockchip,camera_default"
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#define OF_CAMERA_PINCTRL_STATE_SLEEP "rockchip,camera_sleep"
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#define AR0822_NAME "ar0822"
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#define USED_SYS_DEBUG
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/* sensor power on config, need check power, MCLK, GPIO etc,,, need go to .dts file to change the config; open.k */
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static const char * const ar0822_supply_names[] = {
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"avdd", /* Analog power */
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"dovdd", /* Digital I/O power */
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"dvdd", /* Digital core power */
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};
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#define AR0822_NUM_SUPPLIES ARRAY_SIZE(ar0822_supply_names)
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#define AR0822_FLIP_REG 0x3040
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#define MIRROR_BIT_MASK BIT(14)
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#define FLIP_BIT_MASK BIT(15)
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struct regval {
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u16 addr;
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u16 val;
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};
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/* Config resolution ,LLPCLK, FLL, exposure time,fps, MIPI channel config, HDR mode , open.k */
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struct ar0822_mode {
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u32 bus_fmt;
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u32 width;
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u32 height;
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struct v4l2_fract max_fps;
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u32 hts_def;
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u32 vts_def;
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u32 exp_def;
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const struct regval *reg_list;
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u32 hdr_mode;
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u32 mipi_freq;
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u32 mipi_rate;
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u32 vc[PAD_MAX];
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};
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struct ar0822 {
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struct i2c_client *client;
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struct clk *xvclk;
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struct gpio_desc *reset_gpio;
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struct gpio_desc *pwdn_gpio;
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struct regulator_bulk_data supplies[AR0822_NUM_SUPPLIES];
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struct pinctrl *pinctrl;
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struct pinctrl_state *pins_default;
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struct pinctrl_state *pins_sleep;
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struct v4l2_subdev subdev;
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struct media_pad pad;
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struct v4l2_ctrl_handler ctrl_handler;
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struct v4l2_ctrl *exposure;
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struct v4l2_ctrl *anal_gain;
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struct v4l2_ctrl *digi_gain;
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struct v4l2_ctrl *hblank;
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struct v4l2_ctrl *vblank;
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struct v4l2_ctrl *test_pattern;
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struct v4l2_ctrl *pixel_rate;
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struct v4l2_ctrl *link_freq;
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struct v4l2_ctrl *h_flip;
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struct v4l2_ctrl *v_flip;
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struct mutex mutex;
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bool streaming;
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bool power_on;
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const struct ar0822_mode *cur_mode;
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u32 cfg_num;
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u32 module_index;
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const char *module_facing;
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const char *module_name;
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const char *len_name;
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bool has_init_exp;
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struct preisp_hdrae_exp_s init_hdrae_exp;
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bool long_hcg;
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bool middle_hcg;
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bool short_hcg;
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bool is_thunderboot;
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bool is_thunderboot_ng;
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bool is_first_streamoff;
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u8 flip;
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};
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#define to_ar0822(sd) container_of(sd, struct ar0822, subdev)
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/*
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* Xclk 27Mhz
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*/
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static const struct regval ar0822_linear_global_regs[] = {
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{REG_DELAY, 2000},
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{0x3030,0x0092},//PLL_MULTIPLIER
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{0x302E,0x0002},//PRE_PLL_CLK_DIV
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{0x302C,0x0002},//VT_SYS_CLK_DIV
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{0x302A,0x0006},//VT_PIX_CLK_DIV
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{0x3038,0x0004},//OP_SYS_CLK_DIV
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{0x3036,0x0006},//OP_WORD_CLK_DIV
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{0x31B0,0x0071},//FRAME_PREAMBLE
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{0x31B2,0x004D},//LINE_PREAMBLE
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{0x31B4,0x51C8},//MIPI_TIMING_0
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{0x31B6,0x5288},//MIPI_TIMING_1
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{0x31B8,0x70CA},//MIPI_TIMING_2
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{0x31BA,0x030B},//MIPI_TIMING_3
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{0x31BC,0x0C89},//MIPI_TIMING_4
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{0x3342,0x122C},//MIPI_F1_PDT_EDT
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{0x2512,0xA000},//SEQ_CTRL_PORT
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{0x2510,0x0720},//SEQ_DATA_PORT
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{0x2510,0xFFFF},//SEQ_DATA_PORT
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{0x2510,0xFFFF},//SEQ_DATA_PORT
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{0x2510,0xFFFF},//SEQ_DATA_PORT
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{0x2510,0xFFFF},//SEQ_DATA_PORT
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{0x2510,0xFFFF},//SEQ_DATA_PORT
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{0x2510,0xFFFF},//SEQ_DATA_PORT
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{0x2510,0xFFFF},//SEQ_DATA_PORT
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{0x2510,0x2122},//SEQ_DATA_PORT
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{0x2510,0xFFFF},//SEQ_DATA_PORT
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{0x2510,0xFFFF},//SEQ_DATA_PORT
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{0x2510,0xFFFF},//SEQ_DATA_PORT
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{0x2510,0x26FF},//SEQ_DATA_PORT
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{0x2510,0xFFFF},//SEQ_DATA_PORT
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{0x2510,0xFFFF},//SEQ_DATA_PORT
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{0x2510,0xFFFF},//SEQ_DATA_PORT
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{0x2510,0xFFFF},//SEQ_DATA_PORT
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{0x2510,0xFFFF},//SEQ_DATA_PORT
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{0x2510,0xFFFF},//SEQ_DATA_PORT
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{0x2510,0xFFFF},//SEQ_DATA_PORT
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{0x2510,0xFFFF},//SEQ_DATA_PORT
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{0x2510,0xFFFF},//SEQ_DATA_PORT
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{0x2510,0xFFFF},//SEQ_DATA_PORT
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{0x2510,0xFFFF},//SEQ_DATA_PORT
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{0x2510,0xFFFF},//SEQ_DATA_PORT
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{0x2510,0xFFFF},//SEQ_DATA_PORT
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{0x2510,0xFFFF},//SEQ_DATA_PORT
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{0x2510,0xFFFF},//SEQ_DATA_PORT
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{0x2510,0x20FF},//SEQ_DATA_PORT
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{0x2510,0x20FF},//SEQ_DATA_PORT
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{0x2510,0x20FF},//SEQ_DATA_PORT
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{0x2510,0x20FF},//SEQ_DATA_PORT
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{0x2510,0x20FF},//SEQ_DATA_PORT
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{0x2510,0x20FF},//SEQ_DATA_PORT
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{0x2510,0x20FF},//SEQ_DATA_PORT
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{0x2510,0x20FF},//SEQ_DATA_PORT
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{0x2510,0x20FF},//SEQ_DATA_PORT
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{0x2510,0x20FF},//SEQ_DATA_PORT
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{0x2510,0x20FF},//SEQ_DATA_PORT
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{0x2510,0x20FF},//SEQ_DATA_PORT
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{0x2510,0x20FF},//SEQ_DATA_PORT
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{0x2510,0x20FF},//SEQ_DATA_PORT
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{0x2510,0x20FF},//SEQ_DATA_PORT
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{0x2510,0x20FF},//SEQ_DATA_PORT
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{0x2510,0x20FF},//SEQ_DATA_PORT
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{0x2510,0x0F8C},//SEQ_DATA_PORT
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{0x2510,0x20FF},//SEQ_DATA_PORT
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{0x2510,0x20FF},//SEQ_DATA_PORT
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{0x2510,0x20FF},//SEQ_DATA_PORT
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{0x2510,0x20FF},//SEQ_DATA_PORT
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{0x2510,0x20FF},//SEQ_DATA_PORT
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{0x2510,0x20FF},//SEQ_DATA_PORT
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{0x2510,0x20FF},//SEQ_DATA_PORT
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{0x2510,0x20FF},//SEQ_DATA_PORT
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{0x2510,0x20FF},//SEQ_DATA_PORT
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{0x2510,0x20FF},//SEQ_DATA_PORT
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{0x2510,0x20FF},//SEQ_DATA_PORT
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{0x2510,0x20FF},//SEQ_DATA_PORT
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{0x2510,0x20FF},//SEQ_DATA_PORT
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{0x2510,0x20FF},//SEQ_DATA_PORT
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{0x2510,0x20FF},//SEQ_DATA_PORT
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{0x2510,0x20FF},//SEQ_DATA_PORT
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{0x2510,0x20FF},//SEQ_DATA_PORT
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{0x2510,0x20FF},//SEQ_DATA_PORT
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{0x2510,0x20FF},//SEQ_DATA_PORT
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{0x2510,0x20FF},//SEQ_DATA_PORT
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{0x2510,0x20FF},//SEQ_DATA_PORT
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{0x2510,0x20FF},//SEQ_DATA_PORT
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{0x2510,0x20FF},//SEQ_DATA_PORT
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{0x2510,0x20E0},//SEQ_DATA_PORT
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{0x2510,0x8055},//SEQ_DATA_PORT
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{0x2510,0xA0E1},//SEQ_DATA_PORT
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{0x2510,0x3041},//SEQ_DATA_PORT
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{0x2510,0x2000},//SEQ_DATA_PORT
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{0x2510,0x3088},//SEQ_DATA_PORT
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{0x2510,0x3282},//SEQ_DATA_PORT
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{0x2510,0xA681},//SEQ_DATA_PORT
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{0x2510,0x20FF},//SEQ_DATA_PORT
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{0x2510,0x20FF},//SEQ_DATA_PORT
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{0x2510,0x20FF},//SEQ_DATA_PORT
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{0x2510,0x20FF},//SEQ_DATA_PORT
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{0x2510,0x20FE},//SEQ_DATA_PORT
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{0x2510,0x9070},//SEQ_DATA_PORT
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{0x2510,0x891D},//SEQ_DATA_PORT
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{0x2510,0x867F},//SEQ_DATA_PORT
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{0x2510,0x20FF},//SEQ_DATA_PORT
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{0x2510,0x20FC},//SEQ_DATA_PORT
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{0x2510,0x893F},//SEQ_DATA_PORT
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{0x2510,0x0F92},//SEQ_DATA_PORT
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{0x2510,0x20E0},//SEQ_DATA_PORT
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{0x2510,0x0F8F},//SEQ_DATA_PORT
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{0x2510,0x20FF},//SEQ_DATA_PORT
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{0x2510,0x20FF},//SEQ_DATA_PORT
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{0x2510,0x20FF},//SEQ_DATA_PORT
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{0x2510,0x20FF},//SEQ_DATA_PORT
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{0x2510,0x20FF},//SEQ_DATA_PORT
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{0x2510,0x20E0},//SEQ_DATA_PORT
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{0x2510,0x9770},//SEQ_DATA_PORT
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{0x2510,0x20FC},//SEQ_DATA_PORT
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{0x2510,0x8054},//SEQ_DATA_PORT
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{0x2510,0x896C},//SEQ_DATA_PORT
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{0x2510,0x200A},//SEQ_DATA_PORT
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{0x2510,0x9030},//SEQ_DATA_PORT
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{0x2510,0x200A},//SEQ_DATA_PORT
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{0x2510,0x8040},//SEQ_DATA_PORT
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{0x2510,0x8948},//SEQ_DATA_PORT
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{0x2510,0x200A},//SEQ_DATA_PORT
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{0x2510,0x1597},//SEQ_DATA_PORT
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{0x2510,0x8808},//SEQ_DATA_PORT
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{0x2510,0x200A},//SEQ_DATA_PORT
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{0x2510,0x1F96},//SEQ_DATA_PORT
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{0x2510,0x20FF},//SEQ_DATA_PORT
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{0x2510,0x20E0},//SEQ_DATA_PORT
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{0x2510,0xA0C0},//SEQ_DATA_PORT
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{0x2510,0x200A},//SEQ_DATA_PORT
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{0x2510,0x3044},//SEQ_DATA_PORT
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{0x2510,0x3088},//SEQ_DATA_PORT
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{0x2510,0x3282},//SEQ_DATA_PORT
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{0x2510,0x2004},//SEQ_DATA_PORT
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{0x2510,0x1FAA},//SEQ_DATA_PORT
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{0x2510,0x20FF},//SEQ_DATA_PORT
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{0x2510,0x20FF},//SEQ_DATA_PORT
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{0x2510,0x20FF},//SEQ_DATA_PORT
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{0x2510,0x20FF},//SEQ_DATA_PORT
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{0x2510,0x20E0},//SEQ_DATA_PORT
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{0x2510,0x7FFF},//SEQ_DATA_PORT
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{0x2510,0x7FFF},//SEQ_DATA_PORT
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{0x2510,0x7FFF},//SEQ_DATA_PORT
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{0x2510,0x20FF},//SEQ_DATA_PORT
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{0x2510,0x7FFF},//SEQ_DATA_PORT
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{0x2510,0x7FFF},//SEQ_DATA_PORT
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{0x2510,0x7FFF},//SEQ_DATA_PORT
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{0x2510,0x3108},//SEQ_DATA_PORT
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{0x2510,0x2400},//SEQ_DATA_PORT
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{0x2510,0x3244},//SEQ_DATA_PORT
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{0x2510,0x7FFF},//SEQ_DATA_PORT
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{0x2510,0x3108},//SEQ_DATA_PORT
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{0x2510,0x2400},//SEQ_DATA_PORT
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{0x2510,0x2702},//SEQ_DATA_PORT
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{0x2510,0x3242},//SEQ_DATA_PORT
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{0x2510,0x3108},//SEQ_DATA_PORT
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{0x2510,0x2420},//SEQ_DATA_PORT
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{0x2510,0x2703},//SEQ_DATA_PORT
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{0x2510,0x3242},//SEQ_DATA_PORT
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{0x2510,0x3108},//SEQ_DATA_PORT
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{0x2510,0x2420},//SEQ_DATA_PORT
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{0x2510,0x2704},//SEQ_DATA_PORT
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{0x2510,0x3244},//SEQ_DATA_PORT
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{0x2510,0x7FFF},//SEQ_DATA_PORT
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{0x2510,0x7FFF},//SEQ_DATA_PORT
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{0x2510,0x7FFF},//SEQ_DATA_PORT
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{0x2510,0x7FFF},//SEQ_DATA_PORT
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{0x2510,0x8801},//SEQ_DATA_PORT
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{0x2510,0x000F},//SEQ_DATA_PORT
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{0x2510,0x109C},//SEQ_DATA_PORT
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{0x2510,0x8855},//SEQ_DATA_PORT
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{0x2510,0x3101},//SEQ_DATA_PORT
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{0x2510,0x3041},//SEQ_DATA_PORT
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{0x2510,0x2000},//SEQ_DATA_PORT
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{0x2510,0x3102},//SEQ_DATA_PORT
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{0x2510,0x3041},//SEQ_DATA_PORT
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{0x2510,0x2000},//SEQ_DATA_PORT
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{0x2510,0x3181},//SEQ_DATA_PORT
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{0x2510,0x3041},//SEQ_DATA_PORT
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{0x2510,0x2000},//SEQ_DATA_PORT
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{0x2510,0x3188},//SEQ_DATA_PORT
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{0x2510,0x3041},//SEQ_DATA_PORT
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{0x2510,0x2000},//SEQ_DATA_PORT
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{0x2510,0x3282},//SEQ_DATA_PORT
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{0x2510,0x3104},//SEQ_DATA_PORT
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{0x2510,0x2000},//SEQ_DATA_PORT
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{0x2510,0xB0E4},//SEQ_DATA_PORT
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{0x2510,0xAD92},//SEQ_DATA_PORT
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{0x2510,0xBC0C},//SEQ_DATA_PORT
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{0x2510,0x1028},//SEQ_DATA_PORT
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{0x2510,0x0022},//SEQ_DATA_PORT
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{0x2510,0xC020},//SEQ_DATA_PORT
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{0x2510,0x003E},//SEQ_DATA_PORT
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{0x2510,0x0045},//SEQ_DATA_PORT
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{0x2510,0x00B0},//SEQ_DATA_PORT
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{0x2510,0x0028},//SEQ_DATA_PORT
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{0x2510,0x30C1},//SEQ_DATA_PORT
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{0x2510,0x8015},//SEQ_DATA_PORT
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{0x2510,0xA038},//SEQ_DATA_PORT
|
|
{0x2510,0x100F},//SEQ_DATA_PORT
|
|
{0x2510,0x0507},//SEQ_DATA_PORT
|
|
{0x2510,0xA220},//SEQ_DATA_PORT
|
|
{0x2510,0x0010},//SEQ_DATA_PORT
|
|
{0x2510,0x10C2},//SEQ_DATA_PORT
|
|
{0x2510,0xB760},//SEQ_DATA_PORT
|
|
{0x2510,0x0033},//SEQ_DATA_PORT
|
|
{0x2510,0x1082},//SEQ_DATA_PORT
|
|
{0x2510,0x100B},//SEQ_DATA_PORT
|
|
{0x2510,0x1029},//SEQ_DATA_PORT
|
|
{0x2510,0xA85A},//SEQ_DATA_PORT
|
|
{0x2510,0x998D},//SEQ_DATA_PORT
|
|
{0x2510,0xC810},//SEQ_DATA_PORT
|
|
{0x2510,0x2004},//SEQ_DATA_PORT
|
|
{0x2510,0x0ECE},//SEQ_DATA_PORT
|
|
{0x2510,0x123B},//SEQ_DATA_PORT
|
|
{0x2510,0xC000},//SEQ_DATA_PORT
|
|
{0x2510,0x032F},//SEQ_DATA_PORT
|
|
{0x2510,0x11D5},//SEQ_DATA_PORT
|
|
{0x2510,0x162F},//SEQ_DATA_PORT
|
|
{0x2510,0x9000},//SEQ_DATA_PORT
|
|
{0x2510,0x2034},//SEQ_DATA_PORT
|
|
{0x2510,0x0015},//SEQ_DATA_PORT
|
|
{0x2510,0x04CB},//SEQ_DATA_PORT
|
|
{0x2510,0x1022},//SEQ_DATA_PORT
|
|
{0x2510,0x1031},//SEQ_DATA_PORT
|
|
{0x2510,0x002D},//SEQ_DATA_PORT
|
|
{0x2510,0x1015},//SEQ_DATA_PORT
|
|
{0x2510,0x80B9},//SEQ_DATA_PORT
|
|
{0x2510,0xA101},//SEQ_DATA_PORT
|
|
{0x2510,0x001C},//SEQ_DATA_PORT
|
|
{0x2510,0x008E},//SEQ_DATA_PORT
|
|
{0x2510,0x124B},//SEQ_DATA_PORT
|
|
{0x2510,0x01B5},//SEQ_DATA_PORT
|
|
{0x2510,0x0B92},//SEQ_DATA_PORT
|
|
{0x2510,0xA400},//SEQ_DATA_PORT
|
|
{0x2510,0x8091},//SEQ_DATA_PORT
|
|
{0x2510,0x0028},//SEQ_DATA_PORT
|
|
{0x2510,0x3002},//SEQ_DATA_PORT
|
|
{0x2510,0x2004},//SEQ_DATA_PORT
|
|
{0x2510,0x1012},//SEQ_DATA_PORT
|
|
{0x2510,0x100E},//SEQ_DATA_PORT
|
|
{0x2510,0x10A8},//SEQ_DATA_PORT
|
|
{0x2510,0x00A1},//SEQ_DATA_PORT
|
|
{0x2510,0x132D},//SEQ_DATA_PORT
|
|
{0x2510,0x09AF},//SEQ_DATA_PORT
|
|
{0x2510,0x0159},//SEQ_DATA_PORT
|
|
{0x2510,0x121D},//SEQ_DATA_PORT
|
|
{0x2510,0x1259},//SEQ_DATA_PORT
|
|
{0x2510,0x11AF},//SEQ_DATA_PORT
|
|
{0x2510,0x18B5},//SEQ_DATA_PORT
|
|
{0x2510,0x0395},//SEQ_DATA_PORT
|
|
{0x2510,0x054B},//SEQ_DATA_PORT
|
|
{0x2510,0x1021},//SEQ_DATA_PORT
|
|
{0x2510,0x0020},//SEQ_DATA_PORT
|
|
{0x2510,0x1015},//SEQ_DATA_PORT
|
|
{0x2510,0x1030},//SEQ_DATA_PORT
|
|
{0x2510,0x00CF},//SEQ_DATA_PORT
|
|
{0x2510,0xB146},//SEQ_DATA_PORT
|
|
{0x2510,0xC290},//SEQ_DATA_PORT
|
|
{0x2510,0x103C},//SEQ_DATA_PORT
|
|
{0x2510,0xA882},//SEQ_DATA_PORT
|
|
{0x2510,0x8055},//SEQ_DATA_PORT
|
|
{0x2510,0x00A9},//SEQ_DATA_PORT
|
|
{0x2510,0x8801},//SEQ_DATA_PORT
|
|
{0x2510,0xB700},//SEQ_DATA_PORT
|
|
{0x2510,0x0001},//SEQ_DATA_PORT
|
|
{0x2510,0x02A2},//SEQ_DATA_PORT
|
|
{0x2510,0x000A},//SEQ_DATA_PORT
|
|
{0x2510,0x98BB},//SEQ_DATA_PORT
|
|
{0x2510,0x203F},//SEQ_DATA_PORT
|
|
{0x2510,0x0036},//SEQ_DATA_PORT
|
|
{0x2510,0x1001},//SEQ_DATA_PORT
|
|
{0x2510,0x99BE},//SEQ_DATA_PORT
|
|
{0x2510,0x0139},//SEQ_DATA_PORT
|
|
{0x2510,0x100A},//SEQ_DATA_PORT
|
|
{0x2510,0x0040},//SEQ_DATA_PORT
|
|
{0x2510,0x1022},//SEQ_DATA_PORT
|
|
{0x2510,0x124C},//SEQ_DATA_PORT
|
|
{0x2510,0x109F},//SEQ_DATA_PORT
|
|
{0x2510,0x15A3},//SEQ_DATA_PORT
|
|
{0x2510,0x002A},//SEQ_DATA_PORT
|
|
{0x2510,0x3081},//SEQ_DATA_PORT
|
|
{0x2510,0x2001},//SEQ_DATA_PORT
|
|
{0x2510,0x3044},//SEQ_DATA_PORT
|
|
{0x2510,0x2000},//SEQ_DATA_PORT
|
|
{0x2510,0x112A},//SEQ_DATA_PORT
|
|
{0x2510,0x101D},//SEQ_DATA_PORT
|
|
{0x2510,0x202B},//SEQ_DATA_PORT
|
|
{0x2510,0x02B8},//SEQ_DATA_PORT
|
|
{0x2510,0x10B8},//SEQ_DATA_PORT
|
|
{0x2510,0x1136},//SEQ_DATA_PORT
|
|
{0x2510,0x996B},//SEQ_DATA_PORT
|
|
{0x2510,0x004C},//SEQ_DATA_PORT
|
|
{0x2510,0x1039},//SEQ_DATA_PORT
|
|
{0x2510,0x1040},//SEQ_DATA_PORT
|
|
{0x2510,0x00B5},//SEQ_DATA_PORT
|
|
{0x2510,0x03C4},//SEQ_DATA_PORT
|
|
{0x2510,0x1144},//SEQ_DATA_PORT
|
|
{0x2510,0x1245},//SEQ_DATA_PORT
|
|
{0x2510,0x9A7B},//SEQ_DATA_PORT
|
|
{0x2510,0x002B},//SEQ_DATA_PORT
|
|
{0x2510,0x30D0},//SEQ_DATA_PORT
|
|
{0x2510,0x3141},//SEQ_DATA_PORT
|
|
{0x2510,0x3041},//SEQ_DATA_PORT
|
|
{0x2510,0x2000},//SEQ_DATA_PORT
|
|
{0x2510,0x3142},//SEQ_DATA_PORT
|
|
{0x2510,0x3041},//SEQ_DATA_PORT
|
|
{0x2510,0x2000},//SEQ_DATA_PORT
|
|
{0x2510,0x3110},//SEQ_DATA_PORT
|
|
{0x2510,0x3041},//SEQ_DATA_PORT
|
|
{0x2510,0x2000},//SEQ_DATA_PORT
|
|
{0x2510,0x3120},//SEQ_DATA_PORT
|
|
{0x2510,0x3041},//SEQ_DATA_PORT
|
|
{0x2510,0x2000},//SEQ_DATA_PORT
|
|
{0x2510,0x3144},//SEQ_DATA_PORT
|
|
{0x2510,0x3041},//SEQ_DATA_PORT
|
|
{0x2510,0x2000},//SEQ_DATA_PORT
|
|
{0x2510,0x3148},//SEQ_DATA_PORT
|
|
{0x2510,0x3041},//SEQ_DATA_PORT
|
|
{0x2510,0x2000},//SEQ_DATA_PORT
|
|
{0x2510,0x3182},//SEQ_DATA_PORT
|
|
{0x2510,0x3041},//SEQ_DATA_PORT
|
|
{0x2510,0x2000},//SEQ_DATA_PORT
|
|
{0x2510,0x3184},//SEQ_DATA_PORT
|
|
{0x2510,0x2000},//SEQ_DATA_PORT
|
|
{0x2510,0x3190},//SEQ_DATA_PORT
|
|
{0x2510,0x3041},//SEQ_DATA_PORT
|
|
{0x2510,0x2000},//SEQ_DATA_PORT
|
|
{0x2510,0x31A0},//SEQ_DATA_PORT
|
|
{0x2510,0x3088},//SEQ_DATA_PORT
|
|
{0x2510,0x2201},//SEQ_DATA_PORT
|
|
{0x2510,0x807D},//SEQ_DATA_PORT
|
|
{0x2510,0x2206},//SEQ_DATA_PORT
|
|
{0x2510,0x8815},//SEQ_DATA_PORT
|
|
{0x2510,0x8877},//SEQ_DATA_PORT
|
|
{0x2510,0x0092},//SEQ_DATA_PORT
|
|
{0x2510,0x220E},//SEQ_DATA_PORT
|
|
{0x2510,0x2211},//SEQ_DATA_PORT
|
|
{0x2510,0x8055},//SEQ_DATA_PORT
|
|
{0x2510,0x3001},//SEQ_DATA_PORT
|
|
{0x2510,0x2000},//SEQ_DATA_PORT
|
|
{0x2510,0x8A61},//SEQ_DATA_PORT
|
|
{0x2510,0x8801},//SEQ_DATA_PORT
|
|
{0x2510,0x1092},//SEQ_DATA_PORT
|
|
{0x2510,0x181F},//SEQ_DATA_PORT
|
|
{0x2510,0x0B1F},//SEQ_DATA_PORT
|
|
{0x2510,0x101F},//SEQ_DATA_PORT
|
|
{0x2510,0x00B6},//SEQ_DATA_PORT
|
|
{0x2510,0x0023},//SEQ_DATA_PORT
|
|
{0x2510,0x00B9},//SEQ_DATA_PORT
|
|
{0x2510,0x104C},//SEQ_DATA_PORT
|
|
{0x2510,0x996E},//SEQ_DATA_PORT
|
|
{0x2510,0x0140},//SEQ_DATA_PORT
|
|
{0x2510,0x0257},//SEQ_DATA_PORT
|
|
{0x2510,0x1035},//SEQ_DATA_PORT
|
|
{0x2510,0x9F26},//SEQ_DATA_PORT
|
|
{0x2510,0x1423},//SEQ_DATA_PORT
|
|
{0x2510,0x0048},//SEQ_DATA_PORT
|
|
{0x2510,0xC878},//SEQ_DATA_PORT
|
|
{0x2510,0x200A},//SEQ_DATA_PORT
|
|
{0x2510,0x1548},//SEQ_DATA_PORT
|
|
{0x2510,0x0C49},//SEQ_DATA_PORT
|
|
{0x2510,0x1149},//SEQ_DATA_PORT
|
|
{0x2510,0x002A},//SEQ_DATA_PORT
|
|
{0x2510,0x1057},//SEQ_DATA_PORT
|
|
{0x2510,0x3281},//SEQ_DATA_PORT
|
|
{0x2510,0x2000},//SEQ_DATA_PORT
|
|
{0x2510,0x3044},//SEQ_DATA_PORT
|
|
{0x2510,0x2001},//SEQ_DATA_PORT
|
|
{0x2510,0xA020},//SEQ_DATA_PORT
|
|
{0x2510,0x000C},//SEQ_DATA_PORT
|
|
{0x2510,0x9825},//SEQ_DATA_PORT
|
|
{0x2510,0x1040},//SEQ_DATA_PORT
|
|
{0x2510,0x1054},//SEQ_DATA_PORT
|
|
{0x2510,0xB06D},//SEQ_DATA_PORT
|
|
{0x2510,0x0035},//SEQ_DATA_PORT
|
|
{0x2510,0x004D},//SEQ_DATA_PORT
|
|
{0x2510,0x9905},//SEQ_DATA_PORT
|
|
{0x2510,0xB064},//SEQ_DATA_PORT
|
|
{0x2510,0x99C5},//SEQ_DATA_PORT
|
|
{0x2510,0x0047},//SEQ_DATA_PORT
|
|
{0x2510,0xB920},//SEQ_DATA_PORT
|
|
{0x2510,0x1447},//SEQ_DATA_PORT
|
|
{0x2510,0x7FFF},//SEQ_DATA_PORT
|
|
{0x2510,0x7FFF},//SEQ_DATA_PORT
|
|
{0x2510,0x7FFF},//SEQ_DATA_PORT
|
|
{0x2510,0x7FFF},//SEQ_DATA_PORT
|
|
{0x2510,0x7FFF},//SEQ_DATA_PORT
|
|
{0x2510,0x7FFF},//SEQ_DATA_PORT
|
|
{0x2510,0x7FFF},//SEQ_DATA_PORT
|
|
{0x2510,0x7FFF},//SEQ_DATA_PORT
|
|
{0x2510,0x7FFF},//SEQ_DATA_PORT
|
|
{0x31F8,0x0008},//MIPI_CONFIG_2
|
|
{0x3C70,0x6828},//CALIB_ROWS
|
|
{0x3092,0x0826},//ROW_NOISE_CONTROL
|
|
{0x3428,0x0209},//SEQUENCER_CONTROL
|
|
{0x3516,0xFF04},//DAC_LD_22_23
|
|
{0x3526,0x6480},//DAC_LD_38_39
|
|
{0x3504,0x8AAA},//DAC_LD_4_5
|
|
{0x353C,0x220C},//DAC_LD_60_61
|
|
{0x3536,0x4C6E},//DAC_LD_54_55
|
|
{0x3D2A,0x0FFF},//T1_END_DEC_TH
|
|
{0x3364,0x00EC},//DCG_TRIM
|
|
{0x3512,0x8888},//DAC_LD_18_19
|
|
{0x3514,0x888F},//DAC_LD_20_21
|
|
{0x3520,0xFBF0},//DAC_LD_32_33
|
|
{0x3524,0xB2A1},//DAC_LD_36_37
|
|
{0x3528,0xCC84},//DAC_LD_40_41
|
|
{0x3532,0x4C8E},//DAC_LD_50_51
|
|
{0x3534,0x4E64},//DAC_LD_52_53
|
|
{0x351E,0x5856},//DAC_LD_30_31
|
|
{0x353E,0x98F2},//DAC_LD_62_63
|
|
{0x352E,0x6A8A},//DAC_LD_46_47
|
|
{0x3370,0x0211},//DBLC_CONTROL
|
|
{0x3372,0x700F},//DBLC_FS0_CONTROL
|
|
{0x3540,0x3597},//DAC_LD_64_65
|
|
{0x58E2,0x0BE3},//COL_COUNT_VALUES1
|
|
{0x58E4,0x18B4},//COL_COUNT_VALUES2
|
|
{0x3522,0x7C97},//DAC_LD_34_35
|
|
{0x30BA,0x0024},//DIGITAL_CTRL
|
|
{0x31D4,0x0042},//CLK_MEM_GATING_CTRL
|
|
{0x352A,0x6F8F},//DAC_LD_42_43
|
|
{0x3530,0x4A08},//DAC_LD_48_49
|
|
{0x351A,0x5FFF},//DAC_LD_26_27
|
|
{0x350E,0x39D9},//DAC_LD_14_15
|
|
{0x3510,0x9988},//DAC_LD_16_17
|
|
{0x3380,0x1FFF},//DBLC_OFFSET1
|
|
{0x337A,0x1000},//DBLC_SCALE1
|
|
{0x3092,0x0800},//ROW_NOISE_CONTROL
|
|
{0x350A,0x0654},//DAC_LD_10_11
|
|
{0x3364,0x00E0},//DCG_TRIM
|
|
{0x591E,0x61AE},//ANALOG_GAIN_WR_DATA
|
|
{0x591E,0x722C},//ANALOG_GAIN_WR_DATA
|
|
{0x591E,0x82B8},//ANALOG_GAIN_WR_DATA
|
|
{0x591E,0x92F6},//ANALOG_GAIN_WR_DATA
|
|
{0x591E,0xA447},//ANALOG_GAIN_WR_DATA
|
|
{0x591E,0xB66D},//ANALOG_GAIN_WR_DATA
|
|
{0x591E,0xC6EA},//ANALOG_GAIN_WR_DATA
|
|
{0x591E,0xDECD},//ANALOG_GAIN_WR_DATA
|
|
{0x3532,0x4C8A},//DAC_LD_50_51
|
|
{0x3534,0x4E60},//DAC_LD_52_53
|
|
{0x353E,0x90F2},//DAC_LD_62_63
|
|
{0x351A,0x4FFF},//DAC_LD_26_27
|
|
{0x591C,0x00D7},//DGR_AMP_GAIN
|
|
{0x3522,0x6097},//DAC_LD_34_35
|
|
{0x5002,0x37C3},//T1_PIX_DEF_ID2
|
|
{0x51CC,0x0149},//T1_NOISE_GAIN_THRESHOLD0
|
|
{0x51D8,0x044D},//T1_NOISE_GAIN_THRESHOLD1
|
|
{0x51CE,0x0700},//T1_NOISE_GAIN_THRESHOLD2
|
|
{0x51D0,0x0001},//T1_NOISE_FLOOR0
|
|
{0x51D2,0x0002},//T1_NOISE_FLOOR1
|
|
{0x51D4,0x0003},//T1_NOISE_FLOOR2
|
|
{0x51D6,0x0004},//T1_NOISE_FLOOR3
|
|
{0x5202,0x37C3},//T2_PIX_DEF_ID2
|
|
{0x51EA,0x0149},//T2_NOISE_GAIN_THRESHOLD0
|
|
{0x51FC,0x044D},//T2_NOISE_GAIN_THRESHOLD1
|
|
{0x51EC,0x0700},//T2_NOISE_GAIN_THRESHOLD2
|
|
{0x51EE,0x0001},//T2_NOISE_FLOOR0
|
|
{0x51F0,0x0002},//T2_NOISE_FLOOR1
|
|
{0x51F2,0x0003},//T2_NOISE_FLOOR2
|
|
{0x51F4,0x0004},//T2_NOISE_FLOOR3
|
|
{0x5402,0x37C3},//T4_PIX_DEF_ID2
|
|
{0x5560,0x0149},//T4_NOISE_GAIN_THRESHOLD0
|
|
{0x556C,0x044D},//T4_NOISE_GAIN_THRESHOLD1
|
|
{0x5562,0x0700},//T4_NOISE_GAIN_THRESHOLD2
|
|
{0x5564,0x0001},//T4_NOISE_FLOOR0
|
|
{0x5566,0x0002},//T4_NOISE_FLOOR1
|
|
{0x5568,0x0003},//T4_NOISE_FLOOR2
|
|
{0x556A,0x0004},//T4_NOISE_FLOOR3
|
|
{0x31E0,0x0001},//PIX_DEF_ID
|
|
{0x5000,0x0080},//T1_PIX_DEF_ID
|
|
{0x5000,0x0180},//T1_PIX_DEF_ID
|
|
{0x5000,0x0180},//T1_PIX_DEF_ID
|
|
{0x5200,0x0080},//T2_PIX_DEF_ID
|
|
{0x5200,0x0180},//T2_PIX_DEF_ID
|
|
{0x5200,0x0180},//T2_PIX_DEF_ID
|
|
{0x5400,0x0080},//T4_PIX_DEF_ID
|
|
{0x5400,0x0180},//T4_PIX_DEF_ID
|
|
{0x5400,0x0180},//T4_PIX_DEF_ID
|
|
{0x5000,0x1180},//T1_PIX_DEF_ID
|
|
{0x50A2,0x2553},//BMT0
|
|
{0x50A4,0xDFD4},//BMT1
|
|
{0x50A6,0x030F},//SINGLEK_FACTOR0
|
|
{0x50A6,0x0F0F},//SINGLEK_FACTOR0
|
|
{0x50A8,0x030F},//SINGLEK_FACTOR1
|
|
{0x50A8,0x0F0F},//SINGLEK_FACTOR1
|
|
{0x50AA,0x030F},//SINGLEK_FACTOR2
|
|
{0x50AA,0x050F},//SINGLEK_FACTOR2
|
|
{0x50AC,0x0301},//CROSS_FACTOR0
|
|
{0x50AC,0x0101},//CROSS_FACTOR0
|
|
{0x50AE,0x0301},//CROSS_FACTOR1
|
|
{0x50AE,0x0101},//CROSS_FACTOR1
|
|
{0x50B0,0x0301},//CROSS_FACTOR2
|
|
{0x50B0,0x0101},//CROSS_FACTOR2
|
|
{0x50B2,0x03FF},//SINGLE_MAX_FACTOR
|
|
{0x50B4,0x030F},//COUPLE_FACTOR0
|
|
{0x50B4,0x0F0F},//COUPLE_FACTOR0
|
|
{0x50B6,0x030F},//COUPLE_FACTOR1
|
|
{0x50B6,0x0F0F},//COUPLE_FACTOR1
|
|
{0x50B8,0x030F},//COUPLE_FACTOR2
|
|
{0x50B8,0x050F},//COUPLE_FACTOR2
|
|
{0x31AE,0x0204},//SERIAL_FORMAT
|
|
{0x31AC,0x0C0C},//DATA_FORMAT_BITS
|
|
{0x3082,0x0001},//OPERATION_MODE_CTRL
|
|
{0x30BA,0x0024},//DIGITAL_CTRL
|
|
{0x31AE,0x0204},//SERIAL_FORMAT
|
|
{0x31AC,0x0C0C},//DATA_FORMAT_BITS
|
|
{0x300C,0x0866},//LINE_LENGTH_PCK_
|
|
{0x300A,0x09F3},//FRAME_LENGTH_LINES_
|
|
{0x3012,0x08F4},//COARSE_INTEGRATION_TIME_
|
|
{0x5914,0x4012},//SENSOR_GAIN_TABLE_SEL
|
|
{REG_DELAY,100},
|
|
{0x5914,0x4002},//SENSOR_GAIN_TABLE_SEL
|
|
{0x5910,0x608A},//SENSOR_GAIN_REG1
|
|
{0x5910,0x7091},//SENSOR_GAIN_REG1
|
|
{0x5910,0x689C},//SENSOR_GAIN_REG1
|
|
{0x5910,0x8885},//SENSOR_GAIN_REG1
|
|
{0x5910,0x98AD},//SENSOR_GAIN_REG1
|
|
{0x5910,0xA8A9},//SENSOR_GAIN_REG1
|
|
{0x5910,0xC894},//SENSOR_GAIN_REG1
|
|
{0x5910,0xC8D1},//SENSOR_GAIN_REG1
|
|
{0x5910,0xD88A},//SENSOR_GAIN_REG1
|
|
{0x5910,0xD8C3},//SENSOR_GAIN_REG1
|
|
{0x5910,0xD915},//SENSOR_GAIN_REG1
|
|
{0x5910,0xD988},//SENSOR_GAIN_REG1
|
|
{0x5910,0xDA2A},//SENSOR_GAIN_REG1
|
|
{0x5910,0xDB0E},//SENSOR_GAIN_REG1
|
|
{0x5910,0xDC53},//SENSOR_GAIN_REG1
|
|
{0x5910,0x608A},//SENSOR_GAIN_REG1
|
|
{0x5910,0xC919},//SENSOR_GAIN_REG1
|
|
{0x5910,0xCA00},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0000},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0000},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0000},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0001},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0001},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0003},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0003},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0003},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0004},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0004},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0004},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0004},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0004},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0004},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0004},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0002},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0003},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0003},//SENSOR_GAIN_REG1
|
|
{0x5910,0x5A8B},//SENSOR_GAIN_REG1
|
|
{0x5910,0xFF04},//SENSOR_GAIN_REG1
|
|
{0x5910,0xF704},//SENSOR_GAIN_REG1
|
|
{0x5910,0xFF04},//SENSOR_GAIN_REG1
|
|
{0x5910,0xF704},//SENSOR_GAIN_REG1
|
|
{0x5910,0xF704},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0005},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0006},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0007},//SENSOR_GAIN_REG1
|
|
{0x5910,0x9A8B},//SENSOR_GAIN_REG1
|
|
{0x5910,0xFF04},//SENSOR_GAIN_REG1
|
|
{0x5910,0xF704},//SENSOR_GAIN_REG1
|
|
{0x5910,0xF704},//SENSOR_GAIN_REG1
|
|
{0x5910,0xF704},//SENSOR_GAIN_REG1
|
|
{0x5910,0xF704},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0015},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0016},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0017},//SENSOR_GAIN_REG1
|
|
{0x5910,0xDA8B},//SENSOR_GAIN_REG1
|
|
{0x5910,0xFF04},//SENSOR_GAIN_REG1
|
|
{0x5910,0xF704},//SENSOR_GAIN_REG1
|
|
{0x5910,0xF704},//SENSOR_GAIN_REG1
|
|
{0x5910,0xF704},//SENSOR_GAIN_REG1
|
|
{0x5910,0xF704},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0025},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0026},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0027},//SENSOR_GAIN_REG1
|
|
{0x5910,0x59B9},//SENSOR_GAIN_REG1
|
|
{0x5910,0x700F},//SENSOR_GAIN_REG1
|
|
{0x5910,0x7F0F},//SENSOR_GAIN_REG1
|
|
{0x5910,0x700F},//SENSOR_GAIN_REG1
|
|
{0x5910,0x7F0F},//SENSOR_GAIN_REG1
|
|
{0x5910,0x7F0F},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0035},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0036},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0037},//SENSOR_GAIN_REG1
|
|
{0x5910,0x99B9},//SENSOR_GAIN_REG1
|
|
{0x5910,0x700F},//SENSOR_GAIN_REG1
|
|
{0x5910,0x7F0F},//SENSOR_GAIN_REG1
|
|
{0x5910,0x700F},//SENSOR_GAIN_REG1
|
|
{0x5910,0x7F0F},//SENSOR_GAIN_REG1
|
|
{0x5910,0x7F0F},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0045},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0046},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0047},//SENSOR_GAIN_REG1
|
|
{0x5910,0xD9B9},//SENSOR_GAIN_REG1
|
|
{0x5910,0x700F},//SENSOR_GAIN_REG1
|
|
{0x5910,0x7F0F},//SENSOR_GAIN_REG1
|
|
{0x5910,0x700F},//SENSOR_GAIN_REG1
|
|
{0x5910,0x7F0F},//SENSOR_GAIN_REG1
|
|
{0x5910,0x7F0F},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0055},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0056},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0057},//SENSOR_GAIN_REG1
|
|
{0x5910,0x9A85},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0654},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0654},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0684},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0654},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0654},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0065},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0066},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0067},//SENSOR_GAIN_REG1
|
|
{0x5910,0x59BD},//SENSOR_GAIN_REG1
|
|
{0x5910,0x1000},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0C00},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0F00},//SENSOR_GAIN_REG1
|
|
{0x5910,0x1000},//SENSOR_GAIN_REG1
|
|
{0x5910,0x10F0},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0075},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0076},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0077},//SENSOR_GAIN_REG1
|
|
{0x5912,0x608A},//SENSOR_GAIN_REG2
|
|
{0x5912,0x7091},//SENSOR_GAIN_REG2
|
|
{0x5912,0x689C},//SENSOR_GAIN_REG2
|
|
{0x5912,0x8885},//SENSOR_GAIN_REG2
|
|
{0x5912,0x98AD},//SENSOR_GAIN_REG2
|
|
{0x5912,0xA8A9},//SENSOR_GAIN_REG2
|
|
{0x5912,0xC894},//SENSOR_GAIN_REG2
|
|
{0x5912,0xC8D1},//SENSOR_GAIN_REG2
|
|
{0x5912,0xC927},//SENSOR_GAIN_REG2
|
|
{0x5912,0xC9A0},//SENSOR_GAIN_REG2
|
|
{0x5912,0xCA4C},//SENSOR_GAIN_REG2
|
|
{0x5912,0xCB3F},//SENSOR_GAIN_REG2
|
|
{0x5912,0xCC97},//SENSOR_GAIN_REG2
|
|
{0x5912,0xCE7C},//SENSOR_GAIN_REG2
|
|
{0x5912,0xCFFF},//SENSOR_GAIN_REG2
|
|
{0x5912,0x608A},//SENSOR_GAIN_REG2
|
|
{0x5912,0xC8F0},//SENSOR_GAIN_REG2
|
|
{0x5912,0xCA00},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0000},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0000},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0000},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0001},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0001},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0003},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0003},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0003},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0004},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0004},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0004},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0004},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0004},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0004},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0004},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0002},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0003},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0003},//SENSOR_GAIN_REG2
|
|
{0x5912,0x5A8B},//SENSOR_GAIN_REG2
|
|
{0x5912,0xFF04},//SENSOR_GAIN_REG2
|
|
{0x5912,0xF704},//SENSOR_GAIN_REG2
|
|
{0x5912,0xFF04},//SENSOR_GAIN_REG2
|
|
{0x5912,0xF704},//SENSOR_GAIN_REG2
|
|
{0x5912,0xF704},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0005},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0006},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0007},//SENSOR_GAIN_REG2
|
|
{0x5912,0x9A8B},//SENSOR_GAIN_REG2
|
|
{0x5912,0xFF04},//SENSOR_GAIN_REG2
|
|
{0x5912,0xF704},//SENSOR_GAIN_REG2
|
|
{0x5912,0xF704},//SENSOR_GAIN_REG2
|
|
{0x5912,0xF704},//SENSOR_GAIN_REG2
|
|
{0x5912,0xF704},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0015},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0016},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0017},//SENSOR_GAIN_REG2
|
|
{0x5912,0xDA8B},//SENSOR_GAIN_REG2
|
|
{0x5912,0xFF04},//SENSOR_GAIN_REG2
|
|
{0x5912,0xF704},//SENSOR_GAIN_REG2
|
|
{0x5912,0xF704},//SENSOR_GAIN_REG2
|
|
{0x5912,0xF704},//SENSOR_GAIN_REG2
|
|
{0x5912,0xF704},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0025},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0026},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0027},//SENSOR_GAIN_REG2
|
|
{0x5912,0x59B9},//SENSOR_GAIN_REG2
|
|
{0x5912,0x700F},//SENSOR_GAIN_REG2
|
|
{0x5912,0x7F0F},//SENSOR_GAIN_REG2
|
|
{0x5912,0x700F},//SENSOR_GAIN_REG2
|
|
{0x5912,0x7F0F},//SENSOR_GAIN_REG2
|
|
{0x5912,0x7F0F},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0035},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0036},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0037},//SENSOR_GAIN_REG2
|
|
{0x5912,0x99B9},//SENSOR_GAIN_REG2
|
|
{0x5912,0x700F},//SENSOR_GAIN_REG2
|
|
{0x5912,0x7F0F},//SENSOR_GAIN_REG2
|
|
{0x5912,0x700F},//SENSOR_GAIN_REG2
|
|
{0x5912,0x7F0F},//SENSOR_GAIN_REG2
|
|
{0x5912,0x7F0F},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0045},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0046},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0047},//SENSOR_GAIN_REG2
|
|
{0x5912,0xD9B9},//SENSOR_GAIN_REG2
|
|
{0x5912,0x700F},//SENSOR_GAIN_REG2
|
|
{0x5912,0x7F0F},//SENSOR_GAIN_REG2
|
|
{0x5912,0x700F},//SENSOR_GAIN_REG2
|
|
{0x5912,0x7F0F},//SENSOR_GAIN_REG2
|
|
{0x5912,0x7F0F},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0055},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0056},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0057},//SENSOR_GAIN_REG2
|
|
{0x5912,0x9A85},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0654},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0654},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0684},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0654},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0654},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0065},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0066},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0067},//SENSOR_GAIN_REG2
|
|
{0x5912,0x59BD},//SENSOR_GAIN_REG2
|
|
{0x5912,0x1000},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0C00},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0F00},//SENSOR_GAIN_REG2
|
|
{0x5912,0x1000},//SENSOR_GAIN_REG2
|
|
{0x5912,0x10F0},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0075},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0076},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0077},//SENSOR_GAIN_REG2
|
|
{0x5914,0x4002},//SENSOR_GAIN_TABLE_SEL
|
|
{0x5900,0x0000},//SENSOR_GAIN
|
|
{REG_NULL, 0x00},
|
|
};
|
|
|
|
static const struct regval ar0822_hdr12bit_3840x2160_25fps_regs[] = {
|
|
{REG_DELAY, 2000},
|
|
{0x3030,0x007A},//PLL_MULTIPLIER
|
|
{0x302E,0x0002},//PRE_PLL_CLK_DIV
|
|
{0x302C,0x0002},//VT_SYS_CLK_DIV
|
|
{0x302A,0x0005},//VT_PIX_CLK_DIV
|
|
{0x3038,0x0002},//OP_SYS_CLK_DIV
|
|
{0x3036,0x0006},//OP_WORD_CLK_DIV
|
|
{0x31B0,0x00A3},//FRAME_PREAMBLE
|
|
{0x31B2,0x006C},//LINE_PREAMBLE
|
|
{0x31B4,0x72CC},//MIPI_TIMING_0
|
|
{0x31B6,0x73CE},//MIPI_TIMING_1
|
|
{0x31B8,0xB0CD},//MIPI_TIMING_2
|
|
{0x31BA,0x0411},//MIPI_TIMING_3
|
|
{0x31BC,0x550E},//MIPI_TIMING_4
|
|
{0x3342,0x122C},//MIPI_F1_PDT_EDT
|
|
{0x31BC,0x550E},//MIPI_TIMING_4
|
|
{0x31DE,0x0004},//MIPI_HISPI_TRIM
|
|
{0x31C6,0xC000},//HISPI_CONTROL
|
|
{0x31C8,0x0B28},//MIPI_DESKEW_PAT_WIDTH
|
|
{0x2512,0xA000},//SEQ_CTRL_PORT
|
|
{0x2510,0x0720},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0x2122},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0x26FF},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x0F8C},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20E0},//SEQ_DATA_PORT
|
|
{0x2510,0x8055},//SEQ_DATA_PORT
|
|
{0x2510,0xA0E1},//SEQ_DATA_PORT
|
|
{0x2510,0x3041},//SEQ_DATA_PORT
|
|
{0x2510,0x2000},//SEQ_DATA_PORT
|
|
{0x2510,0x3088},//SEQ_DATA_PORT
|
|
{0x2510,0x3282},//SEQ_DATA_PORT
|
|
{0x2510,0xA681},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FE},//SEQ_DATA_PORT
|
|
{0x2510,0x9070},//SEQ_DATA_PORT
|
|
{0x2510,0x891D},//SEQ_DATA_PORT
|
|
{0x2510,0x867F},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FC},//SEQ_DATA_PORT
|
|
{0x2510,0x893F},//SEQ_DATA_PORT
|
|
{0x2510,0x0F92},//SEQ_DATA_PORT
|
|
{0x2510,0x20E0},//SEQ_DATA_PORT
|
|
{0x2510,0x0F8F},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20E0},//SEQ_DATA_PORT
|
|
{0x2510,0x9770},//SEQ_DATA_PORT
|
|
{0x2510,0x20FC},//SEQ_DATA_PORT
|
|
{0x2510,0x8054},//SEQ_DATA_PORT
|
|
{0x2510,0x896C},//SEQ_DATA_PORT
|
|
{0x2510,0x200A},//SEQ_DATA_PORT
|
|
{0x2510,0x9030},//SEQ_DATA_PORT
|
|
{0x2510,0x200A},//SEQ_DATA_PORT
|
|
{0x2510,0x8040},//SEQ_DATA_PORT
|
|
{0x2510,0x8948},//SEQ_DATA_PORT
|
|
{0x2510,0x200A},//SEQ_DATA_PORT
|
|
{0x2510,0x1597},//SEQ_DATA_PORT
|
|
{0x2510,0x8808},//SEQ_DATA_PORT
|
|
{0x2510,0x200A},//SEQ_DATA_PORT
|
|
{0x2510,0x1F96},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20E0},//SEQ_DATA_PORT
|
|
{0x2510,0xA0C0},//SEQ_DATA_PORT
|
|
{0x2510,0x200A},//SEQ_DATA_PORT
|
|
{0x2510,0x3044},//SEQ_DATA_PORT
|
|
{0x2510,0x3088},//SEQ_DATA_PORT
|
|
{0x2510,0x3282},//SEQ_DATA_PORT
|
|
{0x2510,0x2004},//SEQ_DATA_PORT
|
|
{0x2510,0x1FAA},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20E0},//SEQ_DATA_PORT
|
|
{0x2510,0x7FFF},//SEQ_DATA_PORT
|
|
{0x2510,0x7FFF},//SEQ_DATA_PORT
|
|
{0x2510,0x7FFF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x7FFF},//SEQ_DATA_PORT
|
|
{0x2510,0x7FFF},//SEQ_DATA_PORT
|
|
{0x2510,0x7FFF},//SEQ_DATA_PORT
|
|
{0x2510,0x3108},//SEQ_DATA_PORT
|
|
{0x2510,0x2400},//SEQ_DATA_PORT
|
|
{0x2510,0x3244},//SEQ_DATA_PORT
|
|
{0x2510,0x7FFF},//SEQ_DATA_PORT
|
|
{0x2510,0x3108},//SEQ_DATA_PORT
|
|
{0x2510,0x2400},//SEQ_DATA_PORT
|
|
{0x2510,0x2702},//SEQ_DATA_PORT
|
|
{0x2510,0x3242},//SEQ_DATA_PORT
|
|
{0x2510,0x3108},//SEQ_DATA_PORT
|
|
{0x2510,0x2420},//SEQ_DATA_PORT
|
|
{0x2510,0x2703},//SEQ_DATA_PORT
|
|
{0x2510,0x3242},//SEQ_DATA_PORT
|
|
{0x2510,0x3108},//SEQ_DATA_PORT
|
|
{0x2510,0x2420},//SEQ_DATA_PORT
|
|
{0x2510,0x2704},//SEQ_DATA_PORT
|
|
{0x2510,0x3244},//SEQ_DATA_PORT
|
|
{0x2510,0x7FFF},//SEQ_DATA_PORT
|
|
{0x2510,0x7FFF},//SEQ_DATA_PORT
|
|
{0x2510,0x7FFF},//SEQ_DATA_PORT
|
|
{0x2510,0x7FFF},//SEQ_DATA_PORT
|
|
{0x2510,0x8801},//SEQ_DATA_PORT
|
|
{0x2510,0x000F},//SEQ_DATA_PORT
|
|
{0x2510,0x109C},//SEQ_DATA_PORT
|
|
{0x2510,0x8855},//SEQ_DATA_PORT
|
|
{0x2510,0x3101},//SEQ_DATA_PORT
|
|
{0x2510,0x3041},//SEQ_DATA_PORT
|
|
{0x2510,0x2000},//SEQ_DATA_PORT
|
|
{0x2510,0x3102},//SEQ_DATA_PORT
|
|
{0x2510,0x3041},//SEQ_DATA_PORT
|
|
{0x2510,0x2000},//SEQ_DATA_PORT
|
|
{0x2510,0x3181},//SEQ_DATA_PORT
|
|
{0x2510,0x3041},//SEQ_DATA_PORT
|
|
{0x2510,0x2000},//SEQ_DATA_PORT
|
|
{0x2510,0x3188},//SEQ_DATA_PORT
|
|
{0x2510,0x3041},//SEQ_DATA_PORT
|
|
{0x2510,0x2000},//SEQ_DATA_PORT
|
|
{0x2510,0x3282},//SEQ_DATA_PORT
|
|
{0x2510,0x3104},//SEQ_DATA_PORT
|
|
{0x2510,0x2000},//SEQ_DATA_PORT
|
|
{0x2510,0xB0E4},//SEQ_DATA_PORT
|
|
{0x2510,0xAD92},//SEQ_DATA_PORT
|
|
{0x2510,0xBC0C},//SEQ_DATA_PORT
|
|
{0x2510,0x1028},//SEQ_DATA_PORT
|
|
{0x2510,0x0022},//SEQ_DATA_PORT
|
|
{0x2510,0xC020},//SEQ_DATA_PORT
|
|
{0x2510,0x003E},//SEQ_DATA_PORT
|
|
{0x2510,0x0045},//SEQ_DATA_PORT
|
|
{0x2510,0x00B0},//SEQ_DATA_PORT
|
|
{0x2510,0x0028},//SEQ_DATA_PORT
|
|
{0x2510,0x30C1},//SEQ_DATA_PORT
|
|
{0x2510,0x8015},//SEQ_DATA_PORT
|
|
{0x2510,0xA038},//SEQ_DATA_PORT
|
|
{0x2510,0x100F},//SEQ_DATA_PORT
|
|
{0x2510,0x0507},//SEQ_DATA_PORT
|
|
{0x2510,0xA220},//SEQ_DATA_PORT
|
|
{0x2510,0x0010},//SEQ_DATA_PORT
|
|
{0x2510,0x10C2},//SEQ_DATA_PORT
|
|
{0x2510,0xB760},//SEQ_DATA_PORT
|
|
{0x2510,0x0033},//SEQ_DATA_PORT
|
|
{0x2510,0x1082},//SEQ_DATA_PORT
|
|
{0x2510,0x100B},//SEQ_DATA_PORT
|
|
{0x2510,0x1029},//SEQ_DATA_PORT
|
|
{0x2510,0xA85A},//SEQ_DATA_PORT
|
|
{0x2510,0x998D},//SEQ_DATA_PORT
|
|
{0x2510,0xC810},//SEQ_DATA_PORT
|
|
{0x2510,0x2004},//SEQ_DATA_PORT
|
|
{0x2510,0x0ECE},//SEQ_DATA_PORT
|
|
{0x2510,0x123B},//SEQ_DATA_PORT
|
|
{0x2510,0xC000},//SEQ_DATA_PORT
|
|
{0x2510,0x032F},//SEQ_DATA_PORT
|
|
{0x2510,0x11D5},//SEQ_DATA_PORT
|
|
{0x2510,0x162F},//SEQ_DATA_PORT
|
|
{0x2510,0x9000},//SEQ_DATA_PORT
|
|
{0x2510,0x2034},//SEQ_DATA_PORT
|
|
{0x2510,0x0015},//SEQ_DATA_PORT
|
|
{0x2510,0x04CB},//SEQ_DATA_PORT
|
|
{0x2510,0x1022},//SEQ_DATA_PORT
|
|
{0x2510,0x1031},//SEQ_DATA_PORT
|
|
{0x2510,0x002D},//SEQ_DATA_PORT
|
|
{0x2510,0x1015},//SEQ_DATA_PORT
|
|
{0x2510,0x80B9},//SEQ_DATA_PORT
|
|
{0x2510,0xA101},//SEQ_DATA_PORT
|
|
{0x2510,0x001C},//SEQ_DATA_PORT
|
|
{0x2510,0x008E},//SEQ_DATA_PORT
|
|
{0x2510,0x124B},//SEQ_DATA_PORT
|
|
{0x2510,0x01B5},//SEQ_DATA_PORT
|
|
{0x2510,0x0B92},//SEQ_DATA_PORT
|
|
{0x2510,0xA400},//SEQ_DATA_PORT
|
|
{0x2510,0x8091},//SEQ_DATA_PORT
|
|
{0x2510,0x0028},//SEQ_DATA_PORT
|
|
{0x2510,0x3002},//SEQ_DATA_PORT
|
|
{0x2510,0x2004},//SEQ_DATA_PORT
|
|
{0x2510,0x1012},//SEQ_DATA_PORT
|
|
{0x2510,0x100E},//SEQ_DATA_PORT
|
|
{0x2510,0x10A8},//SEQ_DATA_PORT
|
|
{0x2510,0x00A1},//SEQ_DATA_PORT
|
|
{0x2510,0x132D},//SEQ_DATA_PORT
|
|
{0x2510,0x09AF},//SEQ_DATA_PORT
|
|
{0x2510,0x0159},//SEQ_DATA_PORT
|
|
{0x2510,0x121D},//SEQ_DATA_PORT
|
|
{0x2510,0x1259},//SEQ_DATA_PORT
|
|
{0x2510,0x11AF},//SEQ_DATA_PORT
|
|
{0x2510,0x18B5},//SEQ_DATA_PORT
|
|
{0x2510,0x0395},//SEQ_DATA_PORT
|
|
{0x2510,0x054B},//SEQ_DATA_PORT
|
|
{0x2510,0x1021},//SEQ_DATA_PORT
|
|
{0x2510,0x0020},//SEQ_DATA_PORT
|
|
{0x2510,0x1015},//SEQ_DATA_PORT
|
|
{0x2510,0x1030},//SEQ_DATA_PORT
|
|
{0x2510,0x00CF},//SEQ_DATA_PORT
|
|
{0x2510,0xB146},//SEQ_DATA_PORT
|
|
{0x2510,0xC290},//SEQ_DATA_PORT
|
|
{0x2510,0x103C},//SEQ_DATA_PORT
|
|
{0x2510,0xA882},//SEQ_DATA_PORT
|
|
{0x2510,0x8055},//SEQ_DATA_PORT
|
|
{0x2510,0x00A9},//SEQ_DATA_PORT
|
|
{0x2510,0x8801},//SEQ_DATA_PORT
|
|
{0x2510,0xB700},//SEQ_DATA_PORT
|
|
{0x2510,0x0001},//SEQ_DATA_PORT
|
|
{0x2510,0x02A2},//SEQ_DATA_PORT
|
|
{0x2510,0x000A},//SEQ_DATA_PORT
|
|
{0x2510,0x98BB},//SEQ_DATA_PORT
|
|
{0x2510,0x203F},//SEQ_DATA_PORT
|
|
{0x2510,0x0036},//SEQ_DATA_PORT
|
|
{0x2510,0x1001},//SEQ_DATA_PORT
|
|
{0x2510,0x99BE},//SEQ_DATA_PORT
|
|
{0x2510,0x0139},//SEQ_DATA_PORT
|
|
{0x2510,0x100A},//SEQ_DATA_PORT
|
|
{0x2510,0x0040},//SEQ_DATA_PORT
|
|
{0x2510,0x1022},//SEQ_DATA_PORT
|
|
{0x2510,0x124C},//SEQ_DATA_PORT
|
|
{0x2510,0x109F},//SEQ_DATA_PORT
|
|
{0x2510,0x15A3},//SEQ_DATA_PORT
|
|
{0x2510,0x002A},//SEQ_DATA_PORT
|
|
{0x2510,0x3081},//SEQ_DATA_PORT
|
|
{0x2510,0x2001},//SEQ_DATA_PORT
|
|
{0x2510,0x3044},//SEQ_DATA_PORT
|
|
{0x2510,0x2000},//SEQ_DATA_PORT
|
|
{0x2510,0x112A},//SEQ_DATA_PORT
|
|
{0x2510,0x101D},//SEQ_DATA_PORT
|
|
{0x2510,0x202B},//SEQ_DATA_PORT
|
|
{0x2510,0x02B8},//SEQ_DATA_PORT
|
|
{0x2510,0x10B8},//SEQ_DATA_PORT
|
|
{0x2510,0x1136},//SEQ_DATA_PORT
|
|
{0x2510,0x996B},//SEQ_DATA_PORT
|
|
{0x2510,0x004C},//SEQ_DATA_PORT
|
|
{0x2510,0x1039},//SEQ_DATA_PORT
|
|
{0x2510,0x1040},//SEQ_DATA_PORT
|
|
{0x2510,0x00B5},//SEQ_DATA_PORT
|
|
{0x2510,0x03C4},//SEQ_DATA_PORT
|
|
{0x2510,0x1144},//SEQ_DATA_PORT
|
|
{0x2510,0x1245},//SEQ_DATA_PORT
|
|
{0x2510,0x9A7B},//SEQ_DATA_PORT
|
|
{0x2510,0x002B},//SEQ_DATA_PORT
|
|
{0x2510,0x30D0},//SEQ_DATA_PORT
|
|
{0x2510,0x3141},//SEQ_DATA_PORT
|
|
{0x2510,0x3041},//SEQ_DATA_PORT
|
|
{0x2510,0x2000},//SEQ_DATA_PORT
|
|
{0x2510,0x3142},//SEQ_DATA_PORT
|
|
{0x2510,0x3041},//SEQ_DATA_PORT
|
|
{0x2510,0x2000},//SEQ_DATA_PORT
|
|
{0x2510,0x3110},//SEQ_DATA_PORT
|
|
{0x2510,0x3041},//SEQ_DATA_PORT
|
|
{0x2510,0x2000},//SEQ_DATA_PORT
|
|
{0x2510,0x3120},//SEQ_DATA_PORT
|
|
{0x2510,0x3041},//SEQ_DATA_PORT
|
|
{0x2510,0x2000},//SEQ_DATA_PORT
|
|
{0x2510,0x3144},//SEQ_DATA_PORT
|
|
{0x2510,0x3041},//SEQ_DATA_PORT
|
|
{0x2510,0x2000},//SEQ_DATA_PORT
|
|
{0x2510,0x3148},//SEQ_DATA_PORT
|
|
{0x2510,0x3041},//SEQ_DATA_PORT
|
|
{0x2510,0x2000},//SEQ_DATA_PORT
|
|
{0x2510,0x3182},//SEQ_DATA_PORT
|
|
{0x2510,0x3041},//SEQ_DATA_PORT
|
|
{0x2510,0x2000},//SEQ_DATA_PORT
|
|
{0x2510,0x3184},//SEQ_DATA_PORT
|
|
{0x2510,0x2000},//SEQ_DATA_PORT
|
|
{0x2510,0x3190},//SEQ_DATA_PORT
|
|
{0x2510,0x3041},//SEQ_DATA_PORT
|
|
{0x2510,0x2000},//SEQ_DATA_PORT
|
|
{0x2510,0x31A0},//SEQ_DATA_PORT
|
|
{0x2510,0x3088},//SEQ_DATA_PORT
|
|
{0x2510,0x2201},//SEQ_DATA_PORT
|
|
{0x2510,0x807D},//SEQ_DATA_PORT
|
|
{0x2510,0x2206},//SEQ_DATA_PORT
|
|
{0x2510,0x8815},//SEQ_DATA_PORT
|
|
{0x2510,0x8877},//SEQ_DATA_PORT
|
|
{0x2510,0x0092},//SEQ_DATA_PORT
|
|
{0x2510,0x220E},//SEQ_DATA_PORT
|
|
{0x2510,0x2211},//SEQ_DATA_PORT
|
|
{0x2510,0x8055},//SEQ_DATA_PORT
|
|
{0x2510,0x3001},//SEQ_DATA_PORT
|
|
{0x2510,0x2000},//SEQ_DATA_PORT
|
|
{0x2510,0x8A61},//SEQ_DATA_PORT
|
|
{0x2510,0x8801},//SEQ_DATA_PORT
|
|
{0x2510,0x1092},//SEQ_DATA_PORT
|
|
{0x2510,0x181F},//SEQ_DATA_PORT
|
|
{0x2510,0x0B1F},//SEQ_DATA_PORT
|
|
{0x2510,0x101F},//SEQ_DATA_PORT
|
|
{0x2510,0x00B6},//SEQ_DATA_PORT
|
|
{0x2510,0x0023},//SEQ_DATA_PORT
|
|
{0x2510,0x00B9},//SEQ_DATA_PORT
|
|
{0x2510,0x104C},//SEQ_DATA_PORT
|
|
{0x2510,0x996E},//SEQ_DATA_PORT
|
|
{0x2510,0x0140},//SEQ_DATA_PORT
|
|
{0x2510,0x0257},//SEQ_DATA_PORT
|
|
{0x2510,0x1035},//SEQ_DATA_PORT
|
|
{0x2510,0x9F26},//SEQ_DATA_PORT
|
|
{0x2510,0x1423},//SEQ_DATA_PORT
|
|
{0x2510,0x0048},//SEQ_DATA_PORT
|
|
{0x2510,0xC878},//SEQ_DATA_PORT
|
|
{0x2510,0x200A},//SEQ_DATA_PORT
|
|
{0x2510,0x1548},//SEQ_DATA_PORT
|
|
{0x2510,0x0C49},//SEQ_DATA_PORT
|
|
{0x2510,0x1149},//SEQ_DATA_PORT
|
|
{0x2510,0x002A},//SEQ_DATA_PORT
|
|
{0x2510,0x1057},//SEQ_DATA_PORT
|
|
{0x2510,0x3281},//SEQ_DATA_PORT
|
|
{0x2510,0x2000},//SEQ_DATA_PORT
|
|
{0x2510,0x3044},//SEQ_DATA_PORT
|
|
{0x2510,0x2001},//SEQ_DATA_PORT
|
|
{0x2510,0xA020},//SEQ_DATA_PORT
|
|
{0x2510,0x000C},//SEQ_DATA_PORT
|
|
{0x2510,0x9825},//SEQ_DATA_PORT
|
|
{0x2510,0x1040},//SEQ_DATA_PORT
|
|
{0x2510,0x1054},//SEQ_DATA_PORT
|
|
{0x2510,0xB06D},//SEQ_DATA_PORT
|
|
{0x2510,0x0035},//SEQ_DATA_PORT
|
|
{0x2510,0x004D},//SEQ_DATA_PORT
|
|
{0x2510,0x9905},//SEQ_DATA_PORT
|
|
{0x2510,0xB064},//SEQ_DATA_PORT
|
|
{0x2510,0x99C5},//SEQ_DATA_PORT
|
|
{0x2510,0x0047},//SEQ_DATA_PORT
|
|
{0x2510,0xB920},//SEQ_DATA_PORT
|
|
{0x2510,0x1447},//SEQ_DATA_PORT
|
|
{0x2510,0x7FFF},//SEQ_DATA_PORT
|
|
{0x2510,0x7FFF},//SEQ_DATA_PORT
|
|
{0x2510,0x7FFF},//SEQ_DATA_PORT
|
|
{0x2510,0x7FFF},//SEQ_DATA_PORT
|
|
{0x2510,0x7FFF},//SEQ_DATA_PORT
|
|
{0x2510,0x7FFF},//SEQ_DATA_PORT
|
|
{0x2510,0x7FFF},//SEQ_DATA_PORT
|
|
{0x2510,0x7FFF},//SEQ_DATA_PORT
|
|
{0x2510,0x7FFF},//SEQ_DATA_PORT
|
|
{0x31F8,0x0008},//MIPI_CONFIG_2
|
|
{0x3C70,0x6828},//CALIB_ROWS
|
|
{0x3092,0x0826},//ROW_NOISE_CONTROL
|
|
{0x3428,0x0209},//SEQUENCER_CONTROL
|
|
{0x3516,0xFF04},//DAC_LD_22_23
|
|
{0x3526,0x6480},//DAC_LD_38_39
|
|
{0x3504,0x8AAA},//DAC_LD_4_5
|
|
{0x353C,0x220C},//DAC_LD_60_61
|
|
{0x3536,0x4C6E},//DAC_LD_54_55
|
|
{0x3D2A,0x0FFF},//T1_END_DEC_TH
|
|
{0x3364,0x00EC},//DCG_TRIM
|
|
{0x3512,0x8888},//DAC_LD_18_19
|
|
{0x3514,0x888F},//DAC_LD_20_21
|
|
{0x3520,0xFBF0},//DAC_LD_32_33
|
|
{0x3524,0xB2A1},//DAC_LD_36_37
|
|
{0x3528,0xCC84},//DAC_LD_40_41
|
|
{0x3532,0x4C8E},//DAC_LD_50_51
|
|
{0x3534,0x4E64},//DAC_LD_52_53
|
|
{0x351E,0x5856},//DAC_LD_30_31
|
|
{0x353E,0x98F2},//DAC_LD_62_63
|
|
{0x352E,0x6A8A},//DAC_LD_46_47
|
|
{0x3370,0x0211},//DBLC_CONTROL
|
|
{0x3372,0x700F},//DBLC_FS0_CONTROL
|
|
{0x3540,0x3597},//DAC_LD_64_65
|
|
{0x58E2,0x0BE3},//COL_COUNT_VALUES1
|
|
{0x58E4,0x18B4},//COL_COUNT_VALUES2
|
|
{0x3522,0x7C97},//DAC_LD_34_35
|
|
{0x30BA,0x0024},//DIGITAL_CTRL
|
|
{0x31D4,0x0042},//CLK_MEM_GATING_CTRL
|
|
{0x352A,0x6F8F},//DAC_LD_42_43
|
|
{0x3530,0x4A08},//DAC_LD_48_49
|
|
{0x351A,0x5FFF},//DAC_LD_26_27
|
|
{0x350E,0x39D9},//DAC_LD_14_15
|
|
{0x3510,0x9988},//DAC_LD_16_17
|
|
{0x3380,0x1FFF},//DBLC_OFFSET1
|
|
{0x337A,0x1000},//DBLC_SCALE1
|
|
{0x3092,0x0800},//ROW_NOISE_CONTROL
|
|
{0x350A,0x0654},//DAC_LD_10_11
|
|
{0x3364,0x00E0},//DCG_TRIM
|
|
{0x591E,0x61AE},//ANALOG_GAIN_WR_DATA
|
|
{0x591E,0x722C},//ANALOG_GAIN_WR_DATA
|
|
{0x591E,0x82B8},//ANALOG_GAIN_WR_DATA
|
|
{0x591E,0x92F6},//ANALOG_GAIN_WR_DATA
|
|
{0x591E,0xA447},//ANALOG_GAIN_WR_DATA
|
|
{0x591E,0xB66D},//ANALOG_GAIN_WR_DATA
|
|
{0x591E,0xC6EA},//ANALOG_GAIN_WR_DATA
|
|
{0x591E,0xDECD},//ANALOG_GAIN_WR_DATA
|
|
{0x3532,0x4C8A},//DAC_LD_50_51
|
|
{0x3534,0x4E60},//DAC_LD_52_53
|
|
{0x353E,0x90F2},//DAC_LD_62_63
|
|
{0x351A,0x4FFF},//DAC_LD_26_27
|
|
{0x591C,0x00D7},//DGR_AMP_GAIN
|
|
{0x3522,0x6097},//DAC_LD_34_35
|
|
{0x5002,0x37C3},//T1_PIX_DEF_ID2
|
|
{0x51CC,0x0149},//T1_NOISE_GAIN_THRESHOLD0
|
|
{0x51D8,0x044D},//T1_NOISE_GAIN_THRESHOLD1
|
|
{0x51CE,0x0700},//T1_NOISE_GAIN_THRESHOLD2
|
|
{0x51D0,0x0001},//T1_NOISE_FLOOR0
|
|
{0x51D2,0x0002},//T1_NOISE_FLOOR1
|
|
{0x51D4,0x0003},//T1_NOISE_FLOOR2
|
|
{0x51D6,0x0004},//T1_NOISE_FLOOR3
|
|
{0x5202,0x37C3},//T2_PIX_DEF_ID2
|
|
{0x51EA,0x0149},//T2_NOISE_GAIN_THRESHOLD0
|
|
{0x51FC,0x044D},//T2_NOISE_GAIN_THRESHOLD1
|
|
{0x51EC,0x0700},//T2_NOISE_GAIN_THRESHOLD2
|
|
{0x51EE,0x0001},//T2_NOISE_FLOOR0
|
|
{0x51F0,0x0002},//T2_NOISE_FLOOR1
|
|
{0x51F2,0x0003},//T2_NOISE_FLOOR2
|
|
{0x51F4,0x0004},//T2_NOISE_FLOOR3
|
|
{0x5402,0x37C3},//T4_PIX_DEF_ID2
|
|
{0x5560,0x0149},//T4_NOISE_GAIN_THRESHOLD0
|
|
{0x556C,0x044D},//T4_NOISE_GAIN_THRESHOLD1
|
|
{0x5562,0x0700},//T4_NOISE_GAIN_THRESHOLD2
|
|
{0x5564,0x0001},//T4_NOISE_FLOOR0
|
|
{0x5566,0x0002},//T4_NOISE_FLOOR1
|
|
{0x5568,0x0003},//T4_NOISE_FLOOR2
|
|
{0x556A,0x0004},//T4_NOISE_FLOOR3
|
|
{0x31E0,0x0001},//PIX_DEF_ID
|
|
{0x5000,0x0080},//T1_PIX_DEF_ID
|
|
{0x5000,0x0180},//T1_PIX_DEF_ID
|
|
{0x5000,0x0180},//T1_PIX_DEF_ID
|
|
{0x5200,0x0080},//T2_PIX_DEF_ID
|
|
{0x5200,0x0180},//T2_PIX_DEF_ID
|
|
{0x5200,0x0180},//T2_PIX_DEF_ID
|
|
{0x5400,0x0080},//T4_PIX_DEF_ID
|
|
{0x5400,0x0180},//T4_PIX_DEF_ID
|
|
{0x5400,0x0180},//T4_PIX_DEF_ID
|
|
{0x5000,0x0180},//T1_PIX_DEF_ID
|
|
{0x5200,0x0180},//T2_PIX_DEF_ID
|
|
{0x5400,0x0180},//T4_PIX_DEF_ID
|
|
{0x50A2,0x3F2A},//BMT0
|
|
{0x50A4,0x875A},//BMT1
|
|
{0x50A6,0x030F},//SINGLEK_FACTOR0
|
|
{0x50A6,0x0F0F},//SINGLEK_FACTOR0
|
|
{0x50A8,0x030F},//SINGLEK_FACTOR1
|
|
{0x50A8,0x0F0F},//SINGLEK_FACTOR1
|
|
{0x50AA,0x030F},//SINGLEK_FACTOR2
|
|
{0x50AA,0x050F},//SINGLEK_FACTOR2
|
|
{0x50AC,0x0301},//CROSS_FACTOR0
|
|
{0x50AC,0x0101},//CROSS_FACTOR0
|
|
{0x50AE,0x0301},//CROSS_FACTOR1
|
|
{0x50AE,0x0101},//CROSS_FACTOR1
|
|
{0x50B0,0x0301},//CROSS_FACTOR2
|
|
{0x50B0,0x0101},//CROSS_FACTOR2
|
|
{0x50B2,0x03FF},//SINGLE_MAX_FACTOR
|
|
{0x50B4,0x030F},//COUPLE_FACTOR0
|
|
{0x50B4,0x0F0F},//COUPLE_FACTOR0
|
|
{0x50B6,0x030F},//COUPLE_FACTOR1
|
|
{0x50B6,0x0F0F},//COUPLE_FACTOR1
|
|
{0x50B8,0x030F},//COUPLE_FACTOR2
|
|
{0x50B8,0x050F},//COUPLE_FACTOR2
|
|
{0x3D2A,0x0FFF},//T1_END_DEC_TH
|
|
{0x3D34,0x9C40},//T2_STR_DEC_TH
|
|
{0x3D36,0xFFFF},//T2_END_DEC_TH
|
|
{0x3D02,0x5033},//MEC_CTRL2
|
|
{0x3086,0x1A28},//PARK_ROW_ADDR
|
|
{0x33E4,0x0040},//VERT_SHADING_CONTROL
|
|
{0x3C70,0x6222},//CALIB_ROWS
|
|
{0x3110,0x0011},//HDR_CONTROL0
|
|
{0x30B0,0x0820},//DIGITAL_TEST
|
|
{0x3280,0x0ED8},//T1_BARRIER_C0
|
|
{0x3282,0x0ED8},//T1_BARRIER_C1
|
|
{0x3284,0x0ED8},//T1_BARRIER_C2
|
|
{0x3286,0x0ED8},//T1_BARRIER_C3
|
|
{0x3288,0x0ED8},//T2_BARRIER_C0
|
|
{0x328A,0x0ED8},//T2_BARRIER_C1
|
|
{0x328C,0x0ED8},//T2_BARRIER_C2
|
|
{0x328E,0x0ED8},//T2_BARRIER_C3
|
|
{0x3290,0x0ED8},//T3_BARRIER_C0
|
|
{0x3292,0x0ED8},//T3_BARRIER_C1
|
|
{0x3294,0x0ED8},//T3_BARRIER_C2
|
|
{0x3296,0x0ED8},//T3_BARRIER_C3
|
|
{0x3100,0xC001},//DLO_CONTROL0
|
|
{0x3102,0xBED8},//DLO_CONTROL1
|
|
{0x3104,0xBED8},//DLO_CONTROL2
|
|
{0x3106,0xBED8},//DLO_CONTROL3
|
|
{0x3108,0x07D0},//DLO_CONTROL4
|
|
{0x3116,0x2001},//HDR_CONTROL3
|
|
{0x3124,0x006D},//HDR_MD_CONTROL0
|
|
{0x3126,0x003C},//HDR_MD_CONTROL1
|
|
{0x31AE,0x0204},//SERIAL_FORMAT
|
|
{0x31AC,0x0C0C},//DATA_FORMAT_BITS
|
|
{0x3082,0x0014},//OPERATION_MODE_CTRL
|
|
{0x30BA,0x0135},//DIGITAL_CTRL
|
|
{0x3238,0x0044},//EXPOSURE_RATIO
|
|
{0x3012,0x07A0},//COARSE_INTEGRATION_TIME_
|
|
{0x3212,0x007A},//COARSE_INTEGRATION_TIME2
|
|
{0x300C,0x0A8C},//LINE_LENGTH_PCK_
|
|
{0x300A,0x0980},//FRAME_LENGTH_LINES_
|
|
{0x5914,0x4012},//SENSOR_GAIN_TABLE_SEL
|
|
{REG_DELAY,100},
|
|
{0x5914,0x4002},//SENSOR_GAIN_TABLE_SEL
|
|
{0x5910,0x608A},//SENSOR_GAIN_REG1
|
|
{0x5910,0x7091},//SENSOR_GAIN_REG1
|
|
{0x5910,0x689C},//SENSOR_GAIN_REG1
|
|
{0x5910,0x8885},//SENSOR_GAIN_REG1
|
|
{0x5910,0x98AD},//SENSOR_GAIN_REG1
|
|
{0x5910,0xA8A9},//SENSOR_GAIN_REG1
|
|
{0x5910,0xC894},//SENSOR_GAIN_REG1
|
|
{0x5910,0xC8D1},//SENSOR_GAIN_REG1
|
|
{0x5910,0xD88A},//SENSOR_GAIN_REG1
|
|
{0x5910,0xD8C3},//SENSOR_GAIN_REG1
|
|
{0x5910,0xD915},//SENSOR_GAIN_REG1
|
|
{0x5910,0xD988},//SENSOR_GAIN_REG1
|
|
{0x5910,0xDA2A},//SENSOR_GAIN_REG1
|
|
{0x5910,0xDB0E},//SENSOR_GAIN_REG1
|
|
{0x5910,0xDC53},//SENSOR_GAIN_REG1
|
|
{0x5910,0x608A},//SENSOR_GAIN_REG1
|
|
{0x5910,0xC919},//SENSOR_GAIN_REG1
|
|
{0x5910,0xCA00},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0000},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0000},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0000},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0001},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0001},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0003},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0003},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0003},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0004},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0004},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0004},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0004},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0004},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0004},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0004},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0002},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0003},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0003},//SENSOR_GAIN_REG1
|
|
{0x5910,0x5A8B},//SENSOR_GAIN_REG1
|
|
{0x5910,0xFF04},//SENSOR_GAIN_REG1
|
|
{0x5910,0xF704},//SENSOR_GAIN_REG1
|
|
{0x5910,0xFF04},//SENSOR_GAIN_REG1
|
|
{0x5910,0xF704},//SENSOR_GAIN_REG1
|
|
{0x5910,0xF704},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0005},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0006},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0007},//SENSOR_GAIN_REG1
|
|
{0x5910,0x9A8B},//SENSOR_GAIN_REG1
|
|
{0x5910,0xFF04},//SENSOR_GAIN_REG1
|
|
{0x5910,0xF704},//SENSOR_GAIN_REG1
|
|
{0x5910,0xF704},//SENSOR_GAIN_REG1
|
|
{0x5910,0xF704},//SENSOR_GAIN_REG1
|
|
{0x5910,0xF704},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0015},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0016},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0017},//SENSOR_GAIN_REG1
|
|
{0x5910,0xDA8B},//SENSOR_GAIN_REG1
|
|
{0x5910,0xFF04},//SENSOR_GAIN_REG1
|
|
{0x5910,0xF704},//SENSOR_GAIN_REG1
|
|
{0x5910,0xF704},//SENSOR_GAIN_REG1
|
|
{0x5910,0xF704},//SENSOR_GAIN_REG1
|
|
{0x5910,0xF704},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0025},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0026},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0027},//SENSOR_GAIN_REG1
|
|
{0x5910,0x59B9},//SENSOR_GAIN_REG1
|
|
{0x5910,0x700F},//SENSOR_GAIN_REG1
|
|
{0x5910,0x7F0F},//SENSOR_GAIN_REG1
|
|
{0x5910,0x700F},//SENSOR_GAIN_REG1
|
|
{0x5910,0x7F0F},//SENSOR_GAIN_REG1
|
|
{0x5910,0x7F0F},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0035},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0036},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0037},//SENSOR_GAIN_REG1
|
|
{0x5910,0x99B9},//SENSOR_GAIN_REG1
|
|
{0x5910,0x700F},//SENSOR_GAIN_REG1
|
|
{0x5910,0x7F0F},//SENSOR_GAIN_REG1
|
|
{0x5910,0x700F},//SENSOR_GAIN_REG1
|
|
{0x5910,0x7F0F},//SENSOR_GAIN_REG1
|
|
{0x5910,0x7F0F},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0045},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0046},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0047},//SENSOR_GAIN_REG1
|
|
{0x5910,0xD9B9},//SENSOR_GAIN_REG1
|
|
{0x5910,0x700F},//SENSOR_GAIN_REG1
|
|
{0x5910,0x7F0F},//SENSOR_GAIN_REG1
|
|
{0x5910,0x700F},//SENSOR_GAIN_REG1
|
|
{0x5910,0x7F0F},//SENSOR_GAIN_REG1
|
|
{0x5910,0x7F0F},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0055},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0056},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0057},//SENSOR_GAIN_REG1
|
|
{0x5910,0x9A85},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0654},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0654},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0684},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0654},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0654},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0065},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0066},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0067},//SENSOR_GAIN_REG1
|
|
{0x5910,0x59BD},//SENSOR_GAIN_REG1
|
|
{0x5910,0x1000},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0C00},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0F00},//SENSOR_GAIN_REG1
|
|
{0x5910,0x1000},//SENSOR_GAIN_REG1
|
|
{0x5910,0x10F0},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0075},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0076},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0077},//SENSOR_GAIN_REG1
|
|
{0x5912,0x608A},//SENSOR_GAIN_REG2
|
|
{0x5912,0x7091},//SENSOR_GAIN_REG2
|
|
{0x5912,0x689C},//SENSOR_GAIN_REG2
|
|
{0x5912,0x8885},//SENSOR_GAIN_REG2
|
|
{0x5912,0x98AD},//SENSOR_GAIN_REG2
|
|
{0x5912,0xA8A9},//SENSOR_GAIN_REG2
|
|
{0x5912,0xC894},//SENSOR_GAIN_REG2
|
|
{0x5912,0xC8D1},//SENSOR_GAIN_REG2
|
|
{0x5912,0xC927},//SENSOR_GAIN_REG2
|
|
{0x5912,0xC9A0},//SENSOR_GAIN_REG2
|
|
{0x5912,0xCA4C},//SENSOR_GAIN_REG2
|
|
{0x5912,0xCB3F},//SENSOR_GAIN_REG2
|
|
{0x5912,0xCC97},//SENSOR_GAIN_REG2
|
|
{0x5912,0xCE7C},//SENSOR_GAIN_REG2
|
|
{0x5912,0xCFFF},//SENSOR_GAIN_REG2
|
|
{0x5912,0x608A},//SENSOR_GAIN_REG2
|
|
{0x5912,0xC8F0},//SENSOR_GAIN_REG2
|
|
{0x5912,0xCA00},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0000},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0000},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0000},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0001},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0001},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0003},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0003},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0003},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0004},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0004},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0004},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0004},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0004},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0004},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0004},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0002},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0003},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0003},//SENSOR_GAIN_REG2
|
|
{0x5912,0x5A8B},//SENSOR_GAIN_REG2
|
|
{0x5912,0xFF04},//SENSOR_GAIN_REG2
|
|
{0x5912,0xF704},//SENSOR_GAIN_REG2
|
|
{0x5912,0xFF04},//SENSOR_GAIN_REG2
|
|
{0x5912,0xF704},//SENSOR_GAIN_REG2
|
|
{0x5912,0xF704},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0005},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0006},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0007},//SENSOR_GAIN_REG2
|
|
{0x5912,0x9A8B},//SENSOR_GAIN_REG2
|
|
{0x5912,0xFF04},//SENSOR_GAIN_REG2
|
|
{0x5912,0xF704},//SENSOR_GAIN_REG2
|
|
{0x5912,0xF704},//SENSOR_GAIN_REG2
|
|
{0x5912,0xF704},//SENSOR_GAIN_REG2
|
|
{0x5912,0xF704},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0015},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0016},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0017},//SENSOR_GAIN_REG2
|
|
{0x5912,0xDA8B},//SENSOR_GAIN_REG2
|
|
{0x5912,0xFF04},//SENSOR_GAIN_REG2
|
|
{0x5912,0xF704},//SENSOR_GAIN_REG2
|
|
{0x5912,0xF704},//SENSOR_GAIN_REG2
|
|
{0x5912,0xF704},//SENSOR_GAIN_REG2
|
|
{0x5912,0xF704},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0025},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0026},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0027},//SENSOR_GAIN_REG2
|
|
{0x5912,0x59B9},//SENSOR_GAIN_REG2
|
|
{0x5912,0x700F},//SENSOR_GAIN_REG2
|
|
{0x5912,0x7F0F},//SENSOR_GAIN_REG2
|
|
{0x5912,0x700F},//SENSOR_GAIN_REG2
|
|
{0x5912,0x7F0F},//SENSOR_GAIN_REG2
|
|
{0x5912,0x7F0F},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0035},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0036},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0037},//SENSOR_GAIN_REG2
|
|
{0x5912,0x99B9},//SENSOR_GAIN_REG2
|
|
{0x5912,0x700F},//SENSOR_GAIN_REG2
|
|
{0x5912,0x7F0F},//SENSOR_GAIN_REG2
|
|
{0x5912,0x700F},//SENSOR_GAIN_REG2
|
|
{0x5912,0x7F0F},//SENSOR_GAIN_REG2
|
|
{0x5912,0x7F0F},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0045},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0046},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0047},//SENSOR_GAIN_REG2
|
|
{0x5912,0xD9B9},//SENSOR_GAIN_REG2
|
|
{0x5912,0x700F},//SENSOR_GAIN_REG2
|
|
{0x5912,0x7F0F},//SENSOR_GAIN_REG2
|
|
{0x5912,0x700F},//SENSOR_GAIN_REG2
|
|
{0x5912,0x7F0F},//SENSOR_GAIN_REG2
|
|
{0x5912,0x7F0F},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0055},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0056},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0057},//SENSOR_GAIN_REG2
|
|
{0x5912,0x9A85},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0654},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0654},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0684},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0654},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0654},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0065},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0066},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0067},//SENSOR_GAIN_REG2
|
|
{0x5912,0x59BD},//SENSOR_GAIN_REG2
|
|
{0x5912,0x1000},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0C00},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0F00},//SENSOR_GAIN_REG2
|
|
{0x5912,0x1000},//SENSOR_GAIN_REG2
|
|
{0x5912,0x10F0},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0075},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0076},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0077},//SENSOR_GAIN_REG2
|
|
{0x5914,0x4006},//SENSOR_GAIN_TABLE_SEL
|
|
{0x5900,0x0020},//SENSOR_GAIN
|
|
{0x5902,0x0000},//SENSOR_GAIN_T2
|
|
{0x3110,0x0001},//HDR_CONTROL0
|
|
|
|
{REG_NULL, 0x00},
|
|
};
|
|
static const struct regval ar0822_hdr12bit_3840x2160_20fps_regs[] = {
|
|
{REG_DELAY, 2000},
|
|
{0x3030,0x0124},//PLL_MULTIPLIER
|
|
{0x302E,0x0006},//PRE_PLL_CLK_DIV
|
|
{0x302C,0x0002},//VT_SYS_CLK_DIV
|
|
{0x302A,0x0004},//VT_PIX_CLK_DIV
|
|
{0x3038,0x0002},//OP_SYS_CLK_DIV
|
|
{0x3036,0x0006},//OP_WORD_CLK_DIV
|
|
{0x31B0,0x0089},//FRAME_PREAMBLE
|
|
{0x31B2,0x005C},//LINE_PREAMBLE
|
|
{0x31B4,0x624A},//MIPI_TIMING_0
|
|
{0x31B6,0x630B},//MIPI_TIMING_1
|
|
{0x31B8,0x90CB},//MIPI_TIMING_2
|
|
{0x31BA,0x038E},//MIPI_TIMING_3
|
|
{0x31BC,0x508B},//MIPI_TIMING_4
|
|
{0x3342,0x122C},//MIPI_F1_PDT_EDT
|
|
{0x2512,0xA000},//SEQ_CTRL_PORT
|
|
{0x2510,0x0720},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0x2122},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0x26FF},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x0F8C},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20E0},//SEQ_DATA_PORT
|
|
{0x2510,0x8055},//SEQ_DATA_PORT
|
|
{0x2510,0xA0E1},//SEQ_DATA_PORT
|
|
{0x2510,0x3041},//SEQ_DATA_PORT
|
|
{0x2510,0x2000},//SEQ_DATA_PORT
|
|
{0x2510,0x3088},//SEQ_DATA_PORT
|
|
{0x2510,0x3282},//SEQ_DATA_PORT
|
|
{0x2510,0xA681},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FE},//SEQ_DATA_PORT
|
|
{0x2510,0x9070},//SEQ_DATA_PORT
|
|
{0x2510,0x891D},//SEQ_DATA_PORT
|
|
{0x2510,0x867F},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FC},//SEQ_DATA_PORT
|
|
{0x2510,0x893F},//SEQ_DATA_PORT
|
|
{0x2510,0x0F92},//SEQ_DATA_PORT
|
|
{0x2510,0x20E0},//SEQ_DATA_PORT
|
|
{0x2510,0x0F8F},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20E0},//SEQ_DATA_PORT
|
|
{0x2510,0x9770},//SEQ_DATA_PORT
|
|
{0x2510,0x20FC},//SEQ_DATA_PORT
|
|
{0x2510,0x8054},//SEQ_DATA_PORT
|
|
{0x2510,0x896C},//SEQ_DATA_PORT
|
|
{0x2510,0x200A},//SEQ_DATA_PORT
|
|
{0x2510,0x9030},//SEQ_DATA_PORT
|
|
{0x2510,0x200A},//SEQ_DATA_PORT
|
|
{0x2510,0x8040},//SEQ_DATA_PORT
|
|
{0x2510,0x8948},//SEQ_DATA_PORT
|
|
{0x2510,0x200A},//SEQ_DATA_PORT
|
|
{0x2510,0x1597},//SEQ_DATA_PORT
|
|
{0x2510,0x8808},//SEQ_DATA_PORT
|
|
{0x2510,0x200A},//SEQ_DATA_PORT
|
|
{0x2510,0x1F96},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20E0},//SEQ_DATA_PORT
|
|
{0x2510,0xA0C0},//SEQ_DATA_PORT
|
|
{0x2510,0x200A},//SEQ_DATA_PORT
|
|
{0x2510,0x3044},//SEQ_DATA_PORT
|
|
{0x2510,0x3088},//SEQ_DATA_PORT
|
|
{0x2510,0x3282},//SEQ_DATA_PORT
|
|
{0x2510,0x2004},//SEQ_DATA_PORT
|
|
{0x2510,0x1FAA},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20E0},//SEQ_DATA_PORT
|
|
{0x2510,0x7FFF},//SEQ_DATA_PORT
|
|
{0x2510,0x7FFF},//SEQ_DATA_PORT
|
|
{0x2510,0x7FFF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x7FFF},//SEQ_DATA_PORT
|
|
{0x2510,0x7FFF},//SEQ_DATA_PORT
|
|
{0x2510,0x7FFF},//SEQ_DATA_PORT
|
|
{0x2510,0x3108},//SEQ_DATA_PORT
|
|
{0x2510,0x2400},//SEQ_DATA_PORT
|
|
{0x2510,0x3244},//SEQ_DATA_PORT
|
|
{0x2510,0x7FFF},//SEQ_DATA_PORT
|
|
{0x2510,0x3108},//SEQ_DATA_PORT
|
|
{0x2510,0x2400},//SEQ_DATA_PORT
|
|
{0x2510,0x2702},//SEQ_DATA_PORT
|
|
{0x2510,0x3242},//SEQ_DATA_PORT
|
|
{0x2510,0x3108},//SEQ_DATA_PORT
|
|
{0x2510,0x2420},//SEQ_DATA_PORT
|
|
{0x2510,0x2703},//SEQ_DATA_PORT
|
|
{0x2510,0x3242},//SEQ_DATA_PORT
|
|
{0x2510,0x3108},//SEQ_DATA_PORT
|
|
{0x2510,0x2420},//SEQ_DATA_PORT
|
|
{0x2510,0x2704},//SEQ_DATA_PORT
|
|
{0x2510,0x3244},//SEQ_DATA_PORT
|
|
{0x2510,0x7FFF},//SEQ_DATA_PORT
|
|
{0x2510,0x7FFF},//SEQ_DATA_PORT
|
|
{0x2510,0x7FFF},//SEQ_DATA_PORT
|
|
{0x2510,0x7FFF},//SEQ_DATA_PORT
|
|
{0x2510,0x8801},//SEQ_DATA_PORT
|
|
{0x2510,0x000F},//SEQ_DATA_PORT
|
|
{0x2510,0x109C},//SEQ_DATA_PORT
|
|
{0x2510,0x8855},//SEQ_DATA_PORT
|
|
{0x2510,0x3101},//SEQ_DATA_PORT
|
|
{0x2510,0x3041},//SEQ_DATA_PORT
|
|
{0x2510,0x2000},//SEQ_DATA_PORT
|
|
{0x2510,0x3102},//SEQ_DATA_PORT
|
|
{0x2510,0x3041},//SEQ_DATA_PORT
|
|
{0x2510,0x2000},//SEQ_DATA_PORT
|
|
{0x2510,0x3181},//SEQ_DATA_PORT
|
|
{0x2510,0x3041},//SEQ_DATA_PORT
|
|
{0x2510,0x2000},//SEQ_DATA_PORT
|
|
{0x2510,0x3188},//SEQ_DATA_PORT
|
|
{0x2510,0x3041},//SEQ_DATA_PORT
|
|
{0x2510,0x2000},//SEQ_DATA_PORT
|
|
{0x2510,0x3282},//SEQ_DATA_PORT
|
|
{0x2510,0x3104},//SEQ_DATA_PORT
|
|
{0x2510,0x2000},//SEQ_DATA_PORT
|
|
{0x2510,0xB0E4},//SEQ_DATA_PORT
|
|
{0x2510,0xAD92},//SEQ_DATA_PORT
|
|
{0x2510,0xBC0C},//SEQ_DATA_PORT
|
|
{0x2510,0x1028},//SEQ_DATA_PORT
|
|
{0x2510,0x0022},//SEQ_DATA_PORT
|
|
{0x2510,0xC020},//SEQ_DATA_PORT
|
|
{0x2510,0x003E},//SEQ_DATA_PORT
|
|
{0x2510,0x0045},//SEQ_DATA_PORT
|
|
{0x2510,0x00B0},//SEQ_DATA_PORT
|
|
{0x2510,0x0028},//SEQ_DATA_PORT
|
|
{0x2510,0x30C1},//SEQ_DATA_PORT
|
|
{0x2510,0x8015},//SEQ_DATA_PORT
|
|
{0x2510,0xA038},//SEQ_DATA_PORT
|
|
{0x2510,0x100F},//SEQ_DATA_PORT
|
|
{0x2510,0x0507},//SEQ_DATA_PORT
|
|
{0x2510,0xA220},//SEQ_DATA_PORT
|
|
{0x2510,0x0010},//SEQ_DATA_PORT
|
|
{0x2510,0x10C2},//SEQ_DATA_PORT
|
|
{0x2510,0xB760},//SEQ_DATA_PORT
|
|
{0x2510,0x0033},//SEQ_DATA_PORT
|
|
{0x2510,0x1082},//SEQ_DATA_PORT
|
|
{0x2510,0x100B},//SEQ_DATA_PORT
|
|
{0x2510,0x1029},//SEQ_DATA_PORT
|
|
{0x2510,0xA85A},//SEQ_DATA_PORT
|
|
{0x2510,0x998D},//SEQ_DATA_PORT
|
|
{0x2510,0xC810},//SEQ_DATA_PORT
|
|
{0x2510,0x2004},//SEQ_DATA_PORT
|
|
{0x2510,0x0ECE},//SEQ_DATA_PORT
|
|
{0x2510,0x123B},//SEQ_DATA_PORT
|
|
{0x2510,0xC000},//SEQ_DATA_PORT
|
|
{0x2510,0x032F},//SEQ_DATA_PORT
|
|
{0x2510,0x11D5},//SEQ_DATA_PORT
|
|
{0x2510,0x162F},//SEQ_DATA_PORT
|
|
{0x2510,0x9000},//SEQ_DATA_PORT
|
|
{0x2510,0x2034},//SEQ_DATA_PORT
|
|
{0x2510,0x0015},//SEQ_DATA_PORT
|
|
{0x2510,0x04CB},//SEQ_DATA_PORT
|
|
{0x2510,0x1022},//SEQ_DATA_PORT
|
|
{0x2510,0x1031},//SEQ_DATA_PORT
|
|
{0x2510,0x002D},//SEQ_DATA_PORT
|
|
{0x2510,0x1015},//SEQ_DATA_PORT
|
|
{0x2510,0x80B9},//SEQ_DATA_PORT
|
|
{0x2510,0xA101},//SEQ_DATA_PORT
|
|
{0x2510,0x001C},//SEQ_DATA_PORT
|
|
{0x2510,0x008E},//SEQ_DATA_PORT
|
|
{0x2510,0x124B},//SEQ_DATA_PORT
|
|
{0x2510,0x01B5},//SEQ_DATA_PORT
|
|
{0x2510,0x0B92},//SEQ_DATA_PORT
|
|
{0x2510,0xA400},//SEQ_DATA_PORT
|
|
{0x2510,0x8091},//SEQ_DATA_PORT
|
|
{0x2510,0x0028},//SEQ_DATA_PORT
|
|
{0x2510,0x3002},//SEQ_DATA_PORT
|
|
{0x2510,0x2004},//SEQ_DATA_PORT
|
|
{0x2510,0x1012},//SEQ_DATA_PORT
|
|
{0x2510,0x100E},//SEQ_DATA_PORT
|
|
{0x2510,0x10A8},//SEQ_DATA_PORT
|
|
{0x2510,0x00A1},//SEQ_DATA_PORT
|
|
{0x2510,0x132D},//SEQ_DATA_PORT
|
|
{0x2510,0x09AF},//SEQ_DATA_PORT
|
|
{0x2510,0x0159},//SEQ_DATA_PORT
|
|
{0x2510,0x121D},//SEQ_DATA_PORT
|
|
{0x2510,0x1259},//SEQ_DATA_PORT
|
|
{0x2510,0x11AF},//SEQ_DATA_PORT
|
|
{0x2510,0x18B5},//SEQ_DATA_PORT
|
|
{0x2510,0x0395},//SEQ_DATA_PORT
|
|
{0x2510,0x054B},//SEQ_DATA_PORT
|
|
{0x2510,0x1021},//SEQ_DATA_PORT
|
|
{0x2510,0x0020},//SEQ_DATA_PORT
|
|
{0x2510,0x1015},//SEQ_DATA_PORT
|
|
{0x2510,0x1030},//SEQ_DATA_PORT
|
|
{0x2510,0x00CF},//SEQ_DATA_PORT
|
|
{0x2510,0xB146},//SEQ_DATA_PORT
|
|
{0x2510,0xC290},//SEQ_DATA_PORT
|
|
{0x2510,0x103C},//SEQ_DATA_PORT
|
|
{0x2510,0xA882},//SEQ_DATA_PORT
|
|
{0x2510,0x8055},//SEQ_DATA_PORT
|
|
{0x2510,0x00A9},//SEQ_DATA_PORT
|
|
{0x2510,0x8801},//SEQ_DATA_PORT
|
|
{0x2510,0xB700},//SEQ_DATA_PORT
|
|
{0x2510,0x0001},//SEQ_DATA_PORT
|
|
{0x2510,0x02A2},//SEQ_DATA_PORT
|
|
{0x2510,0x000A},//SEQ_DATA_PORT
|
|
{0x2510,0x98BB},//SEQ_DATA_PORT
|
|
{0x2510,0x203F},//SEQ_DATA_PORT
|
|
{0x2510,0x0036},//SEQ_DATA_PORT
|
|
{0x2510,0x1001},//SEQ_DATA_PORT
|
|
{0x2510,0x99BE},//SEQ_DATA_PORT
|
|
{0x2510,0x0139},//SEQ_DATA_PORT
|
|
{0x2510,0x100A},//SEQ_DATA_PORT
|
|
{0x2510,0x0040},//SEQ_DATA_PORT
|
|
{0x2510,0x1022},//SEQ_DATA_PORT
|
|
{0x2510,0x124C},//SEQ_DATA_PORT
|
|
{0x2510,0x109F},//SEQ_DATA_PORT
|
|
{0x2510,0x15A3},//SEQ_DATA_PORT
|
|
{0x2510,0x002A},//SEQ_DATA_PORT
|
|
{0x2510,0x3081},//SEQ_DATA_PORT
|
|
{0x2510,0x2001},//SEQ_DATA_PORT
|
|
{0x2510,0x3044},//SEQ_DATA_PORT
|
|
{0x2510,0x2000},//SEQ_DATA_PORT
|
|
{0x2510,0x112A},//SEQ_DATA_PORT
|
|
{0x2510,0x101D},//SEQ_DATA_PORT
|
|
{0x2510,0x202B},//SEQ_DATA_PORT
|
|
{0x2510,0x02B8},//SEQ_DATA_PORT
|
|
{0x2510,0x10B8},//SEQ_DATA_PORT
|
|
{0x2510,0x1136},//SEQ_DATA_PORT
|
|
{0x2510,0x996B},//SEQ_DATA_PORT
|
|
{0x2510,0x004C},//SEQ_DATA_PORT
|
|
{0x2510,0x1039},//SEQ_DATA_PORT
|
|
{0x2510,0x1040},//SEQ_DATA_PORT
|
|
{0x2510,0x00B5},//SEQ_DATA_PORT
|
|
{0x2510,0x03C4},//SEQ_DATA_PORT
|
|
{0x2510,0x1144},//SEQ_DATA_PORT
|
|
{0x2510,0x1245},//SEQ_DATA_PORT
|
|
{0x2510,0x9A7B},//SEQ_DATA_PORT
|
|
{0x2510,0x002B},//SEQ_DATA_PORT
|
|
{0x2510,0x30D0},//SEQ_DATA_PORT
|
|
{0x2510,0x3141},//SEQ_DATA_PORT
|
|
{0x2510,0x3041},//SEQ_DATA_PORT
|
|
{0x2510,0x2000},//SEQ_DATA_PORT
|
|
{0x2510,0x3142},//SEQ_DATA_PORT
|
|
{0x2510,0x3041},//SEQ_DATA_PORT
|
|
{0x2510,0x2000},//SEQ_DATA_PORT
|
|
{0x2510,0x3110},//SEQ_DATA_PORT
|
|
{0x2510,0x3041},//SEQ_DATA_PORT
|
|
{0x2510,0x2000},//SEQ_DATA_PORT
|
|
{0x2510,0x3120},//SEQ_DATA_PORT
|
|
{0x2510,0x3041},//SEQ_DATA_PORT
|
|
{0x2510,0x2000},//SEQ_DATA_PORT
|
|
{0x2510,0x3144},//SEQ_DATA_PORT
|
|
{0x2510,0x3041},//SEQ_DATA_PORT
|
|
{0x2510,0x2000},//SEQ_DATA_PORT
|
|
{0x2510,0x3148},//SEQ_DATA_PORT
|
|
{0x2510,0x3041},//SEQ_DATA_PORT
|
|
{0x2510,0x2000},//SEQ_DATA_PORT
|
|
{0x2510,0x3182},//SEQ_DATA_PORT
|
|
{0x2510,0x3041},//SEQ_DATA_PORT
|
|
{0x2510,0x2000},//SEQ_DATA_PORT
|
|
{0x2510,0x3184},//SEQ_DATA_PORT
|
|
{0x2510,0x2000},//SEQ_DATA_PORT
|
|
{0x2510,0x3190},//SEQ_DATA_PORT
|
|
{0x2510,0x3041},//SEQ_DATA_PORT
|
|
{0x2510,0x2000},//SEQ_DATA_PORT
|
|
{0x2510,0x31A0},//SEQ_DATA_PORT
|
|
{0x2510,0x3088},//SEQ_DATA_PORT
|
|
{0x2510,0x2201},//SEQ_DATA_PORT
|
|
{0x2510,0x807D},//SEQ_DATA_PORT
|
|
{0x2510,0x2206},//SEQ_DATA_PORT
|
|
{0x2510,0x8815},//SEQ_DATA_PORT
|
|
{0x2510,0x8877},//SEQ_DATA_PORT
|
|
{0x2510,0x0092},//SEQ_DATA_PORT
|
|
{0x2510,0x220E},//SEQ_DATA_PORT
|
|
{0x2510,0x2211},//SEQ_DATA_PORT
|
|
{0x2510,0x8055},//SEQ_DATA_PORT
|
|
{0x2510,0x3001},//SEQ_DATA_PORT
|
|
{0x2510,0x2000},//SEQ_DATA_PORT
|
|
{0x2510,0x8A61},//SEQ_DATA_PORT
|
|
{0x2510,0x8801},//SEQ_DATA_PORT
|
|
{0x2510,0x1092},//SEQ_DATA_PORT
|
|
{0x2510,0x181F},//SEQ_DATA_PORT
|
|
{0x2510,0x0B1F},//SEQ_DATA_PORT
|
|
{0x2510,0x101F},//SEQ_DATA_PORT
|
|
{0x2510,0x00B6},//SEQ_DATA_PORT
|
|
{0x2510,0x0023},//SEQ_DATA_PORT
|
|
{0x2510,0x00B9},//SEQ_DATA_PORT
|
|
{0x2510,0x104C},//SEQ_DATA_PORT
|
|
{0x2510,0x996E},//SEQ_DATA_PORT
|
|
{0x2510,0x0140},//SEQ_DATA_PORT
|
|
{0x2510,0x0257},//SEQ_DATA_PORT
|
|
{0x2510,0x1035},//SEQ_DATA_PORT
|
|
{0x2510,0x9F26},//SEQ_DATA_PORT
|
|
{0x2510,0x1423},//SEQ_DATA_PORT
|
|
{0x2510,0x0048},//SEQ_DATA_PORT
|
|
{0x2510,0xC878},//SEQ_DATA_PORT
|
|
{0x2510,0x200A},//SEQ_DATA_PORT
|
|
{0x2510,0x1548},//SEQ_DATA_PORT
|
|
{0x2510,0x0C49},//SEQ_DATA_PORT
|
|
{0x2510,0x1149},//SEQ_DATA_PORT
|
|
{0x2510,0x002A},//SEQ_DATA_PORT
|
|
{0x2510,0x1057},//SEQ_DATA_PORT
|
|
{0x2510,0x3281},//SEQ_DATA_PORT
|
|
{0x2510,0x2000},//SEQ_DATA_PORT
|
|
{0x2510,0x3044},//SEQ_DATA_PORT
|
|
{0x2510,0x2001},//SEQ_DATA_PORT
|
|
{0x2510,0xA020},//SEQ_DATA_PORT
|
|
{0x2510,0x000C},//SEQ_DATA_PORT
|
|
{0x2510,0x9825},//SEQ_DATA_PORT
|
|
{0x2510,0x1040},//SEQ_DATA_PORT
|
|
{0x2510,0x1054},//SEQ_DATA_PORT
|
|
{0x2510,0xB06D},//SEQ_DATA_PORT
|
|
{0x2510,0x0035},//SEQ_DATA_PORT
|
|
{0x2510,0x004D},//SEQ_DATA_PORT
|
|
{0x2510,0x9905},//SEQ_DATA_PORT
|
|
{0x2510,0xB064},//SEQ_DATA_PORT
|
|
{0x2510,0x99C5},//SEQ_DATA_PORT
|
|
{0x2510,0x0047},//SEQ_DATA_PORT
|
|
{0x2510,0xB920},//SEQ_DATA_PORT
|
|
{0x2510,0x1447},//SEQ_DATA_PORT
|
|
{0x2510,0x7FFF},//SEQ_DATA_PORT
|
|
{0x2510,0x7FFF},//SEQ_DATA_PORT
|
|
{0x2510,0x7FFF},//SEQ_DATA_PORT
|
|
{0x2510,0x7FFF},//SEQ_DATA_PORT
|
|
{0x2510,0x7FFF},//SEQ_DATA_PORT
|
|
{0x2510,0x7FFF},//SEQ_DATA_PORT
|
|
{0x2510,0x7FFF},//SEQ_DATA_PORT
|
|
{0x2510,0x7FFF},//SEQ_DATA_PORT
|
|
{0x2510,0x7FFF},//SEQ_DATA_PORT
|
|
{0x31F8,0x0008},//MIPI_CONFIG_2
|
|
{0x3C70,0x6828},//CALIB_ROWS
|
|
{0x3092,0x0826},//ROW_NOISE_CONTROL
|
|
{0x3428,0x0209},//SEQUENCER_CONTROL
|
|
{0x3516,0xFF04},//DAC_LD_22_23
|
|
{0x3526,0x6480},//DAC_LD_38_39
|
|
{0x3504,0x8AAA},//DAC_LD_4_5
|
|
{0x353C,0x220C},//DAC_LD_60_61
|
|
{0x3536,0x4C6E},//DAC_LD_54_55
|
|
{0x3D2A,0x0FFF},//T1_END_DEC_TH
|
|
{0x3364,0x00EC},//DCG_TRIM
|
|
{0x3512,0x8888},//DAC_LD_18_19
|
|
{0x3514,0x888F},//DAC_LD_20_21
|
|
{0x3520,0xFBF0},//DAC_LD_32_33
|
|
{0x3524,0xB2A1},//DAC_LD_36_37
|
|
{0x3528,0xCC84},//DAC_LD_40_41
|
|
{0x3532,0x4C8E},//DAC_LD_50_51
|
|
{0x3534,0x4E64},//DAC_LD_52_53
|
|
{0x351E,0x5856},//DAC_LD_30_31
|
|
{0x353E,0x98F2},//DAC_LD_62_63
|
|
{0x352E,0x6A8A},//DAC_LD_46_47
|
|
{0x3370,0x0211},//DBLC_CONTROL
|
|
{0x3372,0x700F},//DBLC_FS0_CONTROL
|
|
{0x3540,0x3597},//DAC_LD_64_65
|
|
{0x58E2,0x0BE3},//COL_COUNT_VALUES1
|
|
{0x58E4,0x18B4},//COL_COUNT_VALUES2
|
|
{0x3522,0x7C97},//DAC_LD_34_35
|
|
{0x30BA,0x0024},//DIGITAL_CTRL
|
|
{0x31D4,0x0042},//CLK_MEM_GATING_CTRL
|
|
{0x352A,0x6F8F},//DAC_LD_42_43
|
|
{0x3530,0x4A08},//DAC_LD_48_49
|
|
{0x351A,0x5FFF},//DAC_LD_26_27
|
|
{0x350E,0x39D9},//DAC_LD_14_15
|
|
{0x3510,0x9988},//DAC_LD_16_17
|
|
{0x3380,0x1FFF},//DBLC_OFFSET1
|
|
{0x337A,0x1000},//DBLC_SCALE1
|
|
{0x3092,0x0800},//ROW_NOISE_CONTROL
|
|
{0x350A,0x0654},//DAC_LD_10_11
|
|
{0x3364,0x00E0},//DCG_TRIM
|
|
{0x591E,0x61AE},//ANALOG_GAIN_WR_DATA
|
|
{0x591E,0x722C},//ANALOG_GAIN_WR_DATA
|
|
{0x591E,0x82B8},//ANALOG_GAIN_WR_DATA
|
|
{0x591E,0x92F6},//ANALOG_GAIN_WR_DATA
|
|
{0x591E,0xA447},//ANALOG_GAIN_WR_DATA
|
|
{0x591E,0xB66D},//ANALOG_GAIN_WR_DATA
|
|
{0x591E,0xC6EA},//ANALOG_GAIN_WR_DATA
|
|
{0x591E,0xDECD},//ANALOG_GAIN_WR_DATA
|
|
{0x3532,0x4C8A},//DAC_LD_50_51
|
|
{0x3534,0x4E60},//DAC_LD_52_53
|
|
{0x353E,0x90F2},//DAC_LD_62_63
|
|
{0x351A,0x4FFF},//DAC_LD_26_27
|
|
{0x591C,0x00D7},//DGR_AMP_GAIN
|
|
{0x3522,0x6097},//DAC_LD_34_35
|
|
{0x5002,0x37C3},//T1_PIX_DEF_ID2
|
|
{0x51CC,0x0149},//T1_NOISE_GAIN_THRESHOLD0
|
|
{0x51D8,0x044D},//T1_NOISE_GAIN_THRESHOLD1
|
|
{0x51CE,0x0700},//T1_NOISE_GAIN_THRESHOLD2
|
|
{0x51D0,0x0001},//T1_NOISE_FLOOR0
|
|
{0x51D2,0x0002},//T1_NOISE_FLOOR1
|
|
{0x51D4,0x0003},//T1_NOISE_FLOOR2
|
|
{0x51D6,0x0004},//T1_NOISE_FLOOR3
|
|
{0x5202,0x37C3},//T2_PIX_DEF_ID2
|
|
{0x51EA,0x0149},//T2_NOISE_GAIN_THRESHOLD0
|
|
{0x51FC,0x044D},//T2_NOISE_GAIN_THRESHOLD1
|
|
{0x51EC,0x0700},//T2_NOISE_GAIN_THRESHOLD2
|
|
{0x51EE,0x0001},//T2_NOISE_FLOOR0
|
|
{0x51F0,0x0002},//T2_NOISE_FLOOR1
|
|
{0x51F2,0x0003},//T2_NOISE_FLOOR2
|
|
{0x51F4,0x0004},//T2_NOISE_FLOOR3
|
|
{0x5402,0x37C3},//T4_PIX_DEF_ID2
|
|
{0x5560,0x0149},//T4_NOISE_GAIN_THRESHOLD0
|
|
{0x556C,0x044D},//T4_NOISE_GAIN_THRESHOLD1
|
|
{0x5562,0x0700},//T4_NOISE_GAIN_THRESHOLD2
|
|
{0x5564,0x0001},//T4_NOISE_FLOOR0
|
|
{0x5566,0x0002},//T4_NOISE_FLOOR1
|
|
{0x5568,0x0003},//T4_NOISE_FLOOR2
|
|
{0x556A,0x0004},//T4_NOISE_FLOOR3
|
|
{0x31E0,0x0001},//PIX_DEF_ID
|
|
{0x5000,0x0080},//T1_PIX_DEF_ID
|
|
{0x5000,0x0180},//T1_PIX_DEF_ID
|
|
{0x5000,0x0180},//T1_PIX_DEF_ID
|
|
{0x5200,0x0080},//T2_PIX_DEF_ID
|
|
{0x5200,0x0180},//T2_PIX_DEF_ID
|
|
{0x5200,0x0180},//T2_PIX_DEF_ID
|
|
{0x5400,0x0080},//T4_PIX_DEF_ID
|
|
{0x5400,0x0180},//T4_PIX_DEF_ID
|
|
{0x5400,0x0180},//T4_PIX_DEF_ID
|
|
{0x5000,0x0180},//T1_PIX_DEF_ID
|
|
{0x5200,0x0180},//T2_PIX_DEF_ID
|
|
{0x5400,0x0180},//T4_PIX_DEF_ID
|
|
{0x50A2,0x3F2A},//BMT0
|
|
{0x50A4,0x875A},//BMT1
|
|
{0x50A6,0x030F},//SINGLEK_FACTOR0
|
|
{0x50A6,0x0F0F},//SINGLEK_FACTOR0
|
|
{0x50A8,0x030F},//SINGLEK_FACTOR1
|
|
{0x50A8,0x0F0F},//SINGLEK_FACTOR1
|
|
{0x50AA,0x030F},//SINGLEK_FACTOR2
|
|
{0x50AA,0x050F},//SINGLEK_FACTOR2
|
|
{0x50AC,0x0301},//CROSS_FACTOR0
|
|
{0x50AC,0x0101},//CROSS_FACTOR0
|
|
{0x50AE,0x0301},//CROSS_FACTOR1
|
|
{0x50AE,0x0101},//CROSS_FACTOR1
|
|
{0x50B0,0x0301},//CROSS_FACTOR2
|
|
{0x50B0,0x0101},//CROSS_FACTOR2
|
|
{0x50B2,0x03FF},//SINGLE_MAX_FACTOR
|
|
{0x50B4,0x030F},//COUPLE_FACTOR0
|
|
{0x50B4,0x0F0F},//COUPLE_FACTOR0
|
|
{0x50B6,0x030F},//COUPLE_FACTOR1
|
|
{0x50B6,0x0F0F},//COUPLE_FACTOR1
|
|
{0x50B8,0x030F},//COUPLE_FACTOR2
|
|
{0x50B8,0x050F},//COUPLE_FACTOR2
|
|
{0x3D2A,0x0FFF},//T1_END_DEC_TH
|
|
{0x3D34,0x9C40},//T2_STR_DEC_TH
|
|
{0x3D36,0xFFFF},//T2_END_DEC_TH
|
|
{0x3D02,0x5033},//MEC_CTRL2
|
|
{0x3086,0x1A28},//PARK_ROW_ADDR
|
|
{0x33E4,0x0040},//VERT_SHADING_CONTROL
|
|
{0x3C70,0x6222},//CALIB_ROWS
|
|
{0x3110,0x0011},//HDR_CONTROL0
|
|
{0x30B0,0x0820},//DIGITAL_TEST
|
|
{0x3280,0x0ED8},//T1_BARRIER_C0
|
|
{0x3282,0x0ED8},//T1_BARRIER_C1
|
|
{0x3284,0x0ED8},//T1_BARRIER_C2
|
|
{0x3286,0x0ED8},//T1_BARRIER_C3
|
|
{0x3288,0x0ED8},//T2_BARRIER_C0
|
|
{0x328A,0x0ED8},//T2_BARRIER_C1
|
|
{0x328C,0x0ED8},//T2_BARRIER_C2
|
|
{0x328E,0x0ED8},//T2_BARRIER_C3
|
|
{0x3290,0x0ED8},//T3_BARRIER_C0
|
|
{0x3292,0x0ED8},//T3_BARRIER_C1
|
|
{0x3294,0x0ED8},//T3_BARRIER_C2
|
|
{0x3296,0x0ED8},//T3_BARRIER_C3
|
|
{0x3100,0xC001},//DLO_CONTROL0
|
|
{0x3102,0xBED8},//DLO_CONTROL1
|
|
{0x3104,0xBED8},//DLO_CONTROL2
|
|
{0x3106,0xBED8},//DLO_CONTROL3
|
|
{0x3108,0x07D0},//DLO_CONTROL4
|
|
{0x3116,0x2001},//HDR_CONTROL3
|
|
{0x3124,0x006D},//HDR_MD_CONTROL0
|
|
{0x3126,0x003C},//HDR_MD_CONTROL1
|
|
{0x31AE,0x0204},//SERIAL_FORMAT
|
|
{0x31AC,0x0C0C},//DATA_FORMAT_BITS
|
|
{0x3082,0x0014},//OPERATION_MODE_CTRL
|
|
{0x30BA,0x0135},//DIGITAL_CTRL
|
|
{0x3238,0x0044},//EXPOSURE_RATIO
|
|
{0x3012,0x0900},//COARSE_INTEGRATION_TIME_
|
|
{0x3212,0x0090},//COARSE_INTEGRATION_TIME2
|
|
{0x300C,0x0CE2},//LINE_LENGTH_PCK_
|
|
{0x300A,0x09B8},//FRAME_LENGTH_LINES_
|
|
{0x5914,0x4012},//SENSOR_GAIN_TABLE_SEL
|
|
{REG_DELAY,100},
|
|
{0x5914,0x4002},//SENSOR_GAIN_TABLE_SEL
|
|
{0x5910,0x608A},//SENSOR_GAIN_REG1
|
|
{0x5910,0x7091},//SENSOR_GAIN_REG1
|
|
{0x5910,0x689C},//SENSOR_GAIN_REG1
|
|
{0x5910,0x8885},//SENSOR_GAIN_REG1
|
|
{0x5910,0x98AD},//SENSOR_GAIN_REG1
|
|
{0x5910,0xA8A9},//SENSOR_GAIN_REG1
|
|
{0x5910,0xC894},//SENSOR_GAIN_REG1
|
|
{0x5910,0xC8D1},//SENSOR_GAIN_REG1
|
|
{0x5910,0xD88A},//SENSOR_GAIN_REG1
|
|
{0x5910,0xD8C3},//SENSOR_GAIN_REG1
|
|
{0x5910,0xD915},//SENSOR_GAIN_REG1
|
|
{0x5910,0xD988},//SENSOR_GAIN_REG1
|
|
{0x5910,0xDA2A},//SENSOR_GAIN_REG1
|
|
{0x5910,0xDB0E},//SENSOR_GAIN_REG1
|
|
{0x5910,0xDC53},//SENSOR_GAIN_REG1
|
|
{0x5910,0x608A},//SENSOR_GAIN_REG1
|
|
{0x5910,0xC919},//SENSOR_GAIN_REG1
|
|
{0x5910,0xCA00},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0000},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0000},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0000},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0001},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0001},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0003},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0003},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0003},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0004},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0004},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0004},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0004},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0004},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0004},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0004},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0002},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0003},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0003},//SENSOR_GAIN_REG1
|
|
{0x5910,0x5A8B},//SENSOR_GAIN_REG1
|
|
{0x5910,0xFF04},//SENSOR_GAIN_REG1
|
|
{0x5910,0xF704},//SENSOR_GAIN_REG1
|
|
{0x5910,0xFF04},//SENSOR_GAIN_REG1
|
|
{0x5910,0xF704},//SENSOR_GAIN_REG1
|
|
{0x5910,0xF704},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0005},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0006},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0007},//SENSOR_GAIN_REG1
|
|
{0x5910,0x9A8B},//SENSOR_GAIN_REG1
|
|
{0x5910,0xFF04},//SENSOR_GAIN_REG1
|
|
{0x5910,0xF704},//SENSOR_GAIN_REG1
|
|
{0x5910,0xF704},//SENSOR_GAIN_REG1
|
|
{0x5910,0xF704},//SENSOR_GAIN_REG1
|
|
{0x5910,0xF704},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0015},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0016},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0017},//SENSOR_GAIN_REG1
|
|
{0x5910,0xDA8B},//SENSOR_GAIN_REG1
|
|
{0x5910,0xFF04},//SENSOR_GAIN_REG1
|
|
{0x5910,0xF704},//SENSOR_GAIN_REG1
|
|
{0x5910,0xF704},//SENSOR_GAIN_REG1
|
|
{0x5910,0xF704},//SENSOR_GAIN_REG1
|
|
{0x5910,0xF704},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0025},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0026},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0027},//SENSOR_GAIN_REG1
|
|
{0x5910,0x59B9},//SENSOR_GAIN_REG1
|
|
{0x5910,0x700F},//SENSOR_GAIN_REG1
|
|
{0x5910,0x7F0F},//SENSOR_GAIN_REG1
|
|
{0x5910,0x700F},//SENSOR_GAIN_REG1
|
|
{0x5910,0x7F0F},//SENSOR_GAIN_REG1
|
|
{0x5910,0x7F0F},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0035},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0036},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0037},//SENSOR_GAIN_REG1
|
|
{0x5910,0x99B9},//SENSOR_GAIN_REG1
|
|
{0x5910,0x700F},//SENSOR_GAIN_REG1
|
|
{0x5910,0x7F0F},//SENSOR_GAIN_REG1
|
|
{0x5910,0x700F},//SENSOR_GAIN_REG1
|
|
{0x5910,0x7F0F},//SENSOR_GAIN_REG1
|
|
{0x5910,0x7F0F},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0045},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0046},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0047},//SENSOR_GAIN_REG1
|
|
{0x5910,0xD9B9},//SENSOR_GAIN_REG1
|
|
{0x5910,0x700F},//SENSOR_GAIN_REG1
|
|
{0x5910,0x7F0F},//SENSOR_GAIN_REG1
|
|
{0x5910,0x700F},//SENSOR_GAIN_REG1
|
|
{0x5910,0x7F0F},//SENSOR_GAIN_REG1
|
|
{0x5910,0x7F0F},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0055},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0056},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0057},//SENSOR_GAIN_REG1
|
|
{0x5910,0x9A85},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0654},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0654},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0684},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0654},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0654},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0065},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0066},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0067},//SENSOR_GAIN_REG1
|
|
{0x5910,0x59BD},//SENSOR_GAIN_REG1
|
|
{0x5910,0x1000},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0C00},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0F00},//SENSOR_GAIN_REG1
|
|
{0x5910,0x1000},//SENSOR_GAIN_REG1
|
|
{0x5910,0x10F0},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0075},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0076},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0077},//SENSOR_GAIN_REG1
|
|
{0x5912,0x608A},//SENSOR_GAIN_REG2
|
|
{0x5912,0x7091},//SENSOR_GAIN_REG2
|
|
{0x5912,0x689C},//SENSOR_GAIN_REG2
|
|
{0x5912,0x8885},//SENSOR_GAIN_REG2
|
|
{0x5912,0x98AD},//SENSOR_GAIN_REG2
|
|
{0x5912,0xA8A9},//SENSOR_GAIN_REG2
|
|
{0x5912,0xC894},//SENSOR_GAIN_REG2
|
|
{0x5912,0xC8D1},//SENSOR_GAIN_REG2
|
|
{0x5912,0xC927},//SENSOR_GAIN_REG2
|
|
{0x5912,0xC9A0},//SENSOR_GAIN_REG2
|
|
{0x5912,0xCA4C},//SENSOR_GAIN_REG2
|
|
{0x5912,0xCB3F},//SENSOR_GAIN_REG2
|
|
{0x5912,0xCC97},//SENSOR_GAIN_REG2
|
|
{0x5912,0xCE7C},//SENSOR_GAIN_REG2
|
|
{0x5912,0xCFFF},//SENSOR_GAIN_REG2
|
|
{0x5912,0x608A},//SENSOR_GAIN_REG2
|
|
{0x5912,0xC8F0},//SENSOR_GAIN_REG2
|
|
{0x5912,0xCA00},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0000},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0000},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0000},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0001},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0001},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0003},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0003},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0003},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0004},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0004},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0004},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0004},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0004},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0004},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0004},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0002},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0003},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0003},//SENSOR_GAIN_REG2
|
|
{0x5912,0x5A8B},//SENSOR_GAIN_REG2
|
|
{0x5912,0xFF04},//SENSOR_GAIN_REG2
|
|
{0x5912,0xF704},//SENSOR_GAIN_REG2
|
|
{0x5912,0xFF04},//SENSOR_GAIN_REG2
|
|
{0x5912,0xF704},//SENSOR_GAIN_REG2
|
|
{0x5912,0xF704},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0005},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0006},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0007},//SENSOR_GAIN_REG2
|
|
{0x5912,0x9A8B},//SENSOR_GAIN_REG2
|
|
{0x5912,0xFF04},//SENSOR_GAIN_REG2
|
|
{0x5912,0xF704},//SENSOR_GAIN_REG2
|
|
{0x5912,0xF704},//SENSOR_GAIN_REG2
|
|
{0x5912,0xF704},//SENSOR_GAIN_REG2
|
|
{0x5912,0xF704},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0015},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0016},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0017},//SENSOR_GAIN_REG2
|
|
{0x5912,0xDA8B},//SENSOR_GAIN_REG2
|
|
{0x5912,0xFF04},//SENSOR_GAIN_REG2
|
|
{0x5912,0xF704},//SENSOR_GAIN_REG2
|
|
{0x5912,0xF704},//SENSOR_GAIN_REG2
|
|
{0x5912,0xF704},//SENSOR_GAIN_REG2
|
|
{0x5912,0xF704},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0025},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0026},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0027},//SENSOR_GAIN_REG2
|
|
{0x5912,0x59B9},//SENSOR_GAIN_REG2
|
|
{0x5912,0x700F},//SENSOR_GAIN_REG2
|
|
{0x5912,0x7F0F},//SENSOR_GAIN_REG2
|
|
{0x5912,0x700F},//SENSOR_GAIN_REG2
|
|
{0x5912,0x7F0F},//SENSOR_GAIN_REG2
|
|
{0x5912,0x7F0F},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0035},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0036},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0037},//SENSOR_GAIN_REG2
|
|
{0x5912,0x99B9},//SENSOR_GAIN_REG2
|
|
{0x5912,0x700F},//SENSOR_GAIN_REG2
|
|
{0x5912,0x7F0F},//SENSOR_GAIN_REG2
|
|
{0x5912,0x700F},//SENSOR_GAIN_REG2
|
|
{0x5912,0x7F0F},//SENSOR_GAIN_REG2
|
|
{0x5912,0x7F0F},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0045},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0046},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0047},//SENSOR_GAIN_REG2
|
|
{0x5912,0xD9B9},//SENSOR_GAIN_REG2
|
|
{0x5912,0x700F},//SENSOR_GAIN_REG2
|
|
{0x5912,0x7F0F},//SENSOR_GAIN_REG2
|
|
{0x5912,0x700F},//SENSOR_GAIN_REG2
|
|
{0x5912,0x7F0F},//SENSOR_GAIN_REG2
|
|
{0x5912,0x7F0F},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0055},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0056},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0057},//SENSOR_GAIN_REG2
|
|
{0x5912,0x9A85},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0654},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0654},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0684},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0654},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0654},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0065},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0066},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0067},//SENSOR_GAIN_REG2
|
|
{0x5912,0x59BD},//SENSOR_GAIN_REG2
|
|
{0x5912,0x1000},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0C00},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0F00},//SENSOR_GAIN_REG2
|
|
{0x5912,0x1000},//SENSOR_GAIN_REG2
|
|
{0x5912,0x10F0},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0075},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0076},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0077},//SENSOR_GAIN_REG2
|
|
{0x5914,0x4006},//SENSOR_GAIN_TABLE_SEL
|
|
{0x5900,0x0020},//SENSOR_GAIN
|
|
{0x5902,0x0000},//SENSOR_GAIN_T2
|
|
{0x3110,0x0001},//HDR_CONTROL0
|
|
|
|
{REG_NULL, 0x00},
|
|
};
|
|
static const struct regval ar0822_hdr12bit_3840x2160_30fps_regs[] = {
|
|
{REG_DELAY, 2000},
|
|
{0x3030,0x0092},//PLL_MULTIPLIER
|
|
{0x302E,0x0002},//PRE_PLL_CLK_DIV
|
|
{0x302C,0x0002},//VT_SYS_CLK_DIV
|
|
{0x302A,0x0006},//VT_PIX_CLK_DIV
|
|
{0x3038,0x0002},//OP_SYS_CLK_DIV
|
|
{0x3036,0x0006},//OP_WORD_CLK_DIV
|
|
{0x31B0,0x00BF},//FRAME_PREAMBLE
|
|
{0x31B2,0x007D},//LINE_PREAMBLE
|
|
{0x31B4,0x834E},//MIPI_TIMING_0
|
|
{0x31B6,0x8491},//MIPI_TIMING_1
|
|
{0x31B8,0xD0CF},//MIPI_TIMING_2
|
|
{0x31BA,0x0515},//MIPI_TIMING_3
|
|
{0x31BC,0x1911},//MIPI_TIMING_4
|
|
{0x3342,0x122C},//MIPI_F1_PDT_EDT
|
|
{0x2510,0x0720},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0x2122},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0x26FF},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x0F8C},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20E0},//SEQ_DATA_PORT
|
|
{0x2510,0x8055},//SEQ_DATA_PORT
|
|
{0x2510,0xA0E1},//SEQ_DATA_PORT
|
|
{0x2510,0x3041},//SEQ_DATA_PORT
|
|
{0x2510,0x2000},//SEQ_DATA_PORT
|
|
{0x2510,0x3088},//SEQ_DATA_PORT
|
|
{0x2510,0x3282},//SEQ_DATA_PORT
|
|
{0x2510,0xA681},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FE},//SEQ_DATA_PORT
|
|
{0x2510,0x9070},//SEQ_DATA_PORT
|
|
{0x2510,0x891D},//SEQ_DATA_PORT
|
|
{0x2510,0x867F},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FC},//SEQ_DATA_PORT
|
|
{0x2510,0x893F},//SEQ_DATA_PORT
|
|
{0x2510,0x0F92},//SEQ_DATA_PORT
|
|
{0x2510,0x20E0},//SEQ_DATA_PORT
|
|
{0x2510,0x0F8F},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20E0},//SEQ_DATA_PORT
|
|
{0x2510,0x9770},//SEQ_DATA_PORT
|
|
{0x2510,0x20FC},//SEQ_DATA_PORT
|
|
{0x2510,0x8054},//SEQ_DATA_PORT
|
|
{0x2510,0x896C},//SEQ_DATA_PORT
|
|
{0x2510,0x200A},//SEQ_DATA_PORT
|
|
{0x2510,0x9030},//SEQ_DATA_PORT
|
|
{0x2510,0x200A},//SEQ_DATA_PORT
|
|
{0x2510,0x8040},//SEQ_DATA_PORT
|
|
{0x2510,0x8948},//SEQ_DATA_PORT
|
|
{0x2510,0x200A},//SEQ_DATA_PORT
|
|
{0x2510,0x1597},//SEQ_DATA_PORT
|
|
{0x2510,0x8808},//SEQ_DATA_PORT
|
|
{0x2510,0x200A},//SEQ_DATA_PORT
|
|
{0x2510,0x1F96},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20E0},//SEQ_DATA_PORT
|
|
{0x2510,0xA0C0},//SEQ_DATA_PORT
|
|
{0x2510,0x200A},//SEQ_DATA_PORT
|
|
{0x2510,0x3044},//SEQ_DATA_PORT
|
|
{0x2510,0x3088},//SEQ_DATA_PORT
|
|
{0x2510,0x3282},//SEQ_DATA_PORT
|
|
{0x2510,0x2004},//SEQ_DATA_PORT
|
|
{0x2510,0x1FAA},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20E0},//SEQ_DATA_PORT
|
|
{0x2510,0x7FFF},//SEQ_DATA_PORT
|
|
{0x2510,0x7FFF},//SEQ_DATA_PORT
|
|
{0x2510,0x7FFF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x7FFF},//SEQ_DATA_PORT
|
|
{0x2510,0x7FFF},//SEQ_DATA_PORT
|
|
{0x2510,0x7FFF},//SEQ_DATA_PORT
|
|
{0x2510,0x3108},//SEQ_DATA_PORT
|
|
{0x2510,0x2400},//SEQ_DATA_PORT
|
|
{0x2510,0x3244},//SEQ_DATA_PORT
|
|
{0x2510,0x7FFF},//SEQ_DATA_PORT
|
|
{0x2510,0x3108},//SEQ_DATA_PORT
|
|
{0x2510,0x2400},//SEQ_DATA_PORT
|
|
{0x2510,0x2702},//SEQ_DATA_PORT
|
|
{0x2510,0x3242},//SEQ_DATA_PORT
|
|
{0x2510,0x3108},//SEQ_DATA_PORT
|
|
{0x2510,0x2420},//SEQ_DATA_PORT
|
|
{0x2510,0x2703},//SEQ_DATA_PORT
|
|
{0x2510,0x3242},//SEQ_DATA_PORT
|
|
{0x2510,0x3108},//SEQ_DATA_PORT
|
|
{0x2510,0x2420},//SEQ_DATA_PORT
|
|
{0x2510,0x2704},//SEQ_DATA_PORT
|
|
{0x2510,0x3244},//SEQ_DATA_PORT
|
|
{0x2510,0x7FFF},//SEQ_DATA_PORT
|
|
{0x2510,0x7FFF},//SEQ_DATA_PORT
|
|
{0x2510,0x7FFF},//SEQ_DATA_PORT
|
|
{0x2510,0x7FFF},//SEQ_DATA_PORT
|
|
{0x2510,0x8801},//SEQ_DATA_PORT
|
|
{0x2510,0x010F},//SEQ_DATA_PORT
|
|
{0x2510,0x8855},//SEQ_DATA_PORT
|
|
{0x2510,0x3101},//SEQ_DATA_PORT
|
|
{0x2510,0x3041},//SEQ_DATA_PORT
|
|
{0x2510,0x2000},//SEQ_DATA_PORT
|
|
{0x2510,0x3102},//SEQ_DATA_PORT
|
|
{0x2510,0x3041},//SEQ_DATA_PORT
|
|
{0x2510,0x2000},//SEQ_DATA_PORT
|
|
{0x2510,0x3181},//SEQ_DATA_PORT
|
|
{0x2510,0x3041},//SEQ_DATA_PORT
|
|
{0x2510,0x2000},//SEQ_DATA_PORT
|
|
{0x2510,0x3188},//SEQ_DATA_PORT
|
|
{0x2510,0x3041},//SEQ_DATA_PORT
|
|
{0x2510,0x2000},//SEQ_DATA_PORT
|
|
{0x2510,0x3282},//SEQ_DATA_PORT
|
|
{0x2510,0x3104},//SEQ_DATA_PORT
|
|
{0x2510,0x2000},//SEQ_DATA_PORT
|
|
{0x2510,0xB0E4},//SEQ_DATA_PORT
|
|
{0x2510,0xAD92},//SEQ_DATA_PORT
|
|
{0x2510,0xBC0C},//SEQ_DATA_PORT
|
|
{0x2510,0x1028},//SEQ_DATA_PORT
|
|
{0x2510,0x0022},//SEQ_DATA_PORT
|
|
{0x2510,0xC020},//SEQ_DATA_PORT
|
|
{0x2510,0x003E},//SEQ_DATA_PORT
|
|
{0x2510,0x0045},//SEQ_DATA_PORT
|
|
{0x2510,0x00B0},//SEQ_DATA_PORT
|
|
{0x2510,0x0028},//SEQ_DATA_PORT
|
|
{0x2510,0x30C1},//SEQ_DATA_PORT
|
|
{0x2510,0x8015},//SEQ_DATA_PORT
|
|
{0x2510,0xA038},//SEQ_DATA_PORT
|
|
{0x2510,0x100F},//SEQ_DATA_PORT
|
|
{0x2510,0x0507},//SEQ_DATA_PORT
|
|
{0x2510,0xA220},//SEQ_DATA_PORT
|
|
{0x2510,0x0010},//SEQ_DATA_PORT
|
|
{0x2510,0x10C2},//SEQ_DATA_PORT
|
|
{0x2510,0xB760},//SEQ_DATA_PORT
|
|
{0x2510,0x0033},//SEQ_DATA_PORT
|
|
{0x2510,0x1082},//SEQ_DATA_PORT
|
|
{0x2510,0x100B},//SEQ_DATA_PORT
|
|
{0x2510,0x1029},//SEQ_DATA_PORT
|
|
{0x2510,0xA85A},//SEQ_DATA_PORT
|
|
{0x2510,0x998D},//SEQ_DATA_PORT
|
|
{0x2510,0xC810},//SEQ_DATA_PORT
|
|
{0x2510,0x2004},//SEQ_DATA_PORT
|
|
{0x2510,0x0CCE},//SEQ_DATA_PORT
|
|
{0x2510,0x113B},//SEQ_DATA_PORT
|
|
{0x2510,0x1055},//SEQ_DATA_PORT
|
|
{0x2510,0x101D},//SEQ_DATA_PORT
|
|
{0x2510,0xC000},//SEQ_DATA_PORT
|
|
{0x2510,0x052F},//SEQ_DATA_PORT
|
|
{0x2510,0x162F},//SEQ_DATA_PORT
|
|
{0x2510,0x9000},//SEQ_DATA_PORT
|
|
{0x2510,0x2034},//SEQ_DATA_PORT
|
|
{0x2510,0x0015},//SEQ_DATA_PORT
|
|
{0x2510,0x04CB},//SEQ_DATA_PORT
|
|
{0x2510,0x1022},//SEQ_DATA_PORT
|
|
{0x2510,0x1031},//SEQ_DATA_PORT
|
|
{0x2510,0x002D},//SEQ_DATA_PORT
|
|
{0x2510,0x1015},//SEQ_DATA_PORT
|
|
{0x2510,0x80B9},//SEQ_DATA_PORT
|
|
{0x2510,0xA301},//SEQ_DATA_PORT
|
|
{0x2510,0x008E},//SEQ_DATA_PORT
|
|
{0x2510,0x124B},//SEQ_DATA_PORT
|
|
{0x2510,0x01B5},//SEQ_DATA_PORT
|
|
{0x2510,0x0B92},//SEQ_DATA_PORT
|
|
{0x2510,0xA400},//SEQ_DATA_PORT
|
|
{0x2510,0x8091},//SEQ_DATA_PORT
|
|
{0x2510,0x0028},//SEQ_DATA_PORT
|
|
{0x2510,0x3002},//SEQ_DATA_PORT
|
|
{0x2510,0x2004},//SEQ_DATA_PORT
|
|
{0x2510,0x1012},//SEQ_DATA_PORT
|
|
{0x2510,0x100E},//SEQ_DATA_PORT
|
|
{0x2510,0x10A8},//SEQ_DATA_PORT
|
|
{0x2510,0x00A1},//SEQ_DATA_PORT
|
|
{0x2510,0x132D},//SEQ_DATA_PORT
|
|
{0x2510,0x09AF},//SEQ_DATA_PORT
|
|
{0x2510,0x03D9},//SEQ_DATA_PORT
|
|
{0x2510,0x1259},//SEQ_DATA_PORT
|
|
{0x2510,0x11AF},//SEQ_DATA_PORT
|
|
{0x2510,0x18B5},//SEQ_DATA_PORT
|
|
{0x2510,0x0395},//SEQ_DATA_PORT
|
|
{0x2510,0x05CB},//SEQ_DATA_PORT
|
|
{0x2510,0x1021},//SEQ_DATA_PORT
|
|
{0x2510,0x1015},//SEQ_DATA_PORT
|
|
{0x2510,0x1030},//SEQ_DATA_PORT
|
|
{0x2510,0x004F},//SEQ_DATA_PORT
|
|
{0x2510,0x001C},//SEQ_DATA_PORT
|
|
{0x2510,0xB146},//SEQ_DATA_PORT
|
|
{0x2510,0xC090},//SEQ_DATA_PORT
|
|
{0x2510,0x0020},//SEQ_DATA_PORT
|
|
{0x2510,0x103C},//SEQ_DATA_PORT
|
|
{0x2510,0xA882},//SEQ_DATA_PORT
|
|
{0x2510,0x8055},//SEQ_DATA_PORT
|
|
{0x2510,0x00A9},//SEQ_DATA_PORT
|
|
{0x2510,0x8801},//SEQ_DATA_PORT
|
|
{0x2510,0xB700},//SEQ_DATA_PORT
|
|
{0x2510,0x0001},//SEQ_DATA_PORT
|
|
{0x2510,0x00A2},//SEQ_DATA_PORT
|
|
{0x2510,0x11AE},//SEQ_DATA_PORT
|
|
{0x2510,0x000A},//SEQ_DATA_PORT
|
|
{0x2510,0x98BB},//SEQ_DATA_PORT
|
|
{0x2510,0x2047},//SEQ_DATA_PORT
|
|
{0x2510,0x0036},//SEQ_DATA_PORT
|
|
{0x2510,0x1001},//SEQ_DATA_PORT
|
|
{0x2510,0x9FBE},//SEQ_DATA_PORT
|
|
{0x2510,0x108A},//SEQ_DATA_PORT
|
|
{0x2510,0x1022},//SEQ_DATA_PORT
|
|
{0x2510,0x0039},//SEQ_DATA_PORT
|
|
{0x2510,0x01C0},//SEQ_DATA_PORT
|
|
{0x2510,0x109F},//SEQ_DATA_PORT
|
|
{0x2510,0x1023},//SEQ_DATA_PORT
|
|
{0x2510,0x052E},//SEQ_DATA_PORT
|
|
{0x2510,0x002A},//SEQ_DATA_PORT
|
|
{0x2510,0x3081},//SEQ_DATA_PORT
|
|
{0x2510,0x2001},//SEQ_DATA_PORT
|
|
{0x2510,0x3044},//SEQ_DATA_PORT
|
|
{0x2510,0x2000},//SEQ_DATA_PORT
|
|
{0x2510,0x112A},//SEQ_DATA_PORT
|
|
{0x2510,0x101D},//SEQ_DATA_PORT
|
|
{0x2510,0x2020},//SEQ_DATA_PORT
|
|
{0x2510,0x02B8},//SEQ_DATA_PORT
|
|
{0x2510,0x10B8},//SEQ_DATA_PORT
|
|
{0x2510,0x1136},//SEQ_DATA_PORT
|
|
{0x2510,0x9B6B},//SEQ_DATA_PORT
|
|
{0x2510,0x1039},//SEQ_DATA_PORT
|
|
{0x2510,0x1040},//SEQ_DATA_PORT
|
|
{0x2510,0xAB80},//SEQ_DATA_PORT
|
|
{0x2510,0x03C4},//SEQ_DATA_PORT
|
|
{0x2510,0x10C4},//SEQ_DATA_PORT
|
|
{0x2510,0x1023},//SEQ_DATA_PORT
|
|
{0x2510,0x1245},//SEQ_DATA_PORT
|
|
{0x2510,0x009F},//SEQ_DATA_PORT
|
|
{0x2510,0x002B},//SEQ_DATA_PORT
|
|
{0x2510,0x30D0},//SEQ_DATA_PORT
|
|
{0x2510,0x3141},//SEQ_DATA_PORT
|
|
{0x2510,0x3041},//SEQ_DATA_PORT
|
|
{0x2510,0x2000},//SEQ_DATA_PORT
|
|
{0x2510,0x3142},//SEQ_DATA_PORT
|
|
{0x2510,0x3041},//SEQ_DATA_PORT
|
|
{0x2510,0x2000},//SEQ_DATA_PORT
|
|
{0x2510,0x3110},//SEQ_DATA_PORT
|
|
{0x2510,0x3041},//SEQ_DATA_PORT
|
|
{0x2510,0x2000},//SEQ_DATA_PORT
|
|
{0x2510,0x3120},//SEQ_DATA_PORT
|
|
{0x2510,0x3041},//SEQ_DATA_PORT
|
|
{0x2510,0x2000},//SEQ_DATA_PORT
|
|
{0x2510,0x3144},//SEQ_DATA_PORT
|
|
{0x2510,0x3041},//SEQ_DATA_PORT
|
|
{0x2510,0x2000},//SEQ_DATA_PORT
|
|
{0x2510,0x3148},//SEQ_DATA_PORT
|
|
{0x2510,0x3041},//SEQ_DATA_PORT
|
|
{0x2510,0x2000},//SEQ_DATA_PORT
|
|
{0x2510,0x3182},//SEQ_DATA_PORT
|
|
{0x2510,0x3041},//SEQ_DATA_PORT
|
|
{0x2510,0x2000},//SEQ_DATA_PORT
|
|
{0x2510,0x3184},//SEQ_DATA_PORT
|
|
{0x2510,0x2000},//SEQ_DATA_PORT
|
|
{0x2510,0x3190},//SEQ_DATA_PORT
|
|
{0x2510,0x3041},//SEQ_DATA_PORT
|
|
{0x2510,0x2000},//SEQ_DATA_PORT
|
|
{0x2510,0x31A0},//SEQ_DATA_PORT
|
|
{0x2510,0x3088},//SEQ_DATA_PORT
|
|
{0x2510,0x2201},//SEQ_DATA_PORT
|
|
{0x2510,0x807D},//SEQ_DATA_PORT
|
|
{0x2510,0x2206},//SEQ_DATA_PORT
|
|
{0x2510,0x8815},//SEQ_DATA_PORT
|
|
{0x2510,0x8877},//SEQ_DATA_PORT
|
|
{0x2510,0x0092},//SEQ_DATA_PORT
|
|
{0x2510,0x220E},//SEQ_DATA_PORT
|
|
{0x2510,0x2211},//SEQ_DATA_PORT
|
|
{0x2510,0x8055},//SEQ_DATA_PORT
|
|
{0x2510,0x3001},//SEQ_DATA_PORT
|
|
{0x2510,0x2004},//SEQ_DATA_PORT
|
|
{0x2510,0x8C61},//SEQ_DATA_PORT
|
|
{0x2510,0x8801},//SEQ_DATA_PORT
|
|
{0x2510,0x1012},//SEQ_DATA_PORT
|
|
{0x2510,0x1D1F},//SEQ_DATA_PORT
|
|
{0x2510,0x0D9F},//SEQ_DATA_PORT
|
|
{0x2510,0x101F},//SEQ_DATA_PORT
|
|
{0x2510,0x0036},//SEQ_DATA_PORT
|
|
{0x2510,0x0040},//SEQ_DATA_PORT
|
|
{0x2510,0x0023},//SEQ_DATA_PORT
|
|
{0x2510,0x996E},//SEQ_DATA_PORT
|
|
{0x2510,0x0257},//SEQ_DATA_PORT
|
|
{0x2510,0x1035},//SEQ_DATA_PORT
|
|
{0x2510,0x9926},//SEQ_DATA_PORT
|
|
{0x2510,0x0039},//SEQ_DATA_PORT
|
|
{0x2510,0x00AE},//SEQ_DATA_PORT
|
|
{0x2510,0x11A3},//SEQ_DATA_PORT
|
|
{0x2510,0x0048},//SEQ_DATA_PORT
|
|
{0x2510,0xC878},//SEQ_DATA_PORT
|
|
{0x2510,0x200A},//SEQ_DATA_PORT
|
|
{0x2510,0x1548},//SEQ_DATA_PORT
|
|
{0x2510,0x0C49},//SEQ_DATA_PORT
|
|
{0x2510,0x1149},//SEQ_DATA_PORT
|
|
{0x2510,0x002A},//SEQ_DATA_PORT
|
|
{0x2510,0x1057},//SEQ_DATA_PORT
|
|
{0x2510,0x3281},//SEQ_DATA_PORT
|
|
{0x2510,0x2000},//SEQ_DATA_PORT
|
|
{0x2510,0x3044},//SEQ_DATA_PORT
|
|
{0x2510,0x2001},//SEQ_DATA_PORT
|
|
{0x2510,0xA020},//SEQ_DATA_PORT
|
|
{0x2510,0x000C},//SEQ_DATA_PORT
|
|
{0x2510,0x9825},//SEQ_DATA_PORT
|
|
{0x2510,0x1040},//SEQ_DATA_PORT
|
|
{0x2510,0x1054},//SEQ_DATA_PORT
|
|
{0x2510,0xB06D},//SEQ_DATA_PORT
|
|
{0x2510,0x0035},//SEQ_DATA_PORT
|
|
{0x2510,0x004D},//SEQ_DATA_PORT
|
|
{0x2510,0x1020},//SEQ_DATA_PORT
|
|
{0x2510,0xB064},//SEQ_DATA_PORT
|
|
{0x2510,0x99C5},//SEQ_DATA_PORT
|
|
{0x2510,0x0047},//SEQ_DATA_PORT
|
|
{0x2510,0xB920},//SEQ_DATA_PORT
|
|
{0x2510,0x1447},//SEQ_DATA_PORT
|
|
{0x2510,0x7FFF},//SEQ_DATA_PORT
|
|
{0x2510,0x7FFF},//SEQ_DATA_PORT
|
|
{0x2510,0x7FFF},//SEQ_DATA_PORT
|
|
{0x2510,0x7FFF},//SEQ_DATA_PORT
|
|
{0x2510,0x7FFF},//SEQ_DATA_PORT
|
|
{0x2510,0x7FFF},//SEQ_DATA_PORT
|
|
{0x2510,0x7FFF},//SEQ_DATA_PORT
|
|
{0x31F8,0x0008},//MIPI_CONFIG_2
|
|
{0x3C70,0x6828},//CALIB_ROWS
|
|
{0x3092,0x0826},//ROW_NOISE_CONTROL
|
|
{0x3428,0x0209},//SEQUENCER_CONTROL
|
|
{0x3516,0xFF04},//DAC_LD_22_23
|
|
{0x3526,0x6480},//DAC_LD_38_39
|
|
{0x3504,0x8AAA},//DAC_LD_4_5
|
|
{0x353C,0x220C},//DAC_LD_60_61
|
|
{0x3536,0x4C6E},//DAC_LD_54_55
|
|
{0x3D2A,0x0FFF},//T1_END_DEC_TH
|
|
{0x3364,0x00EC},//DCG_TRIM
|
|
{0x3512,0x8888},//DAC_LD_18_19
|
|
{0x3514,0x888F},//DAC_LD_20_21
|
|
{0x3520,0xFBF0},//DAC_LD_32_33
|
|
{0x3524,0xB2A1},//DAC_LD_36_37
|
|
{0x3528,0xCC84},//DAC_LD_40_41
|
|
{0x3532,0x4C8E},//DAC_LD_50_51
|
|
{0x3534,0x4E64},//DAC_LD_52_53
|
|
{0x351E,0x5856},//DAC_LD_30_31
|
|
{0x353E,0x98F2},//DAC_LD_62_63
|
|
{0x352E,0x6A8A},//DAC_LD_46_47
|
|
{0x3370,0x0211},//DBLC_CONTROL
|
|
{0x3372,0x700F},//DBLC_FS0_CONTROL
|
|
{0x3540,0x3597},//DAC_LD_64_65
|
|
{0x58E2,0x0BE3},//COL_COUNT_VALUES1
|
|
{0x58E4,0x18B4},//COL_COUNT_VALUES2
|
|
{0x3522,0x7C97},//DAC_LD_34_35
|
|
{0x30BA,0x0024},//DIGITAL_CTRL
|
|
{0x31D4,0x0042},//CLK_MEM_GATING_CTRL
|
|
{0x352A,0x6F8F},//DAC_LD_42_43
|
|
{0x3530,0x4A08},//DAC_LD_48_49
|
|
{0x351A,0x5FFF},//DAC_LD_26_27
|
|
{0x350E,0x39D9},//DAC_LD_14_15
|
|
{0x3510,0x9988},//DAC_LD_16_17
|
|
{0x3380,0x1FFF},//DBLC_OFFSET1
|
|
{0x337A,0x1000},//DBLC_SCALE1
|
|
{0x3092,0x0800},//ROW_NOISE_CONTROL
|
|
{0x350A,0x0654},//DAC_LD_10_11
|
|
{0x3364,0x00E0},//DCG_TRIM
|
|
{0x591E,0x61AE},//ANALOG_GAIN_WR_DATA
|
|
{0x591E,0x722C},//ANALOG_GAIN_WR_DATA
|
|
{0x591E,0x82B8},//ANALOG_GAIN_WR_DATA
|
|
{0x591E,0x92F6},//ANALOG_GAIN_WR_DATA
|
|
{0x591E,0xA447},//ANALOG_GAIN_WR_DATA
|
|
{0x591E,0xB66D},//ANALOG_GAIN_WR_DATA
|
|
{0x591E,0xC6EA},//ANALOG_GAIN_WR_DATA
|
|
{0x591E,0xDECD},//ANALOG_GAIN_WR_DATA
|
|
{0x3532,0x4C8A},//DAC_LD_50_51
|
|
{0x3534,0x4E60},//DAC_LD_52_53
|
|
{0x353E,0x90F2},//DAC_LD_62_63
|
|
{0x351A,0x4FFF},//DAC_LD_26_27
|
|
{0x591C,0x00D7},//DGR_AMP_GAIN
|
|
{0x5002,0x37C3},//T1_PIX_DEF_ID2
|
|
{0x51CC,0x0149},//T1_NOISE_GAIN_THRESHOLD0
|
|
{0x51D8,0x044D},//T1_NOISE_GAIN_THRESHOLD1
|
|
{0x51CE,0x0700},//T1_NOISE_GAIN_THRESHOLD2
|
|
{0x51D0,0x0001},//T1_NOISE_FLOOR0
|
|
{0x51D2,0x0002},//T1_NOISE_FLOOR1
|
|
{0x51D4,0x0003},//T1_NOISE_FLOOR2
|
|
{0x51D6,0x0004},//T1_NOISE_FLOOR3
|
|
{0x5202,0x37C3},//T2_PIX_DEF_ID2
|
|
{0x51EA,0x0149},//T2_NOISE_GAIN_THRESHOLD0
|
|
{0x51FC,0x044D},//T2_NOISE_GAIN_THRESHOLD1
|
|
{0x51EC,0x0700},//T2_NOISE_GAIN_THRESHOLD2
|
|
{0x51EE,0x0001},//T2_NOISE_FLOOR0
|
|
{0x51F0,0x0002},//T2_NOISE_FLOOR1
|
|
{0x51F2,0x0003},//T2_NOISE_FLOOR2
|
|
{0x51F4,0x0004},//T2_NOISE_FLOOR3
|
|
{0x5402,0x37C3},//T4_PIX_DEF_ID2
|
|
{0x5560,0x0149},//T4_NOISE_GAIN_THRESHOLD0
|
|
{0x556C,0x044D},//T4_NOISE_GAIN_THRESHOLD1
|
|
{0x5562,0x0700},//T4_NOISE_GAIN_THRESHOLD2
|
|
{0x5564,0x0001},//T4_NOISE_FLOOR0
|
|
{0x5566,0x0002},//T4_NOISE_FLOOR1
|
|
{0x5568,0x0003},//T4_NOISE_FLOOR2
|
|
{0x556A,0x0004},//T4_NOISE_FLOOR3
|
|
{0x31E0,0x0001},//PIX_DEF_ID
|
|
{0x5000,0x0080},//T1_PIX_DEF_ID
|
|
{0x5000,0x0180},//T1_PIX_DEF_ID
|
|
{0x5000,0x0180},//T1_PIX_DEF_ID
|
|
{0x5200,0x0080},//T2_PIX_DEF_ID
|
|
{0x5200,0x0180},//T2_PIX_DEF_ID
|
|
{0x5200,0x0180},//T2_PIX_DEF_ID
|
|
{0x5400,0x0080},//T4_PIX_DEF_ID
|
|
{0x5400,0x0180},//T4_PIX_DEF_ID
|
|
{0x5400,0x0180},//T4_PIX_DEF_ID
|
|
{0x5000,0x0180},//T1_PIX_DEF_ID
|
|
{0x5200,0x0180},//T2_PIX_DEF_ID
|
|
{0x5400,0x0180},//T4_PIX_DEF_ID
|
|
{0x50A2,0x3F2A},//BMT0
|
|
{0x50A4,0x875A},//BMT1
|
|
{0x50A6,0x030F},//SINGLEK_FACTOR0
|
|
{0x50A6,0x0F0F},//SINGLEK_FACTOR0
|
|
{0x50A8,0x030F},//SINGLEK_FACTOR1
|
|
{0x50A8,0x0F0F},//SINGLEK_FACTOR1
|
|
{0x50AA,0x030F},//SINGLEK_FACTOR2
|
|
{0x50AA,0x050F},//SINGLEK_FACTOR2
|
|
{0x50AC,0x0301},//CROSS_FACTOR0
|
|
{0x50AC,0x0101},//CROSS_FACTOR0
|
|
{0x50AE,0x0301},//CROSS_FACTOR1
|
|
{0x50AE,0x0101},//CROSS_FACTOR1
|
|
{0x50B0,0x0301},//CROSS_FACTOR2
|
|
{0x50B0,0x0101},//CROSS_FACTOR2
|
|
{0x50B2,0x03FF},//SINGLE_MAX_FACTOR
|
|
{0x50B4,0x030F},//COUPLE_FACTOR0
|
|
{0x50B4,0x0F0F},//COUPLE_FACTOR0
|
|
{0x50B6,0x030F},//COUPLE_FACTOR1
|
|
{0x50B6,0x0F0F},//COUPLE_FACTOR1
|
|
{0x50B8,0x030F},//COUPLE_FACTOR2
|
|
{0x50B8,0x050F},//COUPLE_FACTOR2
|
|
{0x3D2A,0x0FFF},//T1_END_DEC_TH
|
|
{0x3D34,0x9C40},//T2_STR_DEC_TH
|
|
{0x3D36,0xFFFF},//T2_END_DEC_TH
|
|
{0x3D02,0x5033},//MEC_CTRL2
|
|
{0x3D00,0x600F},//MEC_CTRL1
|
|
{0x3086,0x1A28},//PARK_ROW_ADDR
|
|
{0x33E4,0x0040},//VERT_SHADING_CONTROL
|
|
{0x3C70,0x6222},//CALIB_ROWS
|
|
{0x3110,0x0011},//HDR_CONTROL0
|
|
{0x30B0,0x0820},//DIGITAL_TEST
|
|
{0x3280,0x0ED8},//T1_BARRIER_C0
|
|
{0x3282,0x0ED8},//T1_BARRIER_C1
|
|
{0x3284,0x0ED8},//T1_BARRIER_C2
|
|
{0x3286,0x0ED8},//T1_BARRIER_C3
|
|
{0x3288,0x0ED8},//T2_BARRIER_C0
|
|
{0x328A,0x0ED8},//T2_BARRIER_C1
|
|
{0x328C,0x0ED8},//T2_BARRIER_C2
|
|
{0x328E,0x0ED8},//T2_BARRIER_C3
|
|
{0x3290,0x0ED8},//T3_BARRIER_C0
|
|
{0x3292,0x0ED8},//T3_BARRIER_C1
|
|
{0x3294,0x0ED8},//T3_BARRIER_C2
|
|
{0x3296,0x0ED8},//T3_BARRIER_C3
|
|
{0x3100,0xC001},//DLO_CONTROL0
|
|
{0x3102,0xBED8},//DLO_CONTROL1
|
|
{0x3104,0xBED8},//DLO_CONTROL2
|
|
{0x3106,0xBED8},//DLO_CONTROL3
|
|
{0x3108,0x07D0},//DLO_CONTROL4
|
|
{0x3116,0x4001},//HDR_CONTROL3
|
|
{0x3124,0x006D},//HDR_MD_CONTROL0
|
|
{0x3126,0x003C},//HDR_MD_CONTROL1
|
|
{0x31AE,0x0204},//SERIAL_FORMAT
|
|
{0x31AC,0x0C0C},//DATA_FORMAT_BITS
|
|
{0x3082,0x0014},//OPERATION_MODE_CTRL
|
|
{0x30BA,0x0135},//DIGITAL_CTRL
|
|
{0x3238,0x0044},//EXPOSURE_RATIO
|
|
{0x3012,0x0700},//COARSE_INTEGRATION_TIME_
|
|
{0x3212,0x0070},//COARSE_INTEGRATION_TIME2
|
|
{0x300C,0x10CC},//LINE_LENGTH_PCK_
|
|
{0x300A,0x09F3},//FRAME_LENGTH_LINES_
|
|
{0x5914,0x4002},//SENSOR_GAIN_TABLE_SEL
|
|
{0x5910,0x608A},//SENSOR_GAIN_REG1
|
|
{0x5910,0x7091},//SENSOR_GAIN_REG1
|
|
{0x5910,0x689C},//SENSOR_GAIN_REG1
|
|
{0x5910,0x8885},//SENSOR_GAIN_REG1
|
|
{0x5910,0x98AD},//SENSOR_GAIN_REG1
|
|
{0x5910,0xA8A9},//SENSOR_GAIN_REG1
|
|
{0x5910,0xC894},//SENSOR_GAIN_REG1
|
|
{0x5910,0xC8D1},//SENSOR_GAIN_REG1
|
|
{0x5910,0xD88A},//SENSOR_GAIN_REG1
|
|
{0x5910,0xD8C3},//SENSOR_GAIN_REG1
|
|
{0x5910,0xD915},//SENSOR_GAIN_REG1
|
|
{0x5910,0xD988},//SENSOR_GAIN_REG1
|
|
{0x5910,0xDA2A},//SENSOR_GAIN_REG1
|
|
{0x5910,0xDB0E},//SENSOR_GAIN_REG1
|
|
{0x5910,0xDC53},//SENSOR_GAIN_REG1
|
|
{0x5910,0x608A},//SENSOR_GAIN_REG1
|
|
{0x5910,0xC919},//SENSOR_GAIN_REG1
|
|
{0x5910,0xCA00},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0000},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0000},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0000},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0001},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0001},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0003},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0003},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0003},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0004},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0004},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0004},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0004},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0004},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0004},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0004},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0002},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0003},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0003},//SENSOR_GAIN_REG1
|
|
{0x5910,0x5A8B},//SENSOR_GAIN_REG1
|
|
{0x5910,0xFF04},//SENSOR_GAIN_REG1
|
|
{0x5910,0xF704},//SENSOR_GAIN_REG1
|
|
{0x5910,0xFF04},//SENSOR_GAIN_REG1
|
|
{0x5910,0xF704},//SENSOR_GAIN_REG1
|
|
{0x5910,0xF704},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0005},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0006},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0007},//SENSOR_GAIN_REG1
|
|
{0x5910,0x9A8B},//SENSOR_GAIN_REG1
|
|
{0x5910,0xFF04},//SENSOR_GAIN_REG1
|
|
{0x5910,0xF704},//SENSOR_GAIN_REG1
|
|
{0x5910,0xF704},//SENSOR_GAIN_REG1
|
|
{0x5910,0xF704},//SENSOR_GAIN_REG1
|
|
{0x5910,0xF704},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0015},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0016},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0017},//SENSOR_GAIN_REG1
|
|
{0x5910,0xDA8B},//SENSOR_GAIN_REG1
|
|
{0x5910,0xFF04},//SENSOR_GAIN_REG1
|
|
{0x5910,0xF704},//SENSOR_GAIN_REG1
|
|
{0x5910,0xF704},//SENSOR_GAIN_REG1
|
|
{0x5910,0xF704},//SENSOR_GAIN_REG1
|
|
{0x5910,0xF704},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0025},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0026},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0027},//SENSOR_GAIN_REG1
|
|
{0x5910,0x59B9},//SENSOR_GAIN_REG1
|
|
{0x5910,0x700F},//SENSOR_GAIN_REG1
|
|
{0x5910,0x7F0F},//SENSOR_GAIN_REG1
|
|
{0x5910,0x700F},//SENSOR_GAIN_REG1
|
|
{0x5910,0x7F0F},//SENSOR_GAIN_REG1
|
|
{0x5910,0x7F0F},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0035},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0036},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0037},//SENSOR_GAIN_REG1
|
|
{0x5910,0x99B9},//SENSOR_GAIN_REG1
|
|
{0x5910,0x700F},//SENSOR_GAIN_REG1
|
|
{0x5910,0x7F0F},//SENSOR_GAIN_REG1
|
|
{0x5910,0x700F},//SENSOR_GAIN_REG1
|
|
{0x5910,0x7F0F},//SENSOR_GAIN_REG1
|
|
{0x5910,0x7F0F},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0045},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0046},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0047},//SENSOR_GAIN_REG1
|
|
{0x5910,0xD9B9},//SENSOR_GAIN_REG1
|
|
{0x5910,0x700F},//SENSOR_GAIN_REG1
|
|
{0x5910,0x7F0F},//SENSOR_GAIN_REG1
|
|
{0x5910,0x700F},//SENSOR_GAIN_REG1
|
|
{0x5910,0x7F0F},//SENSOR_GAIN_REG1
|
|
{0x5910,0x7F0F},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0055},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0056},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0057},//SENSOR_GAIN_REG1
|
|
{0x5910,0x9A85},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0654},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0654},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0684},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0654},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0654},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0065},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0066},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0067},//SENSOR_GAIN_REG1
|
|
{0x5910,0x59BD},//SENSOR_GAIN_REG1
|
|
{0x5910,0x1000},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0C00},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0F00},//SENSOR_GAIN_REG1
|
|
{0x5910,0x1000},//SENSOR_GAIN_REG1
|
|
{0x5910,0x10F0},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0075},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0076},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0077},//SENSOR_GAIN_REG1
|
|
{0x5912,0x608A},//SENSOR_GAIN_REG2
|
|
{0x5912,0x7091},//SENSOR_GAIN_REG2
|
|
{0x5912,0x689C},//SENSOR_GAIN_REG2
|
|
{0x5912,0x8885},//SENSOR_GAIN_REG2
|
|
{0x5912,0x98AD},//SENSOR_GAIN_REG2
|
|
{0x5912,0xA8A9},//SENSOR_GAIN_REG2
|
|
{0x5912,0xC894},//SENSOR_GAIN_REG2
|
|
{0x5912,0xC8D1},//SENSOR_GAIN_REG2
|
|
{0x5912,0xC927},//SENSOR_GAIN_REG2
|
|
{0x5912,0xC9A0},//SENSOR_GAIN_REG2
|
|
{0x5912,0xCA4C},//SENSOR_GAIN_REG2
|
|
{0x5912,0xCB3F},//SENSOR_GAIN_REG2
|
|
{0x5912,0xCC97},//SENSOR_GAIN_REG2
|
|
{0x5912,0xCE7C},//SENSOR_GAIN_REG2
|
|
{0x5912,0xCFFF},//SENSOR_GAIN_REG2
|
|
{0x5912,0x608A},//SENSOR_GAIN_REG2
|
|
{0x5912,0xC919},//SENSOR_GAIN_REG2
|
|
{0x5912,0xCA00},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0000},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0000},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0000},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0001},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0001},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0003},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0003},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0003},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0004},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0004},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0004},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0004},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0004},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0004},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0004},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0002},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0003},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0003},//SENSOR_GAIN_REG2
|
|
{0x5912,0x5A8B},//SENSOR_GAIN_REG2
|
|
{0x5912,0xFF04},//SENSOR_GAIN_REG2
|
|
{0x5912,0xF704},//SENSOR_GAIN_REG2
|
|
{0x5912,0xFF04},//SENSOR_GAIN_REG2
|
|
{0x5912,0xF704},//SENSOR_GAIN_REG2
|
|
{0x5912,0xF704},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0005},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0006},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0007},//SENSOR_GAIN_REG2
|
|
{0x5912,0x9A8B},//SENSOR_GAIN_REG2
|
|
{0x5912,0xFF04},//SENSOR_GAIN_REG2
|
|
{0x5912,0xF704},//SENSOR_GAIN_REG2
|
|
{0x5912,0xF704},//SENSOR_GAIN_REG2
|
|
{0x5912,0xF704},//SENSOR_GAIN_REG2
|
|
{0x5912,0xF704},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0015},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0016},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0017},//SENSOR_GAIN_REG2
|
|
{0x5912,0xDA8B},//SENSOR_GAIN_REG2
|
|
{0x5912,0xFF04},//SENSOR_GAIN_REG2
|
|
{0x5912,0xF704},//SENSOR_GAIN_REG2
|
|
{0x5912,0xF704},//SENSOR_GAIN_REG2
|
|
{0x5912,0xF704},//SENSOR_GAIN_REG2
|
|
{0x5912,0xF704},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0025},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0026},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0027},//SENSOR_GAIN_REG2
|
|
{0x5912,0x59B9},//SENSOR_GAIN_REG2
|
|
{0x5912,0x700F},//SENSOR_GAIN_REG2
|
|
{0x5912,0x7F0F},//SENSOR_GAIN_REG2
|
|
{0x5912,0x700F},//SENSOR_GAIN_REG2
|
|
{0x5912,0x7F0F},//SENSOR_GAIN_REG2
|
|
{0x5912,0x7F0F},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0035},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0036},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0037},//SENSOR_GAIN_REG2
|
|
{0x5912,0x99B9},//SENSOR_GAIN_REG2
|
|
{0x5912,0x700F},//SENSOR_GAIN_REG2
|
|
{0x5912,0x7F0F},//SENSOR_GAIN_REG2
|
|
{0x5912,0x700F},//SENSOR_GAIN_REG2
|
|
{0x5912,0x7F0F},//SENSOR_GAIN_REG2
|
|
{0x5912,0x7F0F},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0045},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0046},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0047},//SENSOR_GAIN_REG2
|
|
{0x5912,0xD9B9},//SENSOR_GAIN_REG2
|
|
{0x5912,0x700F},//SENSOR_GAIN_REG2
|
|
{0x5912,0x7F0F},//SENSOR_GAIN_REG2
|
|
{0x5912,0x700F},//SENSOR_GAIN_REG2
|
|
{0x5912,0x7F0F},//SENSOR_GAIN_REG2
|
|
{0x5912,0x7F0F},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0055},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0056},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0057},//SENSOR_GAIN_REG2
|
|
{0x5912,0x9A85},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0654},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0654},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0684},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0654},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0654},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0065},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0066},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0067},//SENSOR_GAIN_REG2
|
|
{0x5912,0x59BD},//SENSOR_GAIN_REG2
|
|
{0x5912,0x1000},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0C00},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0F00},//SENSOR_GAIN_REG2
|
|
{0x5912,0x1000},//SENSOR_GAIN_REG2
|
|
{0x5912,0x10F0},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0075},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0076},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0077},//SENSOR_GAIN_REG2
|
|
{0x5914,0x4006},//SENSOR_GAIN_TABLE_SEL
|
|
{0x5900,0x0020},//SENSOR_GAIN
|
|
{0x5902,0x0000},//SENSOR_GAIN_T2
|
|
{0x3110,0x0001},//HDR_CONTROL0
|
|
|
|
{REG_NULL, 0x00},
|
|
};
|
|
|
|
static const struct regval ar0822_linear_60fps_regs[] = {
|
|
{REG_DELAY, 2000},
|
|
{0x3030,0x0092},//PLL_MULTIPLIER
|
|
{0x302E,0x0002},//PRE_PLL_CLK_DIV
|
|
{0x302C,0x0002},//VT_SYS_CLK_DIV
|
|
{0x302A,0x0006},//VT_PIX_CLK_DIV
|
|
{0x3038,0x0002},//OP_SYS_CLK_DIV
|
|
{0x3036,0x0006},//OP_WORD_CLK_DIV
|
|
{0x31B0,0x00BF},//FRAME_PREAMBLE
|
|
{0x31B2,0x007D},//LINE_PREAMBLE
|
|
{0x31B4,0x834E},//MIPI_TIMING_0
|
|
{0x31B6,0x8491},//MIPI_TIMING_1
|
|
{0x31B8,0xD0CF},//MIPI_TIMING_2
|
|
{0x31BA,0x0515},//MIPI_TIMING_3
|
|
{0x31BC,0x1911},//MIPI_TIMING_4
|
|
{0x3342,0x122C},//MIPI_F1_PDT_EDT
|
|
{0x31BC,0x5911},//MIPI_TIMING_4
|
|
{0x31DE,0x0004},//MIPI_HISPI_TRIM
|
|
{0x31C6,0xC000},//HISPI_CONTROL
|
|
{0x31C8,0x0B28},//MIPI_DESKEW_PAT_WIDTH
|
|
{0x2512,0xA000},//SEQ_CTRL_PORT
|
|
{0x2510,0x0720},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0x2122},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0x26FF},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0xFFFF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x0F8C},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20E0},//SEQ_DATA_PORT
|
|
{0x2510,0x8055},//SEQ_DATA_PORT
|
|
{0x2510,0xA0E1},//SEQ_DATA_PORT
|
|
{0x2510,0x3041},//SEQ_DATA_PORT
|
|
{0x2510,0x2000},//SEQ_DATA_PORT
|
|
{0x2510,0x3088},//SEQ_DATA_PORT
|
|
{0x2510,0x3282},//SEQ_DATA_PORT
|
|
{0x2510,0xA681},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FE},//SEQ_DATA_PORT
|
|
{0x2510,0x9070},//SEQ_DATA_PORT
|
|
{0x2510,0x891D},//SEQ_DATA_PORT
|
|
{0x2510,0x867F},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FC},//SEQ_DATA_PORT
|
|
{0x2510,0x893F},//SEQ_DATA_PORT
|
|
{0x2510,0x0F92},//SEQ_DATA_PORT
|
|
{0x2510,0x20E0},//SEQ_DATA_PORT
|
|
{0x2510,0x0F8F},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20E0},//SEQ_DATA_PORT
|
|
{0x2510,0x9770},//SEQ_DATA_PORT
|
|
{0x2510,0x20FC},//SEQ_DATA_PORT
|
|
{0x2510,0x8054},//SEQ_DATA_PORT
|
|
{0x2510,0x896C},//SEQ_DATA_PORT
|
|
{0x2510,0x200A},//SEQ_DATA_PORT
|
|
{0x2510,0x9030},//SEQ_DATA_PORT
|
|
{0x2510,0x200A},//SEQ_DATA_PORT
|
|
{0x2510,0x8040},//SEQ_DATA_PORT
|
|
{0x2510,0x8948},//SEQ_DATA_PORT
|
|
{0x2510,0x200A},//SEQ_DATA_PORT
|
|
{0x2510,0x1597},//SEQ_DATA_PORT
|
|
{0x2510,0x8808},//SEQ_DATA_PORT
|
|
{0x2510,0x200A},//SEQ_DATA_PORT
|
|
{0x2510,0x1F96},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20E0},//SEQ_DATA_PORT
|
|
{0x2510,0xA0C0},//SEQ_DATA_PORT
|
|
{0x2510,0x200A},//SEQ_DATA_PORT
|
|
{0x2510,0x3044},//SEQ_DATA_PORT
|
|
{0x2510,0x3088},//SEQ_DATA_PORT
|
|
{0x2510,0x3282},//SEQ_DATA_PORT
|
|
{0x2510,0x2004},//SEQ_DATA_PORT
|
|
{0x2510,0x1FAA},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x20E0},//SEQ_DATA_PORT
|
|
{0x2510,0x7FFF},//SEQ_DATA_PORT
|
|
{0x2510,0x7FFF},//SEQ_DATA_PORT
|
|
{0x2510,0x7FFF},//SEQ_DATA_PORT
|
|
{0x2510,0x20FF},//SEQ_DATA_PORT
|
|
{0x2510,0x7FFF},//SEQ_DATA_PORT
|
|
{0x2510,0x7FFF},//SEQ_DATA_PORT
|
|
{0x2510,0x7FFF},//SEQ_DATA_PORT
|
|
{0x2510,0x3108},//SEQ_DATA_PORT
|
|
{0x2510,0x2400},//SEQ_DATA_PORT
|
|
{0x2510,0x3244},//SEQ_DATA_PORT
|
|
{0x2510,0x7FFF},//SEQ_DATA_PORT
|
|
{0x2510,0x3108},//SEQ_DATA_PORT
|
|
{0x2510,0x2400},//SEQ_DATA_PORT
|
|
{0x2510,0x2702},//SEQ_DATA_PORT
|
|
{0x2510,0x3242},//SEQ_DATA_PORT
|
|
{0x2510,0x3108},//SEQ_DATA_PORT
|
|
{0x2510,0x2420},//SEQ_DATA_PORT
|
|
{0x2510,0x2703},//SEQ_DATA_PORT
|
|
{0x2510,0x3242},//SEQ_DATA_PORT
|
|
{0x2510,0x3108},//SEQ_DATA_PORT
|
|
{0x2510,0x2420},//SEQ_DATA_PORT
|
|
{0x2510,0x2704},//SEQ_DATA_PORT
|
|
{0x2510,0x3244},//SEQ_DATA_PORT
|
|
{0x2510,0x7FFF},//SEQ_DATA_PORT
|
|
{0x2510,0x7FFF},//SEQ_DATA_PORT
|
|
{0x2510,0x7FFF},//SEQ_DATA_PORT
|
|
{0x2510,0x7FFF},//SEQ_DATA_PORT
|
|
{0x2510,0x8801},//SEQ_DATA_PORT
|
|
{0x2510,0x000F},//SEQ_DATA_PORT
|
|
{0x2510,0x109C},//SEQ_DATA_PORT
|
|
{0x2510,0x8855},//SEQ_DATA_PORT
|
|
{0x2510,0x3101},//SEQ_DATA_PORT
|
|
{0x2510,0x3041},//SEQ_DATA_PORT
|
|
{0x2510,0x2000},//SEQ_DATA_PORT
|
|
{0x2510,0x3102},//SEQ_DATA_PORT
|
|
{0x2510,0x3041},//SEQ_DATA_PORT
|
|
{0x2510,0x2000},//SEQ_DATA_PORT
|
|
{0x2510,0x3181},//SEQ_DATA_PORT
|
|
{0x2510,0x3041},//SEQ_DATA_PORT
|
|
{0x2510,0x2000},//SEQ_DATA_PORT
|
|
{0x2510,0x3188},//SEQ_DATA_PORT
|
|
{0x2510,0x3041},//SEQ_DATA_PORT
|
|
{0x2510,0x2000},//SEQ_DATA_PORT
|
|
{0x2510,0x3282},//SEQ_DATA_PORT
|
|
{0x2510,0x3104},//SEQ_DATA_PORT
|
|
{0x2510,0x2000},//SEQ_DATA_PORT
|
|
{0x2510,0xB0E4},//SEQ_DATA_PORT
|
|
{0x2510,0xAD92},//SEQ_DATA_PORT
|
|
{0x2510,0xBC0C},//SEQ_DATA_PORT
|
|
{0x2510,0x1028},//SEQ_DATA_PORT
|
|
{0x2510,0x0022},//SEQ_DATA_PORT
|
|
{0x2510,0xC020},//SEQ_DATA_PORT
|
|
{0x2510,0x003E},//SEQ_DATA_PORT
|
|
{0x2510,0x0045},//SEQ_DATA_PORT
|
|
{0x2510,0x00B0},//SEQ_DATA_PORT
|
|
{0x2510,0x0028},//SEQ_DATA_PORT
|
|
{0x2510,0x30C1},//SEQ_DATA_PORT
|
|
{0x2510,0x8015},//SEQ_DATA_PORT
|
|
{0x2510,0xA038},//SEQ_DATA_PORT
|
|
{0x2510,0x100F},//SEQ_DATA_PORT
|
|
{0x2510,0x0507},//SEQ_DATA_PORT
|
|
{0x2510,0xA220},//SEQ_DATA_PORT
|
|
{0x2510,0x0010},//SEQ_DATA_PORT
|
|
{0x2510,0x10C2},//SEQ_DATA_PORT
|
|
{0x2510,0xB760},//SEQ_DATA_PORT
|
|
{0x2510,0x0033},//SEQ_DATA_PORT
|
|
{0x2510,0x1082},//SEQ_DATA_PORT
|
|
{0x2510,0x100B},//SEQ_DATA_PORT
|
|
{0x2510,0x1029},//SEQ_DATA_PORT
|
|
{0x2510,0xA85A},//SEQ_DATA_PORT
|
|
{0x2510,0x998D},//SEQ_DATA_PORT
|
|
{0x2510,0xC810},//SEQ_DATA_PORT
|
|
{0x2510,0x2004},//SEQ_DATA_PORT
|
|
{0x2510,0x0ECE},//SEQ_DATA_PORT
|
|
{0x2510,0x123B},//SEQ_DATA_PORT
|
|
{0x2510,0xC000},//SEQ_DATA_PORT
|
|
{0x2510,0x032F},//SEQ_DATA_PORT
|
|
{0x2510,0x11D5},//SEQ_DATA_PORT
|
|
{0x2510,0x162F},//SEQ_DATA_PORT
|
|
{0x2510,0x9000},//SEQ_DATA_PORT
|
|
{0x2510,0x2034},//SEQ_DATA_PORT
|
|
{0x2510,0x0015},//SEQ_DATA_PORT
|
|
{0x2510,0x04CB},//SEQ_DATA_PORT
|
|
{0x2510,0x1022},//SEQ_DATA_PORT
|
|
{0x2510,0x1031},//SEQ_DATA_PORT
|
|
{0x2510,0x002D},//SEQ_DATA_PORT
|
|
{0x2510,0x1015},//SEQ_DATA_PORT
|
|
{0x2510,0x80B9},//SEQ_DATA_PORT
|
|
{0x2510,0xA101},//SEQ_DATA_PORT
|
|
{0x2510,0x001C},//SEQ_DATA_PORT
|
|
{0x2510,0x008E},//SEQ_DATA_PORT
|
|
{0x2510,0x124B},//SEQ_DATA_PORT
|
|
{0x2510,0x01B5},//SEQ_DATA_PORT
|
|
{0x2510,0x0B92},//SEQ_DATA_PORT
|
|
{0x2510,0xA400},//SEQ_DATA_PORT
|
|
{0x2510,0x8091},//SEQ_DATA_PORT
|
|
{0x2510,0x0028},//SEQ_DATA_PORT
|
|
{0x2510,0x3002},//SEQ_DATA_PORT
|
|
{0x2510,0x2004},//SEQ_DATA_PORT
|
|
{0x2510,0x1012},//SEQ_DATA_PORT
|
|
{0x2510,0x100E},//SEQ_DATA_PORT
|
|
{0x2510,0x10A8},//SEQ_DATA_PORT
|
|
{0x2510,0x00A1},//SEQ_DATA_PORT
|
|
{0x2510,0x132D},//SEQ_DATA_PORT
|
|
{0x2510,0x09AF},//SEQ_DATA_PORT
|
|
{0x2510,0x0159},//SEQ_DATA_PORT
|
|
{0x2510,0x121D},//SEQ_DATA_PORT
|
|
{0x2510,0x1259},//SEQ_DATA_PORT
|
|
{0x2510,0x11AF},//SEQ_DATA_PORT
|
|
{0x2510,0x18B5},//SEQ_DATA_PORT
|
|
{0x2510,0x0395},//SEQ_DATA_PORT
|
|
{0x2510,0x054B},//SEQ_DATA_PORT
|
|
{0x2510,0x1021},//SEQ_DATA_PORT
|
|
{0x2510,0x0020},//SEQ_DATA_PORT
|
|
{0x2510,0x1015},//SEQ_DATA_PORT
|
|
{0x2510,0x1030},//SEQ_DATA_PORT
|
|
{0x2510,0x00CF},//SEQ_DATA_PORT
|
|
{0x2510,0xB146},//SEQ_DATA_PORT
|
|
{0x2510,0xC290},//SEQ_DATA_PORT
|
|
{0x2510,0x103C},//SEQ_DATA_PORT
|
|
{0x2510,0xA882},//SEQ_DATA_PORT
|
|
{0x2510,0x8055},//SEQ_DATA_PORT
|
|
{0x2510,0x00A9},//SEQ_DATA_PORT
|
|
{0x2510,0x8801},//SEQ_DATA_PORT
|
|
{0x2510,0xB700},//SEQ_DATA_PORT
|
|
{0x2510,0x0001},//SEQ_DATA_PORT
|
|
{0x2510,0x02A2},//SEQ_DATA_PORT
|
|
{0x2510,0x000A},//SEQ_DATA_PORT
|
|
{0x2510,0x98BB},//SEQ_DATA_PORT
|
|
{0x2510,0x203F},//SEQ_DATA_PORT
|
|
{0x2510,0x0036},//SEQ_DATA_PORT
|
|
{0x2510,0x1001},//SEQ_DATA_PORT
|
|
{0x2510,0x99BE},//SEQ_DATA_PORT
|
|
{0x2510,0x0139},//SEQ_DATA_PORT
|
|
{0x2510,0x100A},//SEQ_DATA_PORT
|
|
{0x2510,0x0040},//SEQ_DATA_PORT
|
|
{0x2510,0x1022},//SEQ_DATA_PORT
|
|
{0x2510,0x124C},//SEQ_DATA_PORT
|
|
{0x2510,0x109F},//SEQ_DATA_PORT
|
|
{0x2510,0x15A3},//SEQ_DATA_PORT
|
|
{0x2510,0x002A},//SEQ_DATA_PORT
|
|
{0x2510,0x3081},//SEQ_DATA_PORT
|
|
{0x2510,0x2001},//SEQ_DATA_PORT
|
|
{0x2510,0x3044},//SEQ_DATA_PORT
|
|
{0x2510,0x2000},//SEQ_DATA_PORT
|
|
{0x2510,0x112A},//SEQ_DATA_PORT
|
|
{0x2510,0x101D},//SEQ_DATA_PORT
|
|
{0x2510,0x202B},//SEQ_DATA_PORT
|
|
{0x2510,0x02B8},//SEQ_DATA_PORT
|
|
{0x2510,0x10B8},//SEQ_DATA_PORT
|
|
{0x2510,0x1136},//SEQ_DATA_PORT
|
|
{0x2510,0x996B},//SEQ_DATA_PORT
|
|
{0x2510,0x004C},//SEQ_DATA_PORT
|
|
{0x2510,0x1039},//SEQ_DATA_PORT
|
|
{0x2510,0x1040},//SEQ_DATA_PORT
|
|
{0x2510,0x00B5},//SEQ_DATA_PORT
|
|
{0x2510,0x03C4},//SEQ_DATA_PORT
|
|
{0x2510,0x1144},//SEQ_DATA_PORT
|
|
{0x2510,0x1245},//SEQ_DATA_PORT
|
|
{0x2510,0x9A7B},//SEQ_DATA_PORT
|
|
{0x2510,0x002B},//SEQ_DATA_PORT
|
|
{0x2510,0x30D0},//SEQ_DATA_PORT
|
|
{0x2510,0x3141},//SEQ_DATA_PORT
|
|
{0x2510,0x3041},//SEQ_DATA_PORT
|
|
{0x2510,0x2000},//SEQ_DATA_PORT
|
|
{0x2510,0x3142},//SEQ_DATA_PORT
|
|
{0x2510,0x3041},//SEQ_DATA_PORT
|
|
{0x2510,0x2000},//SEQ_DATA_PORT
|
|
{0x2510,0x3110},//SEQ_DATA_PORT
|
|
{0x2510,0x3041},//SEQ_DATA_PORT
|
|
{0x2510,0x2000},//SEQ_DATA_PORT
|
|
{0x2510,0x3120},//SEQ_DATA_PORT
|
|
{0x2510,0x3041},//SEQ_DATA_PORT
|
|
{0x2510,0x2000},//SEQ_DATA_PORT
|
|
{0x2510,0x3144},//SEQ_DATA_PORT
|
|
{0x2510,0x3041},//SEQ_DATA_PORT
|
|
{0x2510,0x2000},//SEQ_DATA_PORT
|
|
{0x2510,0x3148},//SEQ_DATA_PORT
|
|
{0x2510,0x3041},//SEQ_DATA_PORT
|
|
{0x2510,0x2000},//SEQ_DATA_PORT
|
|
{0x2510,0x3182},//SEQ_DATA_PORT
|
|
{0x2510,0x3041},//SEQ_DATA_PORT
|
|
{0x2510,0x2000},//SEQ_DATA_PORT
|
|
{0x2510,0x3184},//SEQ_DATA_PORT
|
|
{0x2510,0x2000},//SEQ_DATA_PORT
|
|
{0x2510,0x3190},//SEQ_DATA_PORT
|
|
{0x2510,0x3041},//SEQ_DATA_PORT
|
|
{0x2510,0x2000},//SEQ_DATA_PORT
|
|
{0x2510,0x31A0},//SEQ_DATA_PORT
|
|
{0x2510,0x3088},//SEQ_DATA_PORT
|
|
{0x2510,0x2201},//SEQ_DATA_PORT
|
|
{0x2510,0x807D},//SEQ_DATA_PORT
|
|
{0x2510,0x2206},//SEQ_DATA_PORT
|
|
{0x2510,0x8815},//SEQ_DATA_PORT
|
|
{0x2510,0x8877},//SEQ_DATA_PORT
|
|
{0x2510,0x0092},//SEQ_DATA_PORT
|
|
{0x2510,0x220E},//SEQ_DATA_PORT
|
|
{0x2510,0x2211},//SEQ_DATA_PORT
|
|
{0x2510,0x8055},//SEQ_DATA_PORT
|
|
{0x2510,0x3001},//SEQ_DATA_PORT
|
|
{0x2510,0x2000},//SEQ_DATA_PORT
|
|
{0x2510,0x8A61},//SEQ_DATA_PORT
|
|
{0x2510,0x8801},//SEQ_DATA_PORT
|
|
{0x2510,0x1092},//SEQ_DATA_PORT
|
|
{0x2510,0x181F},//SEQ_DATA_PORT
|
|
{0x2510,0x0B1F},//SEQ_DATA_PORT
|
|
{0x2510,0x101F},//SEQ_DATA_PORT
|
|
{0x2510,0x00B6},//SEQ_DATA_PORT
|
|
{0x2510,0x0023},//SEQ_DATA_PORT
|
|
{0x2510,0x00B9},//SEQ_DATA_PORT
|
|
{0x2510,0x104C},//SEQ_DATA_PORT
|
|
{0x2510,0x996E},//SEQ_DATA_PORT
|
|
{0x2510,0x0140},//SEQ_DATA_PORT
|
|
{0x2510,0x0257},//SEQ_DATA_PORT
|
|
{0x2510,0x1035},//SEQ_DATA_PORT
|
|
{0x2510,0x9F26},//SEQ_DATA_PORT
|
|
{0x2510,0x1423},//SEQ_DATA_PORT
|
|
{0x2510,0x0048},//SEQ_DATA_PORT
|
|
{0x2510,0xC878},//SEQ_DATA_PORT
|
|
{0x2510,0x200A},//SEQ_DATA_PORT
|
|
{0x2510,0x1548},//SEQ_DATA_PORT
|
|
{0x2510,0x0C49},//SEQ_DATA_PORT
|
|
{0x2510,0x1149},//SEQ_DATA_PORT
|
|
{0x2510,0x002A},//SEQ_DATA_PORT
|
|
{0x2510,0x1057},//SEQ_DATA_PORT
|
|
{0x2510,0x3281},//SEQ_DATA_PORT
|
|
{0x2510,0x2000},//SEQ_DATA_PORT
|
|
{0x2510,0x3044},//SEQ_DATA_PORT
|
|
{0x2510,0x2001},//SEQ_DATA_PORT
|
|
{0x2510,0xA020},//SEQ_DATA_PORT
|
|
{0x2510,0x000C},//SEQ_DATA_PORT
|
|
{0x2510,0x9825},//SEQ_DATA_PORT
|
|
{0x2510,0x1040},//SEQ_DATA_PORT
|
|
{0x2510,0x1054},//SEQ_DATA_PORT
|
|
{0x2510,0xB06D},//SEQ_DATA_PORT
|
|
{0x2510,0x0035},//SEQ_DATA_PORT
|
|
{0x2510,0x004D},//SEQ_DATA_PORT
|
|
{0x2510,0x9905},//SEQ_DATA_PORT
|
|
{0x2510,0xB064},//SEQ_DATA_PORT
|
|
{0x2510,0x99C5},//SEQ_DATA_PORT
|
|
{0x2510,0x0047},//SEQ_DATA_PORT
|
|
{0x2510,0xB920},//SEQ_DATA_PORT
|
|
{0x2510,0x1447},//SEQ_DATA_PORT
|
|
{0x2510,0x7FFF},//SEQ_DATA_PORT
|
|
{0x2510,0x7FFF},//SEQ_DATA_PORT
|
|
{0x2510,0x7FFF},//SEQ_DATA_PORT
|
|
{0x2510,0x7FFF},//SEQ_DATA_PORT
|
|
{0x2510,0x7FFF},//SEQ_DATA_PORT
|
|
{0x2510,0x7FFF},//SEQ_DATA_PORT
|
|
{0x2510,0x7FFF},//SEQ_DATA_PORT
|
|
{0x2510,0x7FFF},//SEQ_DATA_PORT
|
|
{0x2510,0x7FFF},//SEQ_DATA_PORT
|
|
{0x31F8,0x0008},//MIPI_CONFIG_2
|
|
{0x3C70,0x6828},//CALIB_ROWS
|
|
{0x3092,0x0826},//ROW_NOISE_CONTROL
|
|
{0x3428,0x0209},//SEQUENCER_CONTROL
|
|
{0x3516,0xFF04},//DAC_LD_22_23
|
|
{0x3526,0x6480},//DAC_LD_38_39
|
|
{0x3504,0x8AAA},//DAC_LD_4_5
|
|
{0x353C,0x220C},//DAC_LD_60_61
|
|
{0x3536,0x4C6E},//DAC_LD_54_55
|
|
{0x3D2A,0x0FFF},//T1_END_DEC_TH
|
|
{0x3364,0x00EC},//DCG_TRIM
|
|
{0x3512,0x8888},//DAC_LD_18_19
|
|
{0x3514,0x888F},//DAC_LD_20_21
|
|
{0x3520,0xFBF0},//DAC_LD_32_33
|
|
{0x3524,0xB2A1},//DAC_LD_36_37
|
|
{0x3528,0xCC84},//DAC_LD_40_41
|
|
{0x3532,0x4C8E},//DAC_LD_50_51
|
|
{0x3534,0x4E64},//DAC_LD_52_53
|
|
{0x351E,0x5856},//DAC_LD_30_31
|
|
{0x353E,0x98F2},//DAC_LD_62_63
|
|
{0x352E,0x6A8A},//DAC_LD_46_47
|
|
{0x3370,0x0211},//DBLC_CONTROL
|
|
{0x3372,0x700F},//DBLC_FS0_CONTROL
|
|
{0x3540,0x3597},//DAC_LD_64_65
|
|
{0x58E2,0x0BE3},//COL_COUNT_VALUES1
|
|
{0x58E4,0x18B4},//COL_COUNT_VALUES2
|
|
{0x3522,0x7C97},//DAC_LD_34_35
|
|
{0x30BA,0x0024},//DIGITAL_CTRL
|
|
{0x31D4,0x0042},//CLK_MEM_GATING_CTRL
|
|
{0x352A,0x6F8F},//DAC_LD_42_43
|
|
{0x3530,0x4A08},//DAC_LD_48_49
|
|
{0x351A,0x5FFF},//DAC_LD_26_27
|
|
{0x350E,0x39D9},//DAC_LD_14_15
|
|
{0x3510,0x9988},//DAC_LD_16_17
|
|
{0x3380,0x1FFF},//DBLC_OFFSET1
|
|
{0x337A,0x1000},//DBLC_SCALE1
|
|
{0x3092,0x0800},//ROW_NOISE_CONTROL
|
|
{0x350A,0x0654},//DAC_LD_10_11
|
|
{0x3364,0x00E0},//DCG_TRIM
|
|
{0x591E,0x61AE},//ANALOG_GAIN_WR_DATA
|
|
{0x591E,0x722C},//ANALOG_GAIN_WR_DATA
|
|
{0x591E,0x82B8},//ANALOG_GAIN_WR_DATA
|
|
{0x591E,0x92F6},//ANALOG_GAIN_WR_DATA
|
|
{0x591E,0xA447},//ANALOG_GAIN_WR_DATA
|
|
{0x591E,0xB66D},//ANALOG_GAIN_WR_DATA
|
|
{0x591E,0xC6EA},//ANALOG_GAIN_WR_DATA
|
|
{0x591E,0xDECD},//ANALOG_GAIN_WR_DATA
|
|
{0x3532,0x4C8A},//DAC_LD_50_51
|
|
{0x3534,0x4E60},//DAC_LD_52_53
|
|
{0x353E,0x90F2},//DAC_LD_62_63
|
|
{0x351A,0x4FFF},//DAC_LD_26_27
|
|
{0x591C,0x00D7},//DGR_AMP_GAIN
|
|
{0x3522,0x6097},//DAC_LD_34_35
|
|
{0x5002,0x37C3},//T1_PIX_DEF_ID2
|
|
{0x51CC,0x0149},//T1_NOISE_GAIN_THRESHOLD0
|
|
{0x51D8,0x044D},//T1_NOISE_GAIN_THRESHOLD1
|
|
{0x51CE,0x0700},//T1_NOISE_GAIN_THRESHOLD2
|
|
{0x51D0,0x0001},//T1_NOISE_FLOOR0
|
|
{0x51D2,0x0002},//T1_NOISE_FLOOR1
|
|
{0x51D4,0x0003},//T1_NOISE_FLOOR2
|
|
{0x51D6,0x0004},//T1_NOISE_FLOOR3
|
|
{0x5202,0x37C3},//T2_PIX_DEF_ID2
|
|
{0x51EA,0x0149},//T2_NOISE_GAIN_THRESHOLD0
|
|
{0x51FC,0x044D},//T2_NOISE_GAIN_THRESHOLD1
|
|
{0x51EC,0x0700},//T2_NOISE_GAIN_THRESHOLD2
|
|
{0x51EE,0x0001},//T2_NOISE_FLOOR0
|
|
{0x51F0,0x0002},//T2_NOISE_FLOOR1
|
|
{0x51F2,0x0003},//T2_NOISE_FLOOR2
|
|
{0x51F4,0x0004},//T2_NOISE_FLOOR3
|
|
{0x5402,0x37C3},//T4_PIX_DEF_ID2
|
|
{0x5560,0x0149},//T4_NOISE_GAIN_THRESHOLD0
|
|
{0x556C,0x044D},//T4_NOISE_GAIN_THRESHOLD1
|
|
{0x5562,0x0700},//T4_NOISE_GAIN_THRESHOLD2
|
|
{0x5564,0x0001},//T4_NOISE_FLOOR0
|
|
{0x5566,0x0002},//T4_NOISE_FLOOR1
|
|
{0x5568,0x0003},//T4_NOISE_FLOOR2
|
|
{0x556A,0x0004},//T4_NOISE_FLOOR3
|
|
{0x31E0,0x0001},//PIX_DEF_ID
|
|
{0x5000,0x0080},//T1_PIX_DEF_ID
|
|
{0x5000,0x0180},//T1_PIX_DEF_ID
|
|
{0x5000,0x0180},//T1_PIX_DEF_ID
|
|
{0x5200,0x0080},//T2_PIX_DEF_ID
|
|
{0x5200,0x0180},//T2_PIX_DEF_ID
|
|
{0x5200,0x0180},//T2_PIX_DEF_ID
|
|
{0x5400,0x0080},//T4_PIX_DEF_ID
|
|
{0x5400,0x0180},//T4_PIX_DEF_ID
|
|
{0x5400,0x0180},//T4_PIX_DEF_ID
|
|
{0x5000,0x1180},//T1_PIX_DEF_ID
|
|
{0x50A2,0x2553},//BMT0
|
|
{0x50A4,0xDFD4},//BMT1
|
|
{0x50A6,0x030F},//SINGLEK_FACTOR0
|
|
{0x50A6,0x0F0F},//SINGLEK_FACTOR0
|
|
{0x50A8,0x030F},//SINGLEK_FACTOR1
|
|
{0x50A8,0x0F0F},//SINGLEK_FACTOR1
|
|
{0x50AA,0x030F},//SINGLEK_FACTOR2
|
|
{0x50AA,0x050F},//SINGLEK_FACTOR2
|
|
{0x50AC,0x0301},//CROSS_FACTOR0
|
|
{0x50AC,0x0101},//CROSS_FACTOR0
|
|
{0x50AE,0x0301},//CROSS_FACTOR1
|
|
{0x50AE,0x0101},//CROSS_FACTOR1
|
|
{0x50B0,0x0301},//CROSS_FACTOR2
|
|
{0x50B0,0x0101},//CROSS_FACTOR2
|
|
{0x50B2,0x03FF},//SINGLE_MAX_FACTOR
|
|
{0x50B4,0x030F},//COUPLE_FACTOR0
|
|
{0x50B4,0x0F0F},//COUPLE_FACTOR0
|
|
{0x50B6,0x030F},//COUPLE_FACTOR1
|
|
{0x50B6,0x0F0F},//COUPLE_FACTOR1
|
|
{0x50B8,0x030F},//COUPLE_FACTOR2
|
|
{0x50B8,0x050F},//COUPLE_FACTOR2
|
|
{0x31AE,0x0204},//SERIAL_FORMAT
|
|
{0x31AC,0x0C0C},//DATA_FORMAT_BITS
|
|
{0x3082,0x0001},//OPERATION_MODE_CTRL
|
|
{0x30BA,0x0024},//DIGITAL_CTRL
|
|
{0x31AE,0x0204},//SERIAL_FORMAT
|
|
{0x31AC,0x0C0C},//DATA_FORMAT_BITS
|
|
{0x300C,0x0482},//LINE_LENGTH_PCK_
|
|
{0x300A,0x0944},//FRAME_LENGTH_LINES_
|
|
{0x3012,0x093E},//COARSE_INTEGRATION_TIME_
|
|
{0x5914,0x4012},//SENSOR_GAIN_TABLE_SEL
|
|
{REG_DELAY,100},
|
|
{0x5914,0x4002},//SENSOR_GAIN_TABLE_SEL
|
|
{0x5910,0x608A},//SENSOR_GAIN_REG1
|
|
{0x5910,0x7091},//SENSOR_GAIN_REG1
|
|
{0x5910,0x689C},//SENSOR_GAIN_REG1
|
|
{0x5910,0x8885},//SENSOR_GAIN_REG1
|
|
{0x5910,0x98AD},//SENSOR_GAIN_REG1
|
|
{0x5910,0xA8A9},//SENSOR_GAIN_REG1
|
|
{0x5910,0xC894},//SENSOR_GAIN_REG1
|
|
{0x5910,0xC8D1},//SENSOR_GAIN_REG1
|
|
{0x5910,0xD88A},//SENSOR_GAIN_REG1
|
|
{0x5910,0xD8C3},//SENSOR_GAIN_REG1
|
|
{0x5910,0xD915},//SENSOR_GAIN_REG1
|
|
{0x5910,0xD988},//SENSOR_GAIN_REG1
|
|
{0x5910,0xDA2A},//SENSOR_GAIN_REG1
|
|
{0x5910,0xDB0E},//SENSOR_GAIN_REG1
|
|
{0x5910,0xDC53},//SENSOR_GAIN_REG1
|
|
{0x5910,0x608A},//SENSOR_GAIN_REG1
|
|
{0x5910,0xC919},//SENSOR_GAIN_REG1
|
|
{0x5910,0xCA00},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0000},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0000},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0000},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0001},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0001},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0003},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0003},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0003},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0004},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0004},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0004},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0004},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0004},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0004},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0004},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0002},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0003},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0003},//SENSOR_GAIN_REG1
|
|
{0x5910,0x5A8B},//SENSOR_GAIN_REG1
|
|
{0x5910,0xFF04},//SENSOR_GAIN_REG1
|
|
{0x5910,0xF704},//SENSOR_GAIN_REG1
|
|
{0x5910,0xFF04},//SENSOR_GAIN_REG1
|
|
{0x5910,0xF704},//SENSOR_GAIN_REG1
|
|
{0x5910,0xF704},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0005},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0006},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0007},//SENSOR_GAIN_REG1
|
|
{0x5910,0x9A8B},//SENSOR_GAIN_REG1
|
|
{0x5910,0xFF04},//SENSOR_GAIN_REG1
|
|
{0x5910,0xF704},//SENSOR_GAIN_REG1
|
|
{0x5910,0xF704},//SENSOR_GAIN_REG1
|
|
{0x5910,0xF704},//SENSOR_GAIN_REG1
|
|
{0x5910,0xF704},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0015},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0016},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0017},//SENSOR_GAIN_REG1
|
|
{0x5910,0xDA8B},//SENSOR_GAIN_REG1
|
|
{0x5910,0xFF04},//SENSOR_GAIN_REG1
|
|
{0x5910,0xF704},//SENSOR_GAIN_REG1
|
|
{0x5910,0xF704},//SENSOR_GAIN_REG1
|
|
{0x5910,0xF704},//SENSOR_GAIN_REG1
|
|
{0x5910,0xF704},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0025},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0026},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0027},//SENSOR_GAIN_REG1
|
|
{0x5910,0x59B9},//SENSOR_GAIN_REG1
|
|
{0x5910,0x700F},//SENSOR_GAIN_REG1
|
|
{0x5910,0x7F0F},//SENSOR_GAIN_REG1
|
|
{0x5910,0x700F},//SENSOR_GAIN_REG1
|
|
{0x5910,0x7F0F},//SENSOR_GAIN_REG1
|
|
{0x5910,0x7F0F},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0035},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0036},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0037},//SENSOR_GAIN_REG1
|
|
{0x5910,0x99B9},//SENSOR_GAIN_REG1
|
|
{0x5910,0x700F},//SENSOR_GAIN_REG1
|
|
{0x5910,0x7F0F},//SENSOR_GAIN_REG1
|
|
{0x5910,0x700F},//SENSOR_GAIN_REG1
|
|
{0x5910,0x7F0F},//SENSOR_GAIN_REG1
|
|
{0x5910,0x7F0F},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0045},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0046},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0047},//SENSOR_GAIN_REG1
|
|
{0x5910,0xD9B9},//SENSOR_GAIN_REG1
|
|
{0x5910,0x700F},//SENSOR_GAIN_REG1
|
|
{0x5910,0x7F0F},//SENSOR_GAIN_REG1
|
|
{0x5910,0x700F},//SENSOR_GAIN_REG1
|
|
{0x5910,0x7F0F},//SENSOR_GAIN_REG1
|
|
{0x5910,0x7F0F},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0055},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0056},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0057},//SENSOR_GAIN_REG1
|
|
{0x5910,0x9A85},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0654},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0654},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0684},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0654},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0654},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0065},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0066},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0067},//SENSOR_GAIN_REG1
|
|
{0x5910,0x59BD},//SENSOR_GAIN_REG1
|
|
{0x5910,0x1000},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0C00},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0F00},//SENSOR_GAIN_REG1
|
|
{0x5910,0x1000},//SENSOR_GAIN_REG1
|
|
{0x5910,0x10F0},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0075},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0076},//SENSOR_GAIN_REG1
|
|
{0x5910,0x0077},//SENSOR_GAIN_REG1
|
|
{0x5912,0x608A},//SENSOR_GAIN_REG2
|
|
{0x5912,0x7091},//SENSOR_GAIN_REG2
|
|
{0x5912,0x689C},//SENSOR_GAIN_REG2
|
|
{0x5912,0x8885},//SENSOR_GAIN_REG2
|
|
{0x5912,0x98AD},//SENSOR_GAIN_REG2
|
|
{0x5912,0xA8A9},//SENSOR_GAIN_REG2
|
|
{0x5912,0xC894},//SENSOR_GAIN_REG2
|
|
{0x5912,0xC8D1},//SENSOR_GAIN_REG2
|
|
{0x5912,0xC927},//SENSOR_GAIN_REG2
|
|
{0x5912,0xC9A0},//SENSOR_GAIN_REG2
|
|
{0x5912,0xCA4C},//SENSOR_GAIN_REG2
|
|
{0x5912,0xCB3F},//SENSOR_GAIN_REG2
|
|
{0x5912,0xCC97},//SENSOR_GAIN_REG2
|
|
{0x5912,0xCE7C},//SENSOR_GAIN_REG2
|
|
{0x5912,0xCFFF},//SENSOR_GAIN_REG2
|
|
{0x5912,0x608A},//SENSOR_GAIN_REG2
|
|
{0x5912,0xC8F0},//SENSOR_GAIN_REG2
|
|
{0x5912,0xCA00},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0000},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0000},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0000},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0001},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0001},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0003},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0003},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0003},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0004},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0004},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0004},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0004},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0004},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0004},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0004},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0002},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0003},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0003},//SENSOR_GAIN_REG2
|
|
{0x5912,0x5A8B},//SENSOR_GAIN_REG2
|
|
{0x5912,0xFF04},//SENSOR_GAIN_REG2
|
|
{0x5912,0xF704},//SENSOR_GAIN_REG2
|
|
{0x5912,0xFF04},//SENSOR_GAIN_REG2
|
|
{0x5912,0xF704},//SENSOR_GAIN_REG2
|
|
{0x5912,0xF704},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0005},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0006},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0007},//SENSOR_GAIN_REG2
|
|
{0x5912,0x9A8B},//SENSOR_GAIN_REG2
|
|
{0x5912,0xFF04},//SENSOR_GAIN_REG2
|
|
{0x5912,0xF704},//SENSOR_GAIN_REG2
|
|
{0x5912,0xF704},//SENSOR_GAIN_REG2
|
|
{0x5912,0xF704},//SENSOR_GAIN_REG2
|
|
{0x5912,0xF704},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0015},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0016},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0017},//SENSOR_GAIN_REG2
|
|
{0x5912,0xDA8B},//SENSOR_GAIN_REG2
|
|
{0x5912,0xFF04},//SENSOR_GAIN_REG2
|
|
{0x5912,0xF704},//SENSOR_GAIN_REG2
|
|
{0x5912,0xF704},//SENSOR_GAIN_REG2
|
|
{0x5912,0xF704},//SENSOR_GAIN_REG2
|
|
{0x5912,0xF704},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0025},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0026},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0027},//SENSOR_GAIN_REG2
|
|
{0x5912,0x59B9},//SENSOR_GAIN_REG2
|
|
{0x5912,0x700F},//SENSOR_GAIN_REG2
|
|
{0x5912,0x7F0F},//SENSOR_GAIN_REG2
|
|
{0x5912,0x700F},//SENSOR_GAIN_REG2
|
|
{0x5912,0x7F0F},//SENSOR_GAIN_REG2
|
|
{0x5912,0x7F0F},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0035},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0036},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0037},//SENSOR_GAIN_REG2
|
|
{0x5912,0x99B9},//SENSOR_GAIN_REG2
|
|
{0x5912,0x700F},//SENSOR_GAIN_REG2
|
|
{0x5912,0x7F0F},//SENSOR_GAIN_REG2
|
|
{0x5912,0x700F},//SENSOR_GAIN_REG2
|
|
{0x5912,0x7F0F},//SENSOR_GAIN_REG2
|
|
{0x5912,0x7F0F},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0045},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0046},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0047},//SENSOR_GAIN_REG2
|
|
{0x5912,0xD9B9},//SENSOR_GAIN_REG2
|
|
{0x5912,0x700F},//SENSOR_GAIN_REG2
|
|
{0x5912,0x7F0F},//SENSOR_GAIN_REG2
|
|
{0x5912,0x700F},//SENSOR_GAIN_REG2
|
|
{0x5912,0x7F0F},//SENSOR_GAIN_REG2
|
|
{0x5912,0x7F0F},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0055},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0056},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0057},//SENSOR_GAIN_REG2
|
|
{0x5912,0x9A85},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0654},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0654},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0684},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0654},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0654},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0065},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0066},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0067},//SENSOR_GAIN_REG2
|
|
{0x5912,0x59BD},//SENSOR_GAIN_REG2
|
|
{0x5912,0x1000},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0C00},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0F00},//SENSOR_GAIN_REG2
|
|
{0x5912,0x1000},//SENSOR_GAIN_REG2
|
|
{0x5912,0x10F0},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0075},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0076},//SENSOR_GAIN_REG2
|
|
{0x5912,0x0077},//SENSOR_GAIN_REG2
|
|
{0x5914,0x4002},//SENSOR_GAIN_TABLE_SEL
|
|
{0x5900,0x0000},//SENSOR_GAIN
|
|
|
|
{REG_NULL, 0x00},
|
|
};
|
|
static const s64 link_freq_menu_items[] = {
|
|
MIPI_FREQ_492M,
|
|
MIPI_FREQ_657M,
|
|
MIPI_FREQ_823M,
|
|
MIPI_FREQ_986M,
|
|
};
|
|
#define MIPI_FREQ_492M_INDEX 0
|
|
#define MIPI_FREQ_657M_INDEX 1
|
|
#define MIPI_FREQ_823M_INDEX 2
|
|
#define MIPI_FREQ_986M_INDEX 3
|
|
#define MIPI_FREQ_MAX_INDEX 4
|
|
/*
|
|
* The width and height must be configured to be
|
|
* the same as the current output resolution of the sensor.
|
|
* The input width of the isp needs to be 16 aligned.
|
|
* The input height of the isp needs to be 8 aligned.
|
|
* If the width or height does not meet the alignment rules,
|
|
* you can configure the cropping parameters with the following function to
|
|
* crop out the appropriate resolution.
|
|
* struct v4l2_subdev_pad_ops {
|
|
* .get_selection
|
|
* }
|
|
*/
|
|
|
|
/* Config resolution ,LLPCLK, FLL, exposure time,fps, MIPI channel config, HDR mode , open.k */
|
|
static const struct ar0822_mode supported_modes[] = {
|
|
/* {
|
|
.bus_fmt = MEDIA_BUS_FMT_SGRBG12_1X12,
|
|
.width = 3840,
|
|
.height = 2160,
|
|
.max_fps = {
|
|
.numerator = 10000,
|
|
.denominator = 600000,
|
|
},
|
|
.exp_def = 0x0240,
|
|
.hts_def = 0x4330,//for linear mode, hblank is 4*LINE_LENGTH_PCK_-WIDTH,so hts is 4*LINE_LENGTH_PCK_. not used param by RK.
|
|
.vts_def = 0x0944,//used by AEC, should set correctly.
|
|
.reg_list = ar0822_linear_60fps_regs,
|
|
.hdr_mode = NO_HDR,
|
|
.mipi_freq = MIPI_FREQ_986M_INDEX,
|
|
.mipi_rate = MIPI_FREQ_986M/AR0822_BPP12*2*AR0822_LANES,
|
|
.vc[PAD0] = V4L2_MBUS_CSI2_CHANNEL_0,
|
|
},*/
|
|
{
|
|
.bus_fmt = MEDIA_BUS_FMT_SGRBG12_1X12,
|
|
.width = 3840,
|
|
.height = 2160,
|
|
.max_fps = {
|
|
.numerator = 10000,
|
|
.denominator = 300000,
|
|
},
|
|
.exp_def = 0x0240,
|
|
.hts_def = 0x4330,//for linear mode, hblank is 4*LINE_LENGTH_PCK_-WIDTH,so hts is 4*LINE_LENGTH_PCK_. not used param by RK.
|
|
.vts_def = 0x09F3,//used by AEC, should set correctly.
|
|
.reg_list = ar0822_linear_global_regs,
|
|
.hdr_mode = NO_HDR,
|
|
.mipi_freq = MIPI_FREQ_492M_INDEX,
|
|
.mipi_rate = MIPI_FREQ_492M / AR0822_BPP12 * 2 * AR0822_LANES,
|
|
.vc[PAD0] = V4L2_MBUS_CSI2_CHANNEL_0,
|
|
},
|
|
|
|
{
|
|
.bus_fmt = MEDIA_BUS_FMT_SGRBG12_1X12,
|
|
.width = 3840,
|
|
.height = 2160,
|
|
.max_fps = {
|
|
.numerator = 10000,
|
|
.denominator = 200000,
|
|
},
|
|
.exp_def = 0x0240,
|
|
.hts_def = 0x0E7C*2,//
|
|
.vts_def = 0x9b8,//0x0888,//
|
|
.reg_list = ar0822_hdr12bit_3840x2160_20fps_regs,
|
|
.hdr_mode = HDR_X2,
|
|
.mipi_freq = MIPI_FREQ_657M_INDEX,
|
|
.mipi_rate = MIPI_FREQ_657M / AR0822_BPP12 * 2 *AR0822_LANES,
|
|
.vc[PAD0] = V4L2_MBUS_CSI2_CHANNEL_1,
|
|
.vc[PAD1] = V4L2_MBUS_CSI2_CHANNEL_0,//L->csi wr0
|
|
.vc[PAD2] = V4L2_MBUS_CSI2_CHANNEL_1,
|
|
.vc[PAD3] = V4L2_MBUS_CSI2_CHANNEL_1,//M->csi wr2
|
|
},
|
|
|
|
{
|
|
.bus_fmt = MEDIA_BUS_FMT_SGRBG12_1X12,
|
|
.width = 3840,
|
|
.height = 2160,
|
|
.max_fps = {
|
|
.numerator = 10000,
|
|
.denominator = 250000,
|
|
},
|
|
.exp_def = 0x0080,
|
|
.hts_def = 0x0B98*4-3840,//
|
|
.vts_def = 0x0980,//0x0888,//
|
|
.reg_list = ar0822_hdr12bit_3840x2160_25fps_regs,
|
|
.hdr_mode = HDR_X2,
|
|
.mipi_freq = MIPI_FREQ_823M_INDEX,
|
|
.mipi_rate = MIPI_FREQ_823M / AR0822_BPP12 * 2 * AR0822_LANES,
|
|
.vc[PAD0] = V4L2_MBUS_CSI2_CHANNEL_1,
|
|
.vc[PAD1] = V4L2_MBUS_CSI2_CHANNEL_0,
|
|
.vc[PAD2] = V4L2_MBUS_CSI2_CHANNEL_1,//M->csi wr0
|
|
.vc[PAD3] = V4L2_MBUS_CSI2_CHANNEL_1,//M->csi wr2
|
|
},
|
|
|
|
{
|
|
.bus_fmt = MEDIA_BUS_FMT_SGRBG12_1X12,
|
|
.width = 3840,
|
|
.height = 2160,
|
|
.max_fps = {
|
|
.numerator = 10000,
|
|
.denominator = 300000,
|
|
},
|
|
.exp_def = 0x0240,
|
|
.hts_def = 0x3430,//for HDR, hblank is 4*LINE_LENGTH_PCK_-WIDTH*2, so hts is 4*LINE_LENGTH_PCK_-WIDTH. param not used by RK.
|
|
.vts_def = 0x9F3,//should be set correctly,
|
|
.reg_list = ar0822_hdr12bit_3840x2160_30fps_regs,
|
|
.hdr_mode = HDR_X2,
|
|
.mipi_freq = MIPI_FREQ_986M_INDEX,
|
|
.mipi_rate = MIPI_FREQ_986M / AR0822_BPP12 * 2 * AR0822_LANES,
|
|
.vc[PAD1] = V4L2_MBUS_CSI2_CHANNEL_0,
|
|
.vc[PAD3] = V4L2_MBUS_CSI2_CHANNEL_1,//M->csi wr0
|
|
},
|
|
|
|
|
|
};
|
|
|
|
|
|
/* use ar0822_enable_test_pattern to config test pattern mode here, open.k */
|
|
static const char * const ar0822_test_pattern_menu[] = {
|
|
"Disabled",
|
|
"Vertical Color Bar Type 1",
|
|
"Vertical Color Bar Type 2",
|
|
"Vertical Color Bar Type 3",
|
|
"Vertical Color Bar Type 4"
|
|
};
|
|
|
|
static int __ar0822_power_on(struct ar0822 *ar0822);
|
|
|
|
/* Write registers up to 4 at a time */
|
|
static int ar0822_write_reg(struct i2c_client *client, u16 reg,
|
|
u32 len, u32 val)
|
|
{
|
|
u32 buf_i, val_i;
|
|
u8 buf[6];
|
|
u8 *val_p;
|
|
__be32 val_be;
|
|
|
|
if (len > 4)
|
|
return -EINVAL;
|
|
|
|
buf[0] = reg >> 8;
|
|
buf[1] = reg & 0xff;
|
|
|
|
val_be = cpu_to_be32(val);
|
|
val_p = (u8 *)&val_be;
|
|
buf_i = 2;
|
|
val_i = 4 - len;
|
|
|
|
while (val_i < 4)
|
|
buf[buf_i++] = val_p[val_i++];
|
|
|
|
if (i2c_master_send(client, buf, len + 2) != len + 2)
|
|
return -EIO;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int ar0822_write_array(struct i2c_client *client,
|
|
const struct regval *regs)
|
|
{
|
|
u32 i;
|
|
int ret = 0;
|
|
|
|
for (i = 0; ret == 0 && regs[i].addr != REG_NULL; i++) {
|
|
if (unlikely(regs[i].addr == REG_DELAY))
|
|
usleep_range(regs[i].val, regs[i].val * 2);
|
|
else
|
|
ret |= ar0822_write_reg(client, regs[i].addr,
|
|
AR0822_REG_VALUE_16BIT, regs[i].val);
|
|
}
|
|
return ret;
|
|
}
|
|
|
|
/* Read registers up to 4 at a time */
|
|
static int ar0822_read_reg(struct i2c_client *client,
|
|
u16 reg,
|
|
unsigned int len,
|
|
u32 *val)
|
|
{
|
|
struct i2c_msg msgs[2];
|
|
u8 *data_be_p;
|
|
__be32 data_be = 0;
|
|
__be16 reg_addr_be = cpu_to_be16(reg);
|
|
int ret;
|
|
|
|
if (len > 4 || !len)
|
|
return -EINVAL;
|
|
|
|
data_be_p = (u8 *)&data_be;
|
|
/* Write register address */
|
|
msgs[0].addr = client->addr;
|
|
msgs[0].flags = 0;
|
|
msgs[0].len = 2;
|
|
msgs[0].buf = (u8 *)®_addr_be;
|
|
|
|
/* Read data from register */
|
|
msgs[1].addr = client->addr;
|
|
msgs[1].flags = I2C_M_RD;
|
|
msgs[1].len = len;
|
|
msgs[1].buf = &data_be_p[4 - len];
|
|
|
|
ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
|
|
if (ret != ARRAY_SIZE(msgs))
|
|
return -EIO;
|
|
|
|
*val = be32_to_cpu(data_be);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int ar0822_get_reso_dist(const struct ar0822_mode *mode,
|
|
struct v4l2_mbus_framefmt *framefmt)
|
|
{
|
|
return abs(mode->width - framefmt->width) +
|
|
abs(mode->height - framefmt->height);
|
|
}
|
|
|
|
static const struct ar0822_mode *
|
|
ar0822_find_best_fit(struct ar0822 *ar0822, struct v4l2_subdev_format *fmt)
|
|
{
|
|
struct v4l2_mbus_framefmt *framefmt = &fmt->format;
|
|
int dist;
|
|
int cur_best_fit = 0;
|
|
int cur_best_fit_dist = -1;
|
|
unsigned int i;
|
|
|
|
for (i = 0; i < ar0822->cfg_num; i++) {
|
|
dist = ar0822_get_reso_dist(&supported_modes[i], framefmt);
|
|
if ((cur_best_fit_dist == -1 || dist < cur_best_fit_dist) &&
|
|
(supported_modes[i].bus_fmt == framefmt->code)) {
|
|
cur_best_fit_dist = dist;
|
|
cur_best_fit = i;
|
|
}
|
|
}
|
|
|
|
return &supported_modes[cur_best_fit];
|
|
}
|
|
static int ar0822_set_rates(struct ar0822 *ar0822)
|
|
{
|
|
const struct ar0822_mode *mode = ar0822->cur_mode;
|
|
s64 h_blank, vblank_def;
|
|
int ret = 0;
|
|
|
|
h_blank = mode->hts_def - mode->width;
|
|
dev_err(&ar0822->client->dev,
|
|
"set format hblank is (%lld), mipi freq: %d, rate: %d\n",
|
|
h_blank, mode->mipi_freq,mode->mipi_rate);
|
|
__v4l2_ctrl_modify_range(ar0822->hblank, h_blank,
|
|
h_blank, 1, h_blank);
|
|
vblank_def = mode->vts_def - mode->height;
|
|
__v4l2_ctrl_modify_range(ar0822->vblank, vblank_def,
|
|
AR0822_VTS_MAX - mode->height,
|
|
1, vblank_def);
|
|
|
|
__v4l2_ctrl_s_ctrl_int64(ar0822->pixel_rate,
|
|
mode->mipi_rate);
|
|
__v4l2_ctrl_s_ctrl(ar0822->link_freq,
|
|
mode->mipi_freq);
|
|
|
|
return ret;
|
|
}
|
|
/* setup sensor work format to determine the MIPI speed, open.k */
|
|
static int ar0822_set_fmt(struct v4l2_subdev *sd,
|
|
struct v4l2_subdev_pad_config *cfg,
|
|
struct v4l2_subdev_format *fmt)
|
|
{
|
|
struct ar0822 *ar0822 = to_ar0822(sd);
|
|
const struct ar0822_mode *mode;
|
|
|
|
mutex_lock(&ar0822->mutex);
|
|
|
|
mode = ar0822_find_best_fit(ar0822, fmt);
|
|
fmt->format.code = mode->bus_fmt;
|
|
fmt->format.width = mode->width;
|
|
fmt->format.height = mode->height;
|
|
fmt->format.field = V4L2_FIELD_NONE;
|
|
if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
|
|
#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
|
|
*v4l2_subdev_get_try_format(sd, cfg, fmt->pad) = fmt->format;
|
|
#else
|
|
mutex_unlock(&ar0822->mutex);
|
|
return -ENOTTY;
|
|
#endif
|
|
} else {
|
|
ar0822->cur_mode = mode;
|
|
ar0822_set_rates(ar0822);
|
|
}
|
|
|
|
mutex_unlock(&ar0822->mutex);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int ar0822_get_fmt(struct v4l2_subdev *sd,
|
|
struct v4l2_subdev_pad_config *cfg,
|
|
struct v4l2_subdev_format *fmt)
|
|
{
|
|
struct ar0822 *ar0822 = to_ar0822(sd);
|
|
const struct ar0822_mode *mode = ar0822->cur_mode;
|
|
|
|
mutex_lock(&ar0822->mutex);
|
|
if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
|
|
#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
|
|
fmt->format = *v4l2_subdev_get_try_format(sd, cfg, fmt->pad);
|
|
#else
|
|
mutex_unlock(&ar0822->mutex);
|
|
return -ENOTTY;
|
|
#endif
|
|
} else {
|
|
fmt->format.width = mode->width;
|
|
fmt->format.height = mode->height;
|
|
fmt->format.code = mode->bus_fmt;
|
|
fmt->format.field = V4L2_FIELD_NONE;
|
|
if (fmt->pad < PAD_MAX && mode->hdr_mode != NO_HDR)
|
|
fmt->reserved[0] = mode->vc[fmt->pad];
|
|
else
|
|
fmt->reserved[0] = mode->vc[PAD0];
|
|
}
|
|
mutex_unlock(&ar0822->mutex);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int ar0822_enum_mbus_code(struct v4l2_subdev *sd,
|
|
struct v4l2_subdev_pad_config *cfg,
|
|
struct v4l2_subdev_mbus_code_enum *code)
|
|
{
|
|
struct ar0822 *ar0822 = to_ar0822(sd);
|
|
|
|
if (code->index >= ar0822->cfg_num)
|
|
return -EINVAL;
|
|
code->code = supported_modes[code->index].bus_fmt;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int ar0822_enum_frame_sizes(struct v4l2_subdev *sd,
|
|
struct v4l2_subdev_pad_config *cfg,
|
|
struct v4l2_subdev_frame_size_enum *fse)
|
|
{
|
|
struct ar0822 *ar0822 = to_ar0822(sd);
|
|
|
|
if (fse->index >= ar0822->cfg_num)
|
|
return -EINVAL;
|
|
|
|
if (fse->code != supported_modes[fse->index].bus_fmt)
|
|
return -EINVAL;
|
|
|
|
fse->min_width = supported_modes[fse->index].width;
|
|
fse->max_width = supported_modes[fse->index].width;
|
|
fse->max_height = supported_modes[fse->index].height;
|
|
fse->min_height = supported_modes[fse->index].height;
|
|
|
|
return 0;
|
|
}
|
|
/* use ar0822_enable_test_pattern to config test pattern mode here, open.k */
|
|
static int ar0822_enable_test_pattern(struct ar0822 *ar0822, u32 pattern)
|
|
{
|
|
int ret = 0;
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int ar0822_g_frame_interval(struct v4l2_subdev *sd,
|
|
struct v4l2_subdev_frame_interval *fi)
|
|
{
|
|
struct ar0822 *ar0822 = to_ar0822(sd);
|
|
const struct ar0822_mode *mode = ar0822->cur_mode;
|
|
|
|
mutex_lock(&ar0822->mutex);
|
|
fi->interval = mode->max_fps;
|
|
mutex_unlock(&ar0822->mutex);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int ar0822_g_mbus_config(struct v4l2_subdev *sd, unsigned int pad_id,
|
|
struct v4l2_mbus_config *config)
|
|
{
|
|
struct ar0822 *ar0822 = to_ar0822(sd);
|
|
const struct ar0822_mode *mode = ar0822->cur_mode;
|
|
u32 val = 0;
|
|
|
|
val = 1 << (AR0822_LANES - 1) |
|
|
V4L2_MBUS_CSI2_CHANNEL_0 |
|
|
V4L2_MBUS_CSI2_CONTINUOUS_CLOCK;
|
|
if (mode->hdr_mode != NO_HDR)
|
|
val |= V4L2_MBUS_CSI2_CHANNEL_1;
|
|
if (mode->hdr_mode == HDR_X3)
|
|
val |= V4L2_MBUS_CSI2_CHANNEL_2;
|
|
|
|
config->type = V4L2_MBUS_CSI2_DPHY;
|
|
config->flags = val;
|
|
|
|
return 0;
|
|
}
|
|
|
|
|
|
static void ar0822_get_module_inf(struct ar0822 *ar0822,
|
|
struct rkmodule_inf *inf)
|
|
{
|
|
memset(inf, 0, sizeof(*inf));
|
|
strlcpy(inf->base.sensor, AR0822_NAME, sizeof(inf->base.sensor));
|
|
strlcpy(inf->base.module, ar0822->module_name,
|
|
sizeof(inf->base.module));
|
|
strlcpy(inf->base.lens, ar0822->len_name, sizeof(inf->base.lens));
|
|
}
|
|
|
|
static int ar0822_set_hdrae(struct ar0822 *ar0822,
|
|
struct preisp_hdrae_exp_s *ae)
|
|
{
|
|
u32 l_exp_time, m_exp_time, s_exp_time;
|
|
u32 l_a_gain, m_a_gain, s_a_gain;
|
|
int ret = 0;
|
|
u8 l_cg_mode = 0;
|
|
u8 m_cg_mode = 0;
|
|
u8 s_cg_mode = 0;
|
|
u32 gain_val = 0;
|
|
|
|
if (!ar0822->has_init_exp && !ar0822->streaming) {
|
|
ar0822->init_hdrae_exp = *ae;
|
|
ar0822->has_init_exp = true;
|
|
dev_err(&ar0822->client->dev, "ar0822 don't stream, record exp for hdr!\n");
|
|
return ret;
|
|
}
|
|
l_exp_time = ae->long_exp_reg;
|
|
m_exp_time = ae->middle_exp_reg;
|
|
s_exp_time = ae->short_exp_reg;
|
|
l_a_gain = ae->long_gain_reg;
|
|
m_a_gain = ae->middle_gain_reg;
|
|
s_a_gain = ae->short_gain_reg;
|
|
l_cg_mode = ae->long_cg_mode;
|
|
m_cg_mode = ae->middle_cg_mode;
|
|
s_cg_mode = ae->short_cg_mode;
|
|
dev_dbg(&ar0822->client->dev,
|
|
"Li-HDR irev exp req: L_exp: 0x%x, 0x%x, M_exp: 0x%x, 0x%x S_exp: 0x%x, 0x%x\n",
|
|
l_exp_time, l_a_gain,
|
|
m_exp_time, m_a_gain,
|
|
s_exp_time, s_a_gain);
|
|
|
|
if (ar0822->cur_mode->hdr_mode == HDR_X2) {
|
|
//2 stagger
|
|
l_a_gain = m_a_gain;
|
|
l_exp_time = m_exp_time;
|
|
l_cg_mode = m_cg_mode;
|
|
m_a_gain = s_a_gain;
|
|
m_exp_time = s_exp_time;
|
|
m_cg_mode = s_cg_mode;
|
|
}
|
|
|
|
l_a_gain = (l_a_gain > AR0822_GAIN_MAX) ? AR0822_GAIN_MAX:l_a_gain;
|
|
m_a_gain = (m_a_gain > AR0822_GAIN_MAX) ? AR0822_GAIN_MAX:m_a_gain;
|
|
s_a_gain = (s_a_gain > AR0822_GAIN_MAX) ? AR0822_GAIN_MAX:s_a_gain;
|
|
l_a_gain = (l_a_gain < AR0822_GAIN_MIN) ? AR0822_GAIN_MIN:l_a_gain;
|
|
m_a_gain = (m_a_gain < AR0822_GAIN_MIN) ? AR0822_GAIN_MIN:m_a_gain;
|
|
s_a_gain = (s_a_gain < AR0822_GAIN_MIN) ? AR0822_GAIN_MIN:s_a_gain;
|
|
|
|
gain_val = l_a_gain;
|
|
ret |= ar0822_write_reg(ar0822->client,
|
|
AR0822_GROUP_UPDATE_ADDRESS,
|
|
AR0822_REG_VALUE_16BIT,
|
|
AR0822_GROUP_UPDATE_START_DATA);
|
|
|
|
ret |= ar0822_write_reg(ar0822->client,
|
|
AR0822_REG_GAIN,
|
|
AR0822_REG_VALUE_16BIT, gain_val);
|
|
|
|
gain_val = m_a_gain;
|
|
ret |= ar0822_write_reg(ar0822->client,
|
|
AR0822_REG_GAIN2,
|
|
AR0822_REG_VALUE_16BIT, gain_val);
|
|
|
|
if (ar0822->cur_mode->hdr_mode == HDR_X3) {
|
|
gain_val = s_a_gain;
|
|
ret |= ar0822_write_reg(ar0822->client,
|
|
AR0822_REG_GAIN3,
|
|
AR0822_REG_VALUE_16BIT, gain_val);
|
|
}
|
|
ret |= ar0822_write_reg(ar0822->client,
|
|
AR0822_REG_EXP,
|
|
AR0822_REG_VALUE_16BIT,
|
|
l_exp_time);//fixed ratio 1/16 is used here, T2 and T3 is from ratio* T1 or ratio^2* T1.
|
|
|
|
ret |= ar0822_write_reg(ar0822->client,
|
|
AR0822_GROUP_UPDATE_ADDRESS,
|
|
AR0822_REG_VALUE_16BIT,
|
|
AR0822_GROUP_UPDATE_END_DATA);
|
|
|
|
dev_dbg(&ar0822->client->dev, "ar0822_set_hdrae exp 0x%x\n",l_exp_time);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int ar0822_set_conversion_gain(struct ar0822 *ar0822, u32 *cg)
|
|
{
|
|
int ret = 0;
|
|
return ret;
|
|
}
|
|
|
|
#ifdef USED_SYS_DEBUG
|
|
//ag: echo 0 > /sys/devices/platform/ff510000.i2c/i2c-1/1-0036-1/cam_s_cg
|
|
static ssize_t set_conversion_gain_status(struct device *dev,
|
|
struct device_attribute *attr,
|
|
const char *buf,
|
|
size_t count)
|
|
{
|
|
struct i2c_client *client = to_i2c_client(dev);
|
|
struct v4l2_subdev *sd = i2c_get_clientdata(client);
|
|
struct ar0822 *ar0822 = to_ar0822(sd);
|
|
int status = 0;
|
|
int ret = 0;
|
|
|
|
ret = kstrtoint(buf, 0, &status);
|
|
if (!ret && status >= 0 && status < 2)
|
|
ar0822_set_conversion_gain(ar0822, &status);
|
|
else
|
|
dev_err(dev, "input 0 for LCG, 1 for HCG, cur %d\n", status);
|
|
return count;
|
|
}
|
|
|
|
static struct device_attribute attributes[] = {
|
|
__ATTR(cam_s_cg, S_IWUSR, NULL, set_conversion_gain_status),
|
|
};
|
|
|
|
static int add_sysfs_interfaces(struct device *dev)
|
|
{
|
|
int i;
|
|
|
|
for (i = 0; i < ARRAY_SIZE(attributes); i++)
|
|
if (device_create_file(dev, attributes + i))
|
|
goto undo;
|
|
return 0;
|
|
undo:
|
|
for (i--; i >= 0 ; i--)
|
|
device_remove_file(dev, attributes + i);
|
|
dev_err(dev, "%s: failed to create sysfs interface\n", __func__);
|
|
return -ENODEV;
|
|
}
|
|
#endif
|
|
|
|
static int ar0822_get_channel_info(struct ar0822 *ar0822, struct rkmodule_channel_info *ch_info)
|
|
{
|
|
if (ch_info->index < PAD0 || ch_info->index >= PAD_MAX)
|
|
return -EINVAL;
|
|
ch_info->vc = ar0822->cur_mode->vc[ch_info->index];
|
|
ch_info->width = ar0822->cur_mode->width;
|
|
ch_info->height = ar0822->cur_mode->height;
|
|
ch_info->bus_fmt = ar0822->cur_mode->bus_fmt;
|
|
return 0;
|
|
}
|
|
|
|
static long ar0822_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
|
|
{
|
|
struct ar0822 *ar0822 = to_ar0822(sd);
|
|
struct rkmodule_hdr_cfg *hdr_cfg;
|
|
struct rkmodule_channel_info *ch_info;
|
|
long ret = 0;
|
|
u32 i, h, w;
|
|
u32 stream = 0;
|
|
|
|
switch (cmd) {
|
|
case PREISP_CMD_SET_HDRAE_EXP:
|
|
ar0822_set_hdrae(ar0822, arg);
|
|
break;
|
|
case RKMODULE_SET_HDR_CFG:
|
|
hdr_cfg = (struct rkmodule_hdr_cfg *)arg;
|
|
w = ar0822->cur_mode->width;
|
|
h = ar0822->cur_mode->height;
|
|
for (i = 0; i < ar0822->cfg_num; i++) {
|
|
if (w == supported_modes[i].width &&
|
|
h == supported_modes[i].height &&
|
|
supported_modes[i].hdr_mode == hdr_cfg->hdr_mode) {
|
|
ar0822->cur_mode = &supported_modes[i];
|
|
break;
|
|
}
|
|
}
|
|
if (i == ar0822->cfg_num) {
|
|
dev_err(&ar0822->client->dev,
|
|
"not find hdr mode:%d %dx%d config\n",
|
|
hdr_cfg->hdr_mode, w, h);
|
|
ret = -EINVAL;
|
|
} else {
|
|
w = ar0822->cur_mode->hts_def - ar0822->cur_mode->width;
|
|
h = ar0822->cur_mode->vts_def - ar0822->cur_mode->height;
|
|
dev_info(&ar0822->client->dev,
|
|
"set hdr cfg, hblank is (%d)\n", w);
|
|
__v4l2_ctrl_modify_range(ar0822->hblank, w, w, 1, w);
|
|
__v4l2_ctrl_modify_range(ar0822->vblank, h,
|
|
AR0822_VTS_MAX - ar0822->cur_mode->height,
|
|
1, h);
|
|
dev_info(&ar0822->client->dev,
|
|
"sensor mode: %d\n",
|
|
ar0822->cur_mode->hdr_mode);
|
|
}
|
|
ar0822_set_rates(ar0822);
|
|
break;
|
|
case RKMODULE_GET_MODULE_INFO:
|
|
ar0822_get_module_inf(ar0822, (struct rkmodule_inf *)arg);
|
|
break;
|
|
case RKMODULE_GET_HDR_CFG:
|
|
hdr_cfg = (struct rkmodule_hdr_cfg *)arg;
|
|
hdr_cfg->esp.mode = HDR_NORMAL_VC;
|
|
hdr_cfg->hdr_mode = ar0822->cur_mode->hdr_mode;
|
|
break;
|
|
case RKMODULE_SET_CONVERSION_GAIN:
|
|
ret = 0;//ar0822_set_conversion_gain(ar0822, (u32 *)arg);
|
|
break;
|
|
case RKMODULE_SET_QUICK_STREAM:
|
|
|
|
stream = *((u32 *)arg);
|
|
|
|
if (stream)
|
|
ret = ar0822_write_reg(ar0822->client, AR0822_REG_CTRL_MODE,
|
|
AR0822_REG_VALUE_16BIT, AR0822_MODE_STREAMING);
|
|
else
|
|
ret = ar0822_write_reg(ar0822->client, AR0822_REG_CTRL_MODE,
|
|
AR0822_REG_VALUE_16BIT, AR0822_MODE_SW_STANDBY);
|
|
break;
|
|
case RKMODULE_GET_CHANNEL_INFO:
|
|
ch_info = (struct rkmodule_channel_info *)arg;
|
|
ret = ar0822_get_channel_info(ar0822, ch_info);
|
|
break;
|
|
default:
|
|
ret = -ENOIOCTLCMD;
|
|
break;
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
|
|
#ifdef CONFIG_COMPAT
|
|
static long ar0822_compat_ioctl32(struct v4l2_subdev *sd,
|
|
unsigned int cmd, unsigned long arg)
|
|
{
|
|
void __user *up = compat_ptr(arg);
|
|
struct rkmodule_inf *inf;
|
|
struct rkmodule_awb_cfg *cfg;
|
|
struct rkmodule_hdr_cfg *hdr;
|
|
struct preisp_hdrae_exp_s *hdrae;
|
|
struct rkmodule_channel_info *ch_info;
|
|
long ret;
|
|
u32 cg = 0;
|
|
u32 stream = 0;
|
|
|
|
switch (cmd) {
|
|
case RKMODULE_GET_MODULE_INFO:
|
|
inf = kzalloc(sizeof(*inf), GFP_KERNEL);
|
|
if (!inf) {
|
|
ret = -ENOMEM;
|
|
return ret;
|
|
}
|
|
|
|
ret = ar0822_ioctl(sd, cmd, inf);
|
|
if (!ret)
|
|
ret = copy_to_user(up, inf, sizeof(*inf));
|
|
kfree(inf);
|
|
break;
|
|
case RKMODULE_AWB_CFG:
|
|
cfg = kzalloc(sizeof(*cfg), GFP_KERNEL);
|
|
if (!cfg) {
|
|
ret = -ENOMEM;
|
|
return ret;
|
|
}
|
|
|
|
ret = copy_from_user(cfg, up, sizeof(*cfg));
|
|
if (!ret)
|
|
ret = ar0822_ioctl(sd, cmd, cfg);
|
|
kfree(cfg);
|
|
break;
|
|
case RKMODULE_GET_HDR_CFG:
|
|
hdr = kzalloc(sizeof(*hdr), GFP_KERNEL);
|
|
if (!hdr) {
|
|
ret = -ENOMEM;
|
|
return ret;
|
|
}
|
|
|
|
ret = ar0822_ioctl(sd, cmd, hdr);
|
|
if (!ret)
|
|
ret = copy_to_user(up, hdr, sizeof(*hdr));
|
|
kfree(hdr);
|
|
break;
|
|
case RKMODULE_SET_HDR_CFG:
|
|
hdr = kzalloc(sizeof(*hdr), GFP_KERNEL);
|
|
if (!hdr) {
|
|
ret = -ENOMEM;
|
|
return ret;
|
|
}
|
|
|
|
ret = copy_from_user(hdr, up, sizeof(*hdr));
|
|
if (!ret)
|
|
ret = ar0822_ioctl(sd, cmd, hdr);
|
|
kfree(hdr);
|
|
break;
|
|
case PREISP_CMD_SET_HDRAE_EXP:
|
|
hdrae = kzalloc(sizeof(*hdrae), GFP_KERNEL);
|
|
if (!hdrae) {
|
|
ret = -ENOMEM;
|
|
return ret;
|
|
}
|
|
|
|
ret = copy_from_user(hdrae, up, sizeof(*hdrae));
|
|
if (!ret)
|
|
ret = ar0822_ioctl(sd, cmd, hdrae);
|
|
kfree(hdrae);
|
|
break;
|
|
case RKMODULE_SET_CONVERSION_GAIN:
|
|
ret = copy_from_user(&cg, up, sizeof(cg));
|
|
if (!ret)
|
|
ret = ar0822_ioctl(sd, cmd, &cg);
|
|
break;
|
|
case RKMODULE_SET_QUICK_STREAM:
|
|
ret = copy_from_user(&stream, up, sizeof(u32));
|
|
if (!ret)
|
|
ret = ar0822_ioctl(sd, cmd, &stream);
|
|
break;
|
|
case RKMODULE_GET_CHANNEL_INFO:
|
|
ch_info = kzalloc(sizeof(*ch_info), GFP_KERNEL);
|
|
if (!ch_info) {
|
|
ret = -ENOMEM;
|
|
return ret;
|
|
}
|
|
|
|
ret = ar0822_ioctl(sd, cmd, ch_info);
|
|
if (!ret) {
|
|
ret = copy_to_user(up, ch_info, sizeof(*ch_info));
|
|
if (ret)
|
|
ret = -EFAULT;
|
|
}
|
|
kfree(ch_info);
|
|
break;
|
|
default:
|
|
ret = -ENOIOCTLCMD;
|
|
break;
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
#endif
|
|
|
|
static int __ar0822_start_stream(struct ar0822 *ar0822)
|
|
{
|
|
int ret;
|
|
|
|
if (!ar0822->is_thunderboot) {
|
|
ret = ar0822_write_reg(ar0822->client,
|
|
AR0822_SOFTWARE_RESET_REG,
|
|
AR0822_REG_VALUE_16BIT,
|
|
0x0001);
|
|
usleep_range(100000, 200000);
|
|
ret = ar0822_write_array(ar0822->client, ar0822->cur_mode->reg_list);
|
|
if (ret)
|
|
return ret;
|
|
}
|
|
|
|
/* In case these controls are set before streaming */
|
|
ret = __v4l2_ctrl_handler_setup(&ar0822->ctrl_handler);
|
|
if (ret)
|
|
return ret;
|
|
if (ar0822->has_init_exp && ar0822->cur_mode->hdr_mode != NO_HDR) {
|
|
ret = ar0822_ioctl(&ar0822->subdev, PREISP_CMD_SET_HDRAE_EXP, &ar0822->init_hdrae_exp);
|
|
if (ret) {
|
|
dev_err(&ar0822->client->dev,
|
|
"init exp fail in hdr mode\n");
|
|
return ret;
|
|
}
|
|
dev_err(&ar0822->client->dev,
|
|
"init exp success in hdr mode\n");
|
|
}
|
|
return ar0822_write_reg(ar0822->client, AR0822_REG_CTRL_MODE,
|
|
AR0822_REG_VALUE_16BIT, AR0822_MODE_STREAMING);
|
|
}
|
|
|
|
static int __ar0822_stop_stream(struct ar0822 *ar0822)
|
|
{
|
|
ar0822->has_init_exp = false;
|
|
if (ar0822->is_thunderboot)
|
|
ar0822->is_first_streamoff = true;
|
|
return ar0822_write_reg(ar0822->client, AR0822_REG_CTRL_MODE,
|
|
AR0822_REG_VALUE_16BIT, AR0822_MODE_SW_STANDBY);
|
|
}
|
|
|
|
static int ar0822_s_stream(struct v4l2_subdev *sd, int on)
|
|
{
|
|
struct ar0822 *ar0822 = to_ar0822(sd);
|
|
struct i2c_client *client = ar0822->client;
|
|
int ret = 0;
|
|
|
|
mutex_lock(&ar0822->mutex);
|
|
on = !!on;
|
|
if (on == ar0822->streaming)
|
|
goto unlock_and_return;
|
|
if (on) {
|
|
if (ar0822->is_thunderboot && rkisp_tb_get_state() == RKISP_TB_NG) {
|
|
ar0822->is_thunderboot = false;
|
|
__ar0822_power_on(ar0822);
|
|
}
|
|
ret = pm_runtime_get_sync(&client->dev);
|
|
if (ret < 0) {
|
|
pm_runtime_put_noidle(&client->dev);
|
|
goto unlock_and_return;
|
|
}
|
|
|
|
ret = __ar0822_start_stream(ar0822);
|
|
if (ret) {
|
|
v4l2_err(sd, "start stream failed while write regs\n");
|
|
pm_runtime_put(&client->dev);
|
|
goto unlock_and_return;
|
|
}
|
|
} else {
|
|
__ar0822_stop_stream(ar0822);
|
|
pm_runtime_put(&client->dev);
|
|
}
|
|
ar0822->streaming = on;
|
|
|
|
|
|
unlock_and_return:
|
|
mutex_unlock(&ar0822->mutex);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int ar0822_s_power(struct v4l2_subdev *sd, int on)
|
|
{
|
|
struct ar0822 *ar0822 = to_ar0822(sd);
|
|
struct i2c_client *client = ar0822->client;
|
|
int ret = 0;
|
|
|
|
mutex_lock(&ar0822->mutex);
|
|
/* If the power state is not modified - no work to do. */
|
|
if (ar0822->power_on == !!on)
|
|
goto unlock_and_return;
|
|
|
|
if (on) {
|
|
ret = pm_runtime_get_sync(&client->dev);
|
|
if (ret < 0) {
|
|
pm_runtime_put_noidle(&client->dev);
|
|
goto unlock_and_return;
|
|
}
|
|
|
|
if (!ar0822->is_thunderboot) {
|
|
ret |= ar0822_write_reg(ar0822->client,
|
|
AR0822_SOFTWARE_RESET_REG,
|
|
AR0822_REG_VALUE_16BIT,
|
|
0x0001);
|
|
usleep_range(100, 200);
|
|
}
|
|
|
|
ar0822->power_on = true;
|
|
} else {
|
|
pm_runtime_put(&client->dev);
|
|
ar0822->power_on = false;
|
|
}
|
|
|
|
unlock_and_return:
|
|
mutex_unlock(&ar0822->mutex);
|
|
|
|
return ret;
|
|
}
|
|
|
|
/* Calculate the delay in us by clock rate and clock cycles */
|
|
static inline u32 ar0822_cal_delay(u32 cycles)
|
|
{
|
|
return DIV_ROUND_UP(cycles, AR0822_XVCLK_FREQ / 1000 / 1000);
|
|
}
|
|
|
|
static int __ar0822_power_on(struct ar0822 *ar0822) /* sensor power on config, need check power, MCLK, GPIO etc,,, need go to .dts file to change the config; open.k */
|
|
{
|
|
int ret;
|
|
u32 delay_us;
|
|
struct device *dev = &ar0822->client->dev;
|
|
|
|
if (ar0822->is_thunderboot)
|
|
return 0;
|
|
|
|
if (!IS_ERR_OR_NULL(ar0822->pins_default)) {
|
|
ret = pinctrl_select_state(ar0822->pinctrl,
|
|
ar0822->pins_default);
|
|
if (ret < 0)
|
|
dev_err(dev, "could not set pins\n");
|
|
}
|
|
ret = clk_set_rate(ar0822->xvclk, AR0822_XVCLK_FREQ);
|
|
if (ret < 0)
|
|
dev_warn(dev, "Failed to set xvclk rate (24MHz)\n");
|
|
if (clk_get_rate(ar0822->xvclk) != AR0822_XVCLK_FREQ)
|
|
dev_warn(dev, "xvclk mismatched, modes are based on 24MHz\n");
|
|
ret = clk_prepare_enable(ar0822->xvclk);
|
|
if (ret < 0) {
|
|
dev_err(dev, "Failed to enable xvclk\n");
|
|
return ret;
|
|
}
|
|
if (!IS_ERR(ar0822->reset_gpio))
|
|
gpiod_direction_output(ar0822->reset_gpio, 1);
|
|
|
|
ret = regulator_bulk_enable(AR0822_NUM_SUPPLIES, ar0822->supplies);
|
|
if (ret < 0) {
|
|
dev_err(dev, "Failed to enable regulators\n");
|
|
goto disable_clk;
|
|
}
|
|
|
|
if (!IS_ERR(ar0822->reset_gpio))
|
|
gpiod_direction_output(ar0822->reset_gpio, 0);
|
|
|
|
usleep_range(500, 1000);
|
|
if (!IS_ERR(ar0822->pwdn_gpio))
|
|
gpiod_direction_output(ar0822->pwdn_gpio, 1);
|
|
/*
|
|
* There is no need to wait for the delay of RC circuit
|
|
* if the reset signal is directly controlled by GPIO.
|
|
*/
|
|
if (!IS_ERR(ar0822->reset_gpio))
|
|
usleep_range(6000, 8000);
|
|
else
|
|
usleep_range(12000, 16000);
|
|
|
|
/* 8192 cycles prior to first SCCB transaction */
|
|
delay_us = ar0822_cal_delay(8192);
|
|
usleep_range(delay_us, delay_us * 2);
|
|
|
|
return 0;
|
|
|
|
disable_clk:
|
|
clk_disable_unprepare(ar0822->xvclk);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static void __ar0822_power_off(struct ar0822 *ar0822)
|
|
{
|
|
int ret;
|
|
struct device *dev = &ar0822->client->dev;
|
|
|
|
if (ar0822->is_thunderboot) {
|
|
if (ar0822->is_first_streamoff) {
|
|
ar0822->is_thunderboot = false;
|
|
ar0822->is_first_streamoff = false;
|
|
} else {
|
|
return;
|
|
}
|
|
}
|
|
|
|
if (!IS_ERR(ar0822->pwdn_gpio))
|
|
gpiod_direction_output(ar0822->pwdn_gpio, 0);
|
|
|
|
clk_disable_unprepare(ar0822->xvclk);
|
|
|
|
if (!IS_ERR(ar0822->reset_gpio))
|
|
gpiod_direction_output(ar0822->reset_gpio, 0);
|
|
if (!IS_ERR_OR_NULL(ar0822->pins_sleep)) {
|
|
ret = pinctrl_select_state(ar0822->pinctrl,
|
|
ar0822->pins_sleep);
|
|
if (ret < 0)
|
|
dev_dbg(dev, "could not set pins\n");
|
|
}
|
|
|
|
if (ar0822->is_thunderboot_ng) {
|
|
ar0822->is_thunderboot_ng = false;
|
|
regulator_bulk_disable(AR0822_NUM_SUPPLIES, ar0822->supplies);
|
|
}
|
|
}
|
|
|
|
static int ar0822_runtime_resume(struct device *dev)
|
|
{
|
|
struct i2c_client *client = to_i2c_client(dev);
|
|
struct v4l2_subdev *sd = i2c_get_clientdata(client);
|
|
struct ar0822 *ar0822 = to_ar0822(sd);
|
|
|
|
return __ar0822_power_on(ar0822);
|
|
}
|
|
|
|
static int ar0822_runtime_suspend(struct device *dev)
|
|
{
|
|
struct i2c_client *client = to_i2c_client(dev);
|
|
struct v4l2_subdev *sd = i2c_get_clientdata(client);
|
|
struct ar0822 *ar0822 = to_ar0822(sd);
|
|
|
|
__ar0822_power_off(ar0822);
|
|
|
|
return 0;
|
|
}
|
|
|
|
#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
|
|
static int ar0822_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
|
|
{
|
|
struct ar0822 *ar0822 = to_ar0822(sd);
|
|
struct v4l2_mbus_framefmt *try_fmt =
|
|
v4l2_subdev_get_try_format(sd, fh->pad, 0);
|
|
const struct ar0822_mode *def_mode = &supported_modes[0];
|
|
mutex_lock(&ar0822->mutex);
|
|
/* Initialize try_fmt */
|
|
try_fmt->width = def_mode->width;
|
|
try_fmt->height = def_mode->height;
|
|
try_fmt->code = def_mode->bus_fmt;
|
|
try_fmt->field = V4L2_FIELD_NONE;
|
|
|
|
mutex_unlock(&ar0822->mutex);
|
|
/* No crop or compose */
|
|
|
|
return 0;
|
|
}
|
|
#endif
|
|
|
|
static int ar0822_enum_frame_interval(struct v4l2_subdev *sd,
|
|
struct v4l2_subdev_pad_config *cfg,
|
|
struct v4l2_subdev_frame_interval_enum *fie)
|
|
{
|
|
struct ar0822 *ar0822 = to_ar0822(sd);
|
|
|
|
if (fie->index >= ar0822->cfg_num)
|
|
return -EINVAL;
|
|
fie->code = supported_modes[fie->index].bus_fmt;
|
|
fie->width = supported_modes[fie->index].width;
|
|
fie->height = supported_modes[fie->index].height;
|
|
fie->interval = supported_modes[fie->index].max_fps;
|
|
fie->reserved[0] = supported_modes[fie->index].hdr_mode;
|
|
return 0;
|
|
}
|
|
|
|
static const struct dev_pm_ops ar0822_pm_ops = {
|
|
SET_RUNTIME_PM_OPS(ar0822_runtime_suspend,
|
|
ar0822_runtime_resume, NULL)
|
|
};
|
|
|
|
#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
|
|
static const struct v4l2_subdev_internal_ops ar0822_internal_ops = {
|
|
.open = ar0822_open,
|
|
};
|
|
#endif
|
|
|
|
static const struct v4l2_subdev_core_ops ar0822_core_ops = {
|
|
.s_power = ar0822_s_power,
|
|
.ioctl = ar0822_ioctl,
|
|
#ifdef CONFIG_COMPAT
|
|
.compat_ioctl32 = ar0822_compat_ioctl32,
|
|
#endif
|
|
};
|
|
|
|
static const struct v4l2_subdev_video_ops ar0822_video_ops = {
|
|
.s_stream = ar0822_s_stream,
|
|
.g_frame_interval = ar0822_g_frame_interval,
|
|
};
|
|
|
|
static const struct v4l2_subdev_pad_ops ar0822_pad_ops = {
|
|
.enum_mbus_code = ar0822_enum_mbus_code,
|
|
.enum_frame_size = ar0822_enum_frame_sizes,
|
|
.enum_frame_interval = ar0822_enum_frame_interval,
|
|
.get_fmt = ar0822_get_fmt,
|
|
.set_fmt = ar0822_set_fmt,
|
|
.get_mbus_config = ar0822_g_mbus_config,
|
|
};
|
|
|
|
static const struct v4l2_subdev_ops ar0822_subdev_ops = {
|
|
.core = &ar0822_core_ops,
|
|
.video = &ar0822_video_ops,
|
|
.pad = &ar0822_pad_ops,
|
|
};
|
|
|
|
|
|
static int ar0822_set_ctrl(struct v4l2_ctrl *ctrl)
|
|
{
|
|
struct ar0822 *ar0822 = container_of(ctrl->handler,
|
|
struct ar0822, ctrl_handler);
|
|
struct i2c_client *client = ar0822->client;
|
|
s64 max;
|
|
int ret = 0;
|
|
u32 again = 0;
|
|
u32 val = 0;
|
|
|
|
/* Propagate change of current control to all related controls */
|
|
switch (ctrl->id) {
|
|
case V4L2_CID_VBLANK:
|
|
/* Update max exposure while meeting expected vblanking */
|
|
max = ar0822->cur_mode->height + ctrl->val - 4;
|
|
__v4l2_ctrl_modify_range(ar0822->exposure,
|
|
ar0822->exposure->minimum, max,
|
|
ar0822->exposure->step,
|
|
ar0822->exposure->default_value);
|
|
break;
|
|
}
|
|
|
|
if (!pm_runtime_get_if_in_use(&client->dev))
|
|
return 0;
|
|
|
|
switch (ctrl->id) {
|
|
case V4L2_CID_EXPOSURE:
|
|
if (ar0822->cur_mode->hdr_mode != NO_HDR)
|
|
goto ctrl_end;
|
|
ret = ar0822_write_reg(ar0822->client,
|
|
AR0822_REG_EXP,
|
|
AR0822_REG_VALUE_16BIT,
|
|
ctrl->val);
|
|
|
|
dev_dbg(&client->dev, "set exposure 0x%x\n",
|
|
ctrl->val);
|
|
break;
|
|
case V4L2_CID_ANALOGUE_GAIN:
|
|
if (ar0822->cur_mode->hdr_mode != NO_HDR)
|
|
goto ctrl_end;
|
|
if (ctrl->val > AR0822_GAIN_MAX) {
|
|
again = AR0822_GAIN_MAX;
|
|
} else {
|
|
again = ctrl->val;
|
|
}
|
|
if (ctrl->val < AR0822_GAIN_MIN) {
|
|
again = AR0822_GAIN_MIN;
|
|
} else {
|
|
again = ctrl->val;
|
|
}
|
|
|
|
val = again;
|
|
ret = ar0822_write_reg(ar0822->client,
|
|
AR0822_REG_GAIN,
|
|
AR0822_REG_VALUE_16BIT,
|
|
val);
|
|
|
|
dev_dbg(&client->dev, "Corn set analog gain 0x%x\n",
|
|
ctrl->val);
|
|
break;
|
|
case V4L2_CID_VBLANK:
|
|
//ret = ar0822_write_reg(ar0822->client, AR0822_REG_VTS,
|
|
// AR0822_REG_VALUE_16BIT,
|
|
// ctrl->val + ar0822->cur_mode->height);
|
|
dev_dbg(&client->dev, "set vblank 0x%x\n",
|
|
ctrl->val);
|
|
break;
|
|
case V4L2_CID_TEST_PATTERN:
|
|
ret = ar0822_enable_test_pattern(ar0822, ctrl->val);
|
|
break;
|
|
case V4L2_CID_HFLIP:
|
|
ret = ar0822_read_reg(ar0822->client, AR0822_FLIP_REG,
|
|
AR0822_REG_VALUE_16BIT,
|
|
&val);
|
|
if (ctrl->val)
|
|
val |= MIRROR_BIT_MASK;
|
|
else
|
|
val &= ~MIRROR_BIT_MASK;
|
|
ret = ar0822_write_reg(ar0822->client, AR0822_FLIP_REG,
|
|
AR0822_REG_VALUE_16BIT,
|
|
val);
|
|
if (ret == 0)
|
|
ar0822->flip = val;
|
|
break;
|
|
case V4L2_CID_VFLIP:
|
|
ret = ar0822_read_reg(ar0822->client, AR0822_FLIP_REG,
|
|
AR0822_REG_VALUE_16BIT,
|
|
&val);
|
|
if (ctrl->val)
|
|
val |= FLIP_BIT_MASK;
|
|
else
|
|
val &= ~FLIP_BIT_MASK;
|
|
ret = ar0822_write_reg(ar0822->client, AR0822_FLIP_REG,
|
|
AR0822_REG_VALUE_16BIT,
|
|
val);
|
|
if (ret == 0)
|
|
ar0822->flip = val;
|
|
break;
|
|
default:
|
|
dev_warn(&client->dev, "%s Unhandled id:0x%x, val:0x%x\n",
|
|
__func__, ctrl->id, ctrl->val);
|
|
break;
|
|
}
|
|
|
|
|
|
ctrl_end:
|
|
pm_runtime_put(&client->dev);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static const struct v4l2_ctrl_ops ar0822_ctrl_ops = {
|
|
.s_ctrl = ar0822_set_ctrl,
|
|
};
|
|
|
|
static int ar0822_initialize_controls(struct ar0822 *ar0822)
|
|
{
|
|
const struct ar0822_mode *mode;
|
|
struct v4l2_ctrl_handler *handler;
|
|
s64 exposure_max, vblank_def;
|
|
u32 h_blank;
|
|
int ret;
|
|
u64 dst_link_freq = 0;
|
|
u64 dst_pixel_rate = 0;
|
|
|
|
handler = &ar0822->ctrl_handler;
|
|
mode = ar0822->cur_mode;
|
|
ret = v4l2_ctrl_handler_init(handler, 9);
|
|
if (ret)
|
|
return ret;
|
|
handler->lock = &ar0822->mutex;
|
|
ar0822->link_freq = v4l2_ctrl_new_int_menu(handler, NULL,
|
|
V4L2_CID_LINK_FREQ,
|
|
MIPI_FREQ_MAX_INDEX, 0, link_freq_menu_items);
|
|
|
|
dst_link_freq = mode->mipi_freq;
|
|
dst_pixel_rate = mode->mipi_rate;
|
|
/* pixel rate = link frequency * 2 * lanes / BITS_PER_SAMPLE */
|
|
ar0822->pixel_rate = v4l2_ctrl_new_std(handler, NULL,
|
|
V4L2_CID_PIXEL_RATE,
|
|
0, PIXEL_RATE_MAX,
|
|
1, dst_pixel_rate);
|
|
__v4l2_ctrl_s_ctrl(ar0822->link_freq,
|
|
dst_link_freq);
|
|
|
|
h_blank = mode->hts_def - mode->width;
|
|
ar0822->hblank = v4l2_ctrl_new_std(handler, NULL, V4L2_CID_HBLANK,
|
|
h_blank, h_blank, 1, h_blank);
|
|
if (ar0822->hblank)
|
|
ar0822->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY;
|
|
|
|
vblank_def = mode->vts_def - mode->height;
|
|
ar0822->vblank = v4l2_ctrl_new_std(handler, &ar0822_ctrl_ops,
|
|
V4L2_CID_VBLANK, vblank_def,
|
|
AR0822_VTS_MAX - mode->height,
|
|
1, vblank_def);
|
|
|
|
exposure_max = mode->vts_def - 4;
|
|
ar0822->exposure = v4l2_ctrl_new_std(handler, &ar0822_ctrl_ops,
|
|
V4L2_CID_EXPOSURE, AR0822_EXPOSURE_MIN,
|
|
exposure_max, AR0822_EXPOSURE_STEP,
|
|
mode->exp_def);
|
|
|
|
ar0822->anal_gain = v4l2_ctrl_new_std(handler, &ar0822_ctrl_ops,
|
|
V4L2_CID_ANALOGUE_GAIN, AR0822_GAIN_MIN,
|
|
AR0822_GAIN_MAX, AR0822_GAIN_STEP,
|
|
AR0822_GAIN_DEFAULT);
|
|
|
|
ar0822->test_pattern = v4l2_ctrl_new_std_menu_items(handler,
|
|
&ar0822_ctrl_ops, V4L2_CID_TEST_PATTERN,
|
|
ARRAY_SIZE(ar0822_test_pattern_menu) - 1,
|
|
0, 0, ar0822_test_pattern_menu);
|
|
|
|
ar0822->h_flip = v4l2_ctrl_new_std(handler, &ar0822_ctrl_ops,
|
|
V4L2_CID_HFLIP, 0, 1, 1, 0);
|
|
|
|
ar0822->v_flip = v4l2_ctrl_new_std(handler, &ar0822_ctrl_ops,
|
|
V4L2_CID_VFLIP, 0, 1, 1, 0);
|
|
ar0822->flip = 0;
|
|
if (handler->error) {
|
|
ret = handler->error;
|
|
dev_err(&ar0822->client->dev,
|
|
"Failed to init controls(%d)\n", ret);
|
|
goto err_free_handler;
|
|
}
|
|
|
|
ar0822->subdev.ctrl_handler = handler;
|
|
ar0822->has_init_exp = false;
|
|
ar0822->long_hcg = false;
|
|
ar0822->middle_hcg = false;
|
|
ar0822->short_hcg = false;
|
|
|
|
return 0;
|
|
|
|
err_free_handler:
|
|
v4l2_ctrl_handler_free(handler);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int ar0822_check_sensor_id(struct ar0822 *ar0822,
|
|
struct i2c_client *client)
|
|
{
|
|
struct device *dev = &ar0822->client->dev;
|
|
u32 id = 0;
|
|
int ret;
|
|
|
|
if (ar0822->is_thunderboot) {
|
|
dev_info(dev, "Enable thunderboot mode, skip sensor id check\n");
|
|
return 0;
|
|
}
|
|
|
|
ret = ar0822_read_reg(client, AR0822_REG_CHIP_ID,
|
|
AR0822_REG_VALUE_16BIT, &id);
|
|
if (id != CHIP_ID) {
|
|
dev_err(dev, "Unexpected sensor id(%06x), ret(%d)\n", id, ret);
|
|
return -ENODEV;
|
|
}
|
|
|
|
dev_info(dev, "Detected ar0822%04x sensor\n", CHIP_ID);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int ar0822_configure_regulators(struct ar0822 *ar0822)
|
|
{
|
|
unsigned int i;
|
|
|
|
for (i = 0; i < AR0822_NUM_SUPPLIES; i++)
|
|
ar0822->supplies[i].supply = ar0822_supply_names[i];
|
|
|
|
return devm_regulator_bulk_get(&ar0822->client->dev,
|
|
AR0822_NUM_SUPPLIES,
|
|
ar0822->supplies);
|
|
}
|
|
|
|
static int ar0822_probe(struct i2c_client *client,
|
|
const struct i2c_device_id *id)
|
|
{
|
|
struct device *dev = &client->dev;
|
|
struct device_node *node = dev->of_node;
|
|
struct ar0822 *ar0822;
|
|
struct v4l2_subdev *sd;
|
|
char facing[2];
|
|
int ret;
|
|
u32 i, hdr_mode = 0;
|
|
|
|
dev_info(dev, "driver version: %02x.%02x.%02x",
|
|
DRIVER_VERSION >> 16,
|
|
(DRIVER_VERSION & 0xff00) >> 8,
|
|
DRIVER_VERSION & 0x00ff);
|
|
|
|
ar0822 = devm_kzalloc(dev, sizeof(*ar0822), GFP_KERNEL);
|
|
if (!ar0822)
|
|
return -ENOMEM;
|
|
|
|
ret = of_property_read_u32(node, RKMODULE_CAMERA_MODULE_INDEX,
|
|
&ar0822->module_index);
|
|
ret |= of_property_read_string(node, RKMODULE_CAMERA_MODULE_FACING,
|
|
&ar0822->module_facing);
|
|
ret |= of_property_read_string(node, RKMODULE_CAMERA_MODULE_NAME,
|
|
&ar0822->module_name);
|
|
ret |= of_property_read_string(node, RKMODULE_CAMERA_LENS_NAME,
|
|
&ar0822->len_name);
|
|
if (ret) {
|
|
dev_err(dev, "could not get module information!\n");
|
|
return -EINVAL;
|
|
}
|
|
|
|
ar0822->is_thunderboot = IS_ENABLED(CONFIG_VIDEO_ROCKCHIP_THUNDER_BOOT_ISP);
|
|
ret = of_property_read_u32(node, OF_CAMERA_HDR_MODE,
|
|
&hdr_mode);
|
|
if (ret) {
|
|
hdr_mode = NO_HDR;
|
|
dev_warn(dev, " Get hdr mode failed! no hdr default\n");
|
|
}
|
|
ar0822->cfg_num = ARRAY_SIZE(supported_modes);
|
|
if(ar0822->cfg_num == 0){
|
|
dev_err(dev, "no any supported mode providec, force exit probe!\n");
|
|
return -EINVAL;
|
|
}
|
|
ar0822->cur_mode = &supported_modes[0];//initialize.
|
|
for (i = 0; i < ar0822->cfg_num; i++) {
|
|
if (hdr_mode == supported_modes[i].hdr_mode) {
|
|
ar0822->cur_mode = &supported_modes[i];
|
|
break;
|
|
}
|
|
}
|
|
ar0822->client = client;
|
|
|
|
ar0822->xvclk = devm_clk_get(dev, "xvclk");
|
|
if (IS_ERR(ar0822->xvclk)) {
|
|
dev_err(dev, "Failed to get xvclk\n");
|
|
return -EINVAL;
|
|
}
|
|
|
|
ar0822->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_ASIS);
|
|
if (IS_ERR(ar0822->reset_gpio))
|
|
dev_warn(dev, "Failed to get reset-gpios\n");
|
|
|
|
ar0822->pwdn_gpio = devm_gpiod_get(dev, "pwdn", GPIOD_ASIS);
|
|
if (IS_ERR(ar0822->pwdn_gpio))
|
|
dev_warn(dev, "Failed to get pwdn-gpios\n");
|
|
|
|
ar0822->pinctrl = devm_pinctrl_get(dev);
|
|
if (!IS_ERR(ar0822->pinctrl)) {
|
|
ar0822->pins_default =
|
|
pinctrl_lookup_state(ar0822->pinctrl,
|
|
OF_CAMERA_PINCTRL_STATE_DEFAULT);
|
|
if (IS_ERR(ar0822->pins_default))
|
|
dev_err(dev, "could not get default pinstate\n");
|
|
|
|
ar0822->pins_sleep =
|
|
pinctrl_lookup_state(ar0822->pinctrl,
|
|
OF_CAMERA_PINCTRL_STATE_SLEEP);
|
|
if (IS_ERR(ar0822->pins_sleep))
|
|
dev_err(dev, "could not get sleep pinstate\n");
|
|
} else {
|
|
dev_err(dev, "no pinctrl\n");
|
|
}
|
|
|
|
ret = ar0822_configure_regulators(ar0822);
|
|
if (ret) {
|
|
dev_err(dev, "Failed to get power regulators\n");
|
|
return ret;
|
|
}
|
|
|
|
mutex_init(&ar0822->mutex);
|
|
|
|
sd = &ar0822->subdev;
|
|
v4l2_i2c_subdev_init(sd, client, &ar0822_subdev_ops);
|
|
ret = ar0822_initialize_controls(ar0822);
|
|
if (ret)
|
|
goto err_destroy_mutex;
|
|
|
|
ret = __ar0822_power_on(ar0822);
|
|
if (ret)
|
|
goto err_free_handler;
|
|
|
|
ret = ar0822_check_sensor_id(ar0822, client);
|
|
if (ret)
|
|
goto err_power_off;
|
|
|
|
#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
|
|
sd->internal_ops = &ar0822_internal_ops;
|
|
sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
|
|
#endif
|
|
#if defined(CONFIG_MEDIA_CONTROLLER)
|
|
ar0822->pad.flags = MEDIA_PAD_FL_SOURCE;
|
|
sd->entity.function = MEDIA_ENT_F_CAM_SENSOR;
|
|
ret = media_entity_pads_init(&sd->entity, 1, &ar0822->pad);
|
|
if (ret < 0)
|
|
goto err_power_off;
|
|
#endif
|
|
|
|
memset(facing, 0, sizeof(facing));
|
|
if (strcmp(ar0822->module_facing, "back") == 0)
|
|
facing[0] = 'b';
|
|
else
|
|
facing[0] = 'f';
|
|
|
|
snprintf(sd->name, sizeof(sd->name), "m%02d_%s_%s %s",
|
|
ar0822->module_index, facing,
|
|
AR0822_NAME, dev_name(sd->dev));
|
|
ret = v4l2_async_register_subdev_sensor_common(sd);
|
|
if (ret) {
|
|
dev_err(dev, "v4l2 async register subdev failed\n");
|
|
goto err_clean_entity;
|
|
}
|
|
|
|
pm_runtime_set_active(dev);
|
|
pm_runtime_enable(dev);
|
|
pm_runtime_idle(dev);
|
|
#ifdef USED_SYS_DEBUG
|
|
add_sysfs_interfaces(dev);
|
|
#endif
|
|
return 0;
|
|
|
|
err_clean_entity:
|
|
#if defined(CONFIG_MEDIA_CONTROLLER)
|
|
media_entity_cleanup(&sd->entity);
|
|
#endif
|
|
err_power_off:
|
|
__ar0822_power_off(ar0822);
|
|
err_free_handler:
|
|
v4l2_ctrl_handler_free(&ar0822->ctrl_handler);
|
|
err_destroy_mutex:
|
|
mutex_destroy(&ar0822->mutex);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int ar0822_remove(struct i2c_client *client)
|
|
{
|
|
struct v4l2_subdev *sd = i2c_get_clientdata(client);
|
|
struct ar0822 *ar0822 = to_ar0822(sd);
|
|
|
|
v4l2_async_unregister_subdev(sd);
|
|
#if defined(CONFIG_MEDIA_CONTROLLER)
|
|
media_entity_cleanup(&sd->entity);
|
|
#endif
|
|
v4l2_ctrl_handler_free(&ar0822->ctrl_handler);
|
|
mutex_destroy(&ar0822->mutex);
|
|
|
|
pm_runtime_disable(&client->dev);
|
|
if (!pm_runtime_status_suspended(&client->dev))
|
|
__ar0822_power_off(ar0822);
|
|
pm_runtime_set_suspended(&client->dev);
|
|
|
|
return 0;
|
|
}
|
|
|
|
#if IS_ENABLED(CONFIG_OF)
|
|
static const struct of_device_id ar0822_of_match[] = {
|
|
{ .compatible = "onsemi,ar0822" },
|
|
{},
|
|
};
|
|
MODULE_DEVICE_TABLE(of, ar0822_of_match);
|
|
#endif
|
|
|
|
static const struct i2c_device_id ar0822_match_id[] = {
|
|
{ "onsemi,ar0822", 0 },
|
|
{ },
|
|
};
|
|
|
|
static struct i2c_driver ar0822_i2c_driver = {
|
|
.driver = {
|
|
.name = AR0822_NAME,
|
|
.pm = &ar0822_pm_ops,
|
|
.of_match_table = of_match_ptr(ar0822_of_match),
|
|
},
|
|
.probe = &ar0822_probe,
|
|
.remove = &ar0822_remove,
|
|
.id_table = ar0822_match_id,
|
|
};
|
|
|
|
#ifdef CONFIG_ROCKCHIP_THUNDER_BOOT
|
|
module_i2c_driver(ar0822_i2c_driver);
|
|
#else
|
|
static int __init sensor_mod_init(void)
|
|
{
|
|
return i2c_add_driver(&ar0822_i2c_driver);
|
|
}
|
|
|
|
static void __exit sensor_mod_exit(void)
|
|
{
|
|
i2c_del_driver(&ar0822_i2c_driver);
|
|
}
|
|
|
|
device_initcall_sync(sensor_mod_init);
|
|
module_exit(sensor_mod_exit);
|
|
#endif
|
|
|
|
MODULE_DESCRIPTION("Onsemi ar0822 sensor driver");
|
|
MODULE_LICENSE("GPL");
|