437 lines
16 KiB
C
437 lines
16 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/* Copyright (c) Rockchip Electronics Co., Ltd. */
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#include <linux/clk.h>
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#include <linux/math64.h>
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#include <linux/proc_fs.h>
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#include <linux/sem.h>
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#include <linux/seq_file.h>
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#include <linux/spinlock.h>
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#include <linux/v4l2-mediabus.h>
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#include "dev.h"
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#include "procfs.h"
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#ifdef CONFIG_PROC_FS
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static const struct {
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const char *name;
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u32 mbus_code;
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} mbus_formats[] = {
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/* media bus code */
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{ "RGB444_1X12", MEDIA_BUS_FMT_RGB444_1X12 },
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{ "RGB444_2X8_PADHI_BE", MEDIA_BUS_FMT_RGB444_2X8_PADHI_BE },
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{ "RGB444_2X8_PADHI_LE", MEDIA_BUS_FMT_RGB444_2X8_PADHI_LE },
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{ "RGB555_2X8_PADHI_BE", MEDIA_BUS_FMT_RGB555_2X8_PADHI_BE },
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{ "RGB555_2X8_PADHI_LE", MEDIA_BUS_FMT_RGB555_2X8_PADHI_LE },
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{ "RGB565_1X16", MEDIA_BUS_FMT_RGB565_1X16 },
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{ "BGR565_2X8_BE", MEDIA_BUS_FMT_BGR565_2X8_BE },
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{ "BGR565_2X8_LE", MEDIA_BUS_FMT_BGR565_2X8_LE },
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{ "RGB565_2X8_BE", MEDIA_BUS_FMT_RGB565_2X8_BE },
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{ "RGB565_2X8_LE", MEDIA_BUS_FMT_RGB565_2X8_LE },
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{ "RGB666_1X18", MEDIA_BUS_FMT_RGB666_1X18 },
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{ "RBG888_1X24", MEDIA_BUS_FMT_RBG888_1X24 },
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{ "RGB666_1X24_CPADHI", MEDIA_BUS_FMT_RGB666_1X24_CPADHI },
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{ "RGB666_1X7X3_SPWG", MEDIA_BUS_FMT_RGB666_1X7X3_SPWG },
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{ "BGR888_1X24", MEDIA_BUS_FMT_BGR888_1X24 },
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{ "GBR888_1X24", MEDIA_BUS_FMT_GBR888_1X24 },
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{ "RGB888_1X24", MEDIA_BUS_FMT_RGB888_1X24 },
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{ "RGB888_2X12_BE", MEDIA_BUS_FMT_RGB888_2X12_BE },
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{ "RGB888_2X12_LE", MEDIA_BUS_FMT_RGB888_2X12_LE },
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{ "RGB888_1X7X4_SPWG", MEDIA_BUS_FMT_RGB888_1X7X4_SPWG },
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{ "RGB888_1X7X4_JEIDA", MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA },
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{ "ARGB8888_1X32", MEDIA_BUS_FMT_ARGB8888_1X32 },
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{ "RGB888_1X32_PADHI", MEDIA_BUS_FMT_RGB888_1X32_PADHI },
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{ "RGB101010_1X30", MEDIA_BUS_FMT_RGB101010_1X30 },
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{ "RGB121212_1X36", MEDIA_BUS_FMT_RGB121212_1X36 },
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{ "RGB161616_1X48", MEDIA_BUS_FMT_RGB161616_1X48 },
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{ "Y8_1X8", MEDIA_BUS_FMT_Y8_1X8 },
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{ "UV8_1X8", MEDIA_BUS_FMT_UV8_1X8 },
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{ "UYVY8_1_5X8", MEDIA_BUS_FMT_UYVY8_1_5X8 },
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{ "VYUY8_1_5X8", MEDIA_BUS_FMT_VYUY8_1_5X8 },
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{ "YUYV8_1_5X8", MEDIA_BUS_FMT_YUYV8_1_5X8 },
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{ "YVYU8_1_5X8", MEDIA_BUS_FMT_YVYU8_1_5X8 },
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{ "UYVY8_2X8", MEDIA_BUS_FMT_UYVY8_2X8 },
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{ "VYUY8_2X8", MEDIA_BUS_FMT_VYUY8_2X8 },
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{ "YUYV8_2X8", MEDIA_BUS_FMT_YUYV8_2X8 },
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{ "YVYU8_2X8", MEDIA_BUS_FMT_YVYU8_2X8 },
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{ "Y10_1X10", MEDIA_BUS_FMT_Y10_1X10 },
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{ "Y10_2X8_PADHI_LE", MEDIA_BUS_FMT_Y10_2X8_PADHI_LE },
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{ "UYVY10_2X10", MEDIA_BUS_FMT_UYVY10_2X10 },
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{ "VYUY10_2X10", MEDIA_BUS_FMT_VYUY10_2X10 },
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{ "YUYV10_2X10", MEDIA_BUS_FMT_YUYV10_2X10 },
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{ "YVYU10_2X10", MEDIA_BUS_FMT_YVYU10_2X10 },
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{ "Y12_1X12", MEDIA_BUS_FMT_Y12_1X12 },
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{ "UYVY12_2X12", MEDIA_BUS_FMT_UYVY12_2X12 },
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{ "VYUY12_2X12", MEDIA_BUS_FMT_VYUY12_2X12 },
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{ "YUYV12_2X12", MEDIA_BUS_FMT_YUYV12_2X12 },
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{ "YVYU12_2X12", MEDIA_BUS_FMT_YVYU12_2X12 },
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{ "UYVY8_1X16", MEDIA_BUS_FMT_UYVY8_1X16 },
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{ "VYUY8_1X16", MEDIA_BUS_FMT_VYUY8_1X16 },
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{ "YUYV8_1X16", MEDIA_BUS_FMT_YUYV8_1X16 },
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{ "YVYU8_1X16", MEDIA_BUS_FMT_YVYU8_1X16 },
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{ "YDYUYDYV8_1X16", MEDIA_BUS_FMT_YDYUYDYV8_1X16 },
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{ "UYVY10_1X20", MEDIA_BUS_FMT_UYVY10_1X20 },
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{ "VYUY10_1X20", MEDIA_BUS_FMT_VYUY10_1X20 },
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{ "YUYV10_1X20", MEDIA_BUS_FMT_YUYV10_1X20 },
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{ "YVYU10_1X20", MEDIA_BUS_FMT_YVYU10_1X20 },
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{ "VUY8_1X24", MEDIA_BUS_FMT_VUY8_1X24 },
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{ "YUV8_1X24", MEDIA_BUS_FMT_YUV8_1X24 },
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{ "UYYVYY8_0_5X24", MEDIA_BUS_FMT_UYYVYY8_0_5X24 },
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{ "UYVY12_1X24", MEDIA_BUS_FMT_UYVY12_1X24 },
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{ "VYUY12_1X24", MEDIA_BUS_FMT_VYUY12_1X24 },
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{ "YUYV12_1X24", MEDIA_BUS_FMT_YUYV12_1X24 },
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{ "YVYU12_1X24", MEDIA_BUS_FMT_YVYU12_1X24 },
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{ "YUV10_1X30", MEDIA_BUS_FMT_YUV10_1X30 },
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{ "UYYVYY10_0_5X30", MEDIA_BUS_FMT_UYYVYY10_0_5X30 },
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{ "AYUV8_1X32", MEDIA_BUS_FMT_AYUV8_1X32 },
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{ "UYYVYY12_0_5X36", MEDIA_BUS_FMT_UYYVYY12_0_5X36 },
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{ "YUV12_1X36", MEDIA_BUS_FMT_YUV12_1X36 },
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{ "YUV16_1X48", MEDIA_BUS_FMT_YUV16_1X48 },
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{ "UYYVYY16_0_5X48", MEDIA_BUS_FMT_UYYVYY16_0_5X48 },
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{ "SBGGR8_1X8", MEDIA_BUS_FMT_SBGGR8_1X8 },
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{ "SGBRG8_1X8", MEDIA_BUS_FMT_SGBRG8_1X8 },
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{ "SGRBG8_1X8", MEDIA_BUS_FMT_SGRBG8_1X8 },
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{ "SRGGB8_1X8", MEDIA_BUS_FMT_SRGGB8_1X8 },
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{ "SBGGR10_ALAW8_1X8", MEDIA_BUS_FMT_SBGGR10_ALAW8_1X8 },
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{ "SGBRG10_ALAW8_1X8", MEDIA_BUS_FMT_SGBRG10_ALAW8_1X8 },
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{ "SGRBG10_ALAW8_1X8", MEDIA_BUS_FMT_SGRBG10_ALAW8_1X8 },
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{ "SRGGB10_ALAW8_1X8", MEDIA_BUS_FMT_SRGGB10_ALAW8_1X8 },
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{ "SBGGR10_DPCM8_1X8", MEDIA_BUS_FMT_SBGGR10_DPCM8_1X8 },
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{ "SGBRG10_DPCM8_1X8", MEDIA_BUS_FMT_SGBRG10_DPCM8_1X8 },
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{ "SGRBG10_DPCM8_1X8", MEDIA_BUS_FMT_SGRBG10_DPCM8_1X8 },
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{ "SRGGB10_DPCM8_1X8", MEDIA_BUS_FMT_SRGGB10_DPCM8_1X8 },
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{ "SBGGR10_2X8_PADHI_BE", MEDIA_BUS_FMT_SBGGR10_2X8_PADHI_BE },
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{ "SBGGR10_2X8_PADHI_LE", MEDIA_BUS_FMT_SBGGR10_2X8_PADHI_LE },
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{ "SBGGR10_2X8_PADLO_BE", MEDIA_BUS_FMT_SBGGR10_2X8_PADLO_BE },
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{ "SBGGR10_2X8_PADLO_LE", MEDIA_BUS_FMT_SBGGR10_2X8_PADLO_LE },
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{ "SBGGR10_1X10", MEDIA_BUS_FMT_SBGGR10_1X10 },
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{ "SGBRG10_1X10", MEDIA_BUS_FMT_SGBRG10_1X10 },
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{ "SGRBG10_1X10", MEDIA_BUS_FMT_SGRBG10_1X10 },
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{ "SRGGB10_1X10", MEDIA_BUS_FMT_SRGGB10_1X10 },
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{ "SBGGR12_1X12", MEDIA_BUS_FMT_SBGGR12_1X12 },
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{ "SGBRG12_1X12", MEDIA_BUS_FMT_SGBRG12_1X12 },
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{ "SGRBG12_1X12", MEDIA_BUS_FMT_SGRBG12_1X12 },
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{ "SRGGB12_1X12", MEDIA_BUS_FMT_SRGGB12_1X12 },
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{ "SBGGR14_1X14", MEDIA_BUS_FMT_SBGGR14_1X14 },
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{ "SGBRG14_1X14", MEDIA_BUS_FMT_SGBRG14_1X14 },
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{ "SGRBG14_1X14", MEDIA_BUS_FMT_SGRBG14_1X14 },
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{ "SRGGB14_1X14", MEDIA_BUS_FMT_SRGGB14_1X14 },
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{ "SBGGR16_1X16", MEDIA_BUS_FMT_SBGGR16_1X16 },
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{ "SGBRG16_1X16", MEDIA_BUS_FMT_SGBRG16_1X16 },
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{ "SGRBG16_1X16", MEDIA_BUS_FMT_SGRBG16_1X16 },
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{ "SRGGB16_1X16", MEDIA_BUS_FMT_SRGGB16_1X16 },
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{ "JPEG_1X8", MEDIA_BUS_FMT_JPEG_1X8 },
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{ "S5C_UYVY_JPEG_1X8", MEDIA_BUS_FMT_S5C_UYVY_JPEG_1X8 },
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{ "AHSV8888_1X32", MEDIA_BUS_FMT_AHSV8888_1X32 },
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{ "FIXED", MEDIA_BUS_FMT_FIXED },
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{ "Y8", MEDIA_BUS_FMT_Y8_1X8 },
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{ "Y10", MEDIA_BUS_FMT_Y10_1X10 },
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{ "Y12", MEDIA_BUS_FMT_Y12_1X12 },
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{ "YUYV", MEDIA_BUS_FMT_YUYV8_1X16 },
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{ "YUYV1_5X8", MEDIA_BUS_FMT_YUYV8_1_5X8 },
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{ "YUYV2X8", MEDIA_BUS_FMT_YUYV8_2X8 },
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{ "UYVY", MEDIA_BUS_FMT_UYVY8_1X16 },
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{ "UYVY1_5X8", MEDIA_BUS_FMT_UYVY8_1_5X8 },
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{ "UYVY2X8", MEDIA_BUS_FMT_UYVY8_2X8 },
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{ "VUY24", MEDIA_BUS_FMT_VUY8_1X24 },
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{ "SBGGR8", MEDIA_BUS_FMT_SBGGR8_1X8 },
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{ "SGBRG8", MEDIA_BUS_FMT_SGBRG8_1X8 },
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{ "SGRBG8", MEDIA_BUS_FMT_SGRBG8_1X8 },
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{ "SRGGB8", MEDIA_BUS_FMT_SRGGB8_1X8 },
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{ "SBGGR10", MEDIA_BUS_FMT_SBGGR10_1X10 },
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{ "SGBRG10", MEDIA_BUS_FMT_SGBRG10_1X10 },
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{ "SGRBG10", MEDIA_BUS_FMT_SGRBG10_1X10 },
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{ "SRGGB10", MEDIA_BUS_FMT_SRGGB10_1X10 },
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{ "SBGGR10_DPCM8", MEDIA_BUS_FMT_SBGGR10_DPCM8_1X8 },
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{ "SGBRG10_DPCM8", MEDIA_BUS_FMT_SGBRG10_DPCM8_1X8 },
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{ "SGRBG10_DPCM8", MEDIA_BUS_FMT_SGRBG10_DPCM8_1X8 },
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{ "SRGGB10_DPCM8", MEDIA_BUS_FMT_SRGGB10_DPCM8_1X8 },
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{ "SBGGR12", MEDIA_BUS_FMT_SBGGR12_1X12 },
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{ "SGBRG12", MEDIA_BUS_FMT_SGBRG12_1X12 },
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{ "SGRBG12", MEDIA_BUS_FMT_SGRBG12_1X12 },
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{ "SRGGB12", MEDIA_BUS_FMT_SRGGB12_1X12 },
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{ "AYUV32", MEDIA_BUS_FMT_AYUV8_1X32 },
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{ "RBG24", MEDIA_BUS_FMT_RBG888_1X24 },
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{ "RGB32", MEDIA_BUS_FMT_RGB888_1X32_PADHI },
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{ "ARGB32", MEDIA_BUS_FMT_ARGB8888_1X32 },
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/* v4l2 fourcc code */
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{ "NV16", V4L2_PIX_FMT_NV16},
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{ "NV61", V4L2_PIX_FMT_NV61},
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{ "NV12", V4L2_PIX_FMT_NV12},
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{ "NV21", V4L2_PIX_FMT_NV21},
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{ "YUYV", V4L2_PIX_FMT_YUYV},
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{ "YVYU", V4L2_PIX_FMT_YVYU},
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{ "UYVY", V4L2_PIX_FMT_UYVY},
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{ "VYUY", V4L2_PIX_FMT_VYUY},
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{ "RGB3", V4L2_PIX_FMT_RGB24},
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{ "RGBP", V4L2_PIX_FMT_RGB565},
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{ "BGRH", V4L2_PIX_FMT_BGR666},
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{ "RGGB", V4L2_PIX_FMT_SRGGB8},
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{ "GRBG", V4L2_PIX_FMT_SGRBG8},
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{ "GBRG", V4L2_PIX_FMT_SGBRG8},
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{ "BA81", V4L2_PIX_FMT_SBGGR8},
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{ "RG10", V4L2_PIX_FMT_SRGGB10},
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{ "BA10", V4L2_PIX_FMT_SGRBG10},
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{ "GB10", V4L2_PIX_FMT_SGBRG10},
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{ "BG10", V4L2_PIX_FMT_SBGGR10},
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{ "RG12", V4L2_PIX_FMT_SRGGB12},
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{ "BA12", V4L2_PIX_FMT_SGRBG12},
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{ "GB12", V4L2_PIX_FMT_SGBRG12},
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{ "BG12", V4L2_PIX_FMT_SBGGR12},
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{ "BYR2", V4L2_PIX_FMT_SBGGR16},
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{ "Y16 ", V4L2_PIX_FMT_Y16},
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};
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static const char *rkcif_pixelcode_to_string(u32 mbus_code)
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{
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unsigned int i;
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for (i = 0; i < ARRAY_SIZE(mbus_formats); ++i) {
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if (mbus_formats[i].mbus_code == mbus_code)
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return mbus_formats[i].name;
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}
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return "unknown";
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}
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static const char *rkcif_get_monitor_mode(enum rkcif_monitor_mode monitor_mode)
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{
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switch (monitor_mode) {
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case RKCIF_MONITOR_MODE_IDLE:
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return "idle";
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case RKCIF_MONITOR_MODE_CONTINUE:
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return "continue";
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case RKCIF_MONITOR_MODE_TRIGGER:
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return "trigger";
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case RKCIF_MONITOR_MODE_HOTPLUG:
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return "hotplug";
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default:
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return "unknown";
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}
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}
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static void rkcif_show_mixed_info(struct rkcif_device *dev, struct seq_file *f)
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{
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enum rkcif_monitor_mode monitor_mode;
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seq_printf(f, "Driver Version:v%02x.%02x.%02x\n",
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RKCIF_DRIVER_VERSION >> 16,
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(RKCIF_DRIVER_VERSION & 0xff00) >> 8,
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RKCIF_DRIVER_VERSION & 0x00ff);
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seq_printf(f, "Work Mode:%s\n",
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dev->workmode == RKCIF_WORKMODE_ONEFRAME ? "one frame" :
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dev->workmode == RKCIF_WORKMODE_PINGPONG ? "ping pong" : "line loop");
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monitor_mode = dev->reset_watchdog_timer.monitor_mode;
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seq_printf(f, "Monitor Mode:%s\n",
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rkcif_get_monitor_mode(monitor_mode));
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}
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static void rkcif_show_clks(struct rkcif_device *dev, struct seq_file *f)
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{
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int i;
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struct rkcif_hw *hw = dev->hw_dev;
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for (i = 0; i < hw->clk_size; i++) {
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seq_printf(f, "%s:%ld\n",
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hw->match_data->clks[i],
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clk_get_rate(hw->clks[i]));
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}
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}
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static void rkcif_show_format(struct rkcif_device *dev, struct seq_file *f)
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{
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struct rkcif_stream *stream = &dev->stream[0];
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struct rkcif_pipeline *pipe = &dev->pipe;
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struct rkcif_sensor_info *sensor = &dev->terminal_sensor;
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struct v4l2_rect *rect = &sensor->raw_rect;
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struct v4l2_subdev_frame_interval *interval = &sensor->fi;
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struct v4l2_subdev_selection *sel = &sensor->selection;
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u32 i, mbus_flags;
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u64 fps, timestamp0, timestamp1;
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unsigned long flags;
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u32 time_val = 0;
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if (atomic_read(&pipe->stream_cnt) < 1)
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return;
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if (sensor) {
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seq_puts(f, "Input Info:\n");
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seq_printf(f, "\tsrc subdev:%s\n", sensor->sd->name);
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mbus_flags = sensor->mbus.flags;
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if (sensor->mbus.type == V4L2_MBUS_PARALLEL ||
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sensor->mbus.type == V4L2_MBUS_BT656) {
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seq_printf(f, "\tinterface:%s\n",
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sensor->mbus.type == V4L2_MBUS_PARALLEL ? "BT601" : "BT656/BT1120");
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seq_printf(f, "\thref_pol:%s\n",
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mbus_flags & V4L2_MBUS_HSYNC_ACTIVE_HIGH ? "high active" : "low active");
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seq_printf(f, "\tvsync_pol:%s\n",
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mbus_flags & V4L2_MBUS_VSYNC_ACTIVE_HIGH ? "high active" : "low active");
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} else {
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seq_printf(f, "\tinterface:%s\n",
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sensor->mbus.type == V4L2_MBUS_CSI2_DPHY ? "mipi csi2 dphy" :
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sensor->mbus.type == V4L2_MBUS_CSI2_CPHY ? "mipi csi2 cphy" :
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sensor->mbus.type == V4L2_MBUS_CCP2 ? "lvds" : "unknown");
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seq_printf(f, "\tlanes:%d\n", sensor->lanes);
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seq_puts(f, "\tvc channel:");
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if (mbus_flags & V4L2_MBUS_CSI2_CHANNELS) {
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for (i = 0; i < 4; i++) {
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if ((mbus_flags >> (4 + i)) & 0x1)
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seq_printf(f, " %d", i);
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}
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seq_puts(f, "\n");
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} else {
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seq_puts(f, "unknown\n");
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}
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}
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seq_printf(f, "\thdr mode: %s\n",
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dev->hdr.hdr_mode == NO_HDR ? "normal" :
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dev->hdr.hdr_mode == HDR_COMPR ? "hdr_compr" :
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dev->hdr.hdr_mode == HDR_X2 ? "hdr_x2" : "hdr_x3");
|
|
|
|
seq_printf(f, "\tformat:%s/%ux%u@%d\n",
|
|
rkcif_pixelcode_to_string(stream->cif_fmt_in->mbus_code),
|
|
rect->width, rect->height,
|
|
interval->interval.denominator / interval->interval.numerator);
|
|
|
|
seq_printf(f, "\tcrop.bounds:(%u, %u)/%ux%u\n",
|
|
sel->r.left, sel->r.top,
|
|
sel->r.width, sel->r.height);
|
|
|
|
spin_lock_irqsave(&stream->fps_lock, flags);
|
|
timestamp0 = stream->fps_stats.frm0_timestamp;
|
|
timestamp1 = stream->fps_stats.frm1_timestamp;
|
|
spin_unlock_irqrestore(&stream->fps_lock, flags);
|
|
fps = timestamp0 > timestamp1 ?
|
|
timestamp0 - timestamp1 : timestamp1 - timestamp0;
|
|
fps = div_u64(fps, 1000000);
|
|
|
|
seq_puts(f, "Output Info:\n");
|
|
seq_printf(f, "\tformat:%s/%ux%u(%u,%u)\n",
|
|
rkcif_pixelcode_to_string(stream->cif_fmt_out->fourcc),
|
|
dev->channels[0].width, dev->channels[0].height,
|
|
dev->channels[0].crop_st_x, dev->channels[0].crop_st_y);
|
|
seq_printf(f, "\tcompact:%s\n", stream->is_compact ? "enable" : "disabled");
|
|
seq_printf(f, "\tframe amount:%d\n", stream->frame_idx - 1);
|
|
if (dev->inf_id == RKCIF_MIPI_LVDS) {
|
|
time_val = div_u64(stream->readout.early_time, 1000000);
|
|
seq_printf(f, "\tearly:%u ms\n", time_val);
|
|
if (dev->hdr.hdr_mode == NO_HDR ||
|
|
dev->hdr.hdr_mode == HDR_COMPR) {
|
|
time_val = div_u64(stream->readout.readout_time, 1000000);
|
|
seq_printf(f, "\treadout:%u ms\n", time_val);
|
|
} else {
|
|
time_val = div_u64(stream->readout.readout_time, 1000000);
|
|
seq_printf(f, "\tsingle readout:%u ms\n", time_val);
|
|
time_val = div_u64(stream->readout.total_time, 1000000);
|
|
seq_printf(f, "\ttotal readout:%u ms\n", time_val);
|
|
|
|
}
|
|
}
|
|
seq_printf(f, "\trate:%llu ms\n", fps);
|
|
fps = div_u64(1000, fps);
|
|
seq_printf(f, "\tfps:%llu\n", fps);
|
|
seq_puts(f, "\tirq statistics:\n");
|
|
seq_printf(f, "\t\t\ttotal:%llu\n",
|
|
dev->irq_stats.frm_end_cnt[0] +
|
|
dev->irq_stats.frm_end_cnt[1] +
|
|
dev->irq_stats.frm_end_cnt[2] +
|
|
dev->irq_stats.frm_end_cnt[3] +
|
|
dev->irq_stats.all_err_cnt);
|
|
if (sensor->mbus.type == V4L2_MBUS_PARALLEL ||
|
|
sensor->mbus.type == V4L2_MBUS_BT656) {
|
|
seq_printf(f, "\t\t\tdvp bus err:%llu\n", dev->irq_stats.dvp_bus_err_cnt);
|
|
seq_printf(f, "\t\t\tdvp pix err:%llu\n", dev->irq_stats.dvp_pix_err_cnt);
|
|
seq_printf(f, "\t\t\tdvp line err:%llu\n", dev->irq_stats.dvp_line_err_cnt);
|
|
seq_printf(f, "\t\t\tdvp over flow:%llu\n", dev->irq_stats.dvp_overflow_cnt);
|
|
seq_printf(f, "\t\t\tdvp bandwidth lack:%llu\n",
|
|
dev->irq_stats.dvp_bwidth_lack_cnt);
|
|
seq_printf(f, "\t\t\tdvp size err:%llu\n", dev->irq_stats.dvp_size_err_cnt);
|
|
} else {
|
|
seq_printf(f, "\t\t\tcsi over flow:%llu\n", dev->irq_stats.csi_overflow_cnt);
|
|
seq_printf(f, "\t\t\tcsi bandwidth lack:%llu\n",
|
|
dev->irq_stats.csi_bwidth_lack_cnt);
|
|
seq_printf(f, "\t\t\tcsi size err:%llu\n", dev->irq_stats.csi_size_err_cnt);
|
|
}
|
|
seq_printf(f, "\t\t\tnot active buf cnt:%llu %llu %llu %llu\n",
|
|
dev->irq_stats.not_active_buf_cnt[0],
|
|
dev->irq_stats.not_active_buf_cnt[1],
|
|
dev->irq_stats.not_active_buf_cnt[2],
|
|
dev->irq_stats.not_active_buf_cnt[3]);
|
|
seq_printf(f, "\t\t\tall err count:%llu\n", dev->irq_stats.all_err_cnt);
|
|
seq_printf(f, "\t\t\tframe dma end:%llu %llu %llu %llu\n",
|
|
dev->irq_stats.frm_end_cnt[0],
|
|
dev->irq_stats.frm_end_cnt[1],
|
|
dev->irq_stats.frm_end_cnt[2],
|
|
dev->irq_stats.frm_end_cnt[3]);
|
|
seq_printf(f, "irq time: %llu ns\n", dev->hw_dev->irq_time);
|
|
seq_printf(f, "dma enable: 0x%x 0x%x 0x%x 0x%x\n",
|
|
dev->stream[0].dma_en, dev->stream[1].dma_en,
|
|
dev->stream[2].dma_en, dev->stream[3].dma_en);
|
|
seq_printf(f, "buf_cnt in drv: %d %d %d %d\n",
|
|
atomic_read(&dev->stream[0].buf_cnt),
|
|
atomic_read(&dev->stream[1].buf_cnt),
|
|
atomic_read(&dev->stream[2].buf_cnt),
|
|
atomic_read(&dev->stream[3].buf_cnt));
|
|
seq_printf(f, "total buf_cnt: %d %d %d %d\n",
|
|
dev->stream[0].total_buf_num,
|
|
dev->stream[1].total_buf_num,
|
|
dev->stream[2].total_buf_num,
|
|
dev->stream[3].total_buf_num);
|
|
}
|
|
}
|
|
|
|
static int rkcif_proc_show(struct seq_file *f, void *v)
|
|
{
|
|
struct rkcif_device *dev = f->private;
|
|
|
|
if (dev) {
|
|
rkcif_show_mixed_info(dev, f);
|
|
rkcif_show_clks(dev, f);
|
|
rkcif_show_format(dev, f);
|
|
} else {
|
|
seq_puts(f, "dev null\n");
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int rkcif_proc_open(struct inode *inode, struct file *file)
|
|
{
|
|
struct rkcif_device *data = PDE_DATA(inode);
|
|
|
|
return single_open(file, rkcif_proc_show, data);
|
|
}
|
|
|
|
static const struct proc_ops rkcif_proc_fops = {
|
|
.proc_open = rkcif_proc_open,
|
|
.proc_release = single_release,
|
|
.proc_read = seq_read,
|
|
.proc_lseek = seq_lseek,
|
|
};
|
|
|
|
int rkcif_proc_init(struct rkcif_device *dev)
|
|
{
|
|
|
|
dev->proc_dir = proc_create_data(dev_name(dev->dev), 0444,
|
|
NULL, &rkcif_proc_fops,
|
|
dev);
|
|
if (!dev->proc_dir) {
|
|
dev_err(dev->dev, "create proc/%s failed!\n",
|
|
dev_name(dev->dev));
|
|
return -ENODEV;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
void rkcif_proc_cleanup(struct rkcif_device *dev)
|
|
{
|
|
remove_proc_entry(dev_name(dev->dev), NULL);
|
|
}
|
|
|
|
#endif
|