274 lines
4.7 KiB
ArmAsm
274 lines
4.7 KiB
ArmAsm
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Rockchip VAD Preprocess
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*
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* Copyright (C) 2018 Fuzhou Rockchip Electronics Co., Ltd
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*
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*/
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.arch armv8-a
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.file "vad_preprocess_arm64.S"
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.text
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.align 2
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.global vad_preprocess_init
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.type vad_preprocess_init, %function
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vad_preprocess_init:
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adrp x2, .LANCHOR0
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add x1, x2, :lo12:.LANCHOR0
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ldr w3, [x0, 8]
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strh w3, [x2, #:lo12:.LANCHOR0]
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ldr w2, [x0, 4]
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strh w2, [x1, 2]
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ldr w2, [x0, 12]
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strh w2, [x1, 4]
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ldr w2, [x0]
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strh w2, [x1, 6]
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ldr w2, [x0, 16]
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and w0, w2, 511
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tbz x2, 9, .L2
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mvn w0, w0
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.L2:
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strh w0, [x1, 8]
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ret
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.size vad_preprocess_init, .-vad_preprocess_init
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.align 2
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.global vad_preprocess
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.type vad_preprocess, %function
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vad_preprocess:
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adrp x4, .LANCHOR0
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add x2, x4, :lo12:.LANCHOR0
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mov w8, 15349
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ldrsh w1, [x2, 8]
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ldrsh w7, [x2, 10]
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ldrsh w6, [x2, 12]
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ldrsh w3, [x2, 16]
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mul w0, w1, w0
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mov w1, 32
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sdiv w0, w0, w1
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ldrsh w1, [x2, 14]
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mov w2, -30697
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mul w2, w7, w2
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mul w5, w0, w8
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sxtw x2, w2
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add x2, x2, w5, sxtw
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smaddl x3, w3, w8, x2
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mov w2, -30632
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smsubl x2, w6, w2, x3
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mov w3, 14379
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smsubl x1, w1, w3, x2
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cmp x1, 0
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ble .L5
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add x1, x1, 8192
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asr x1, x1, 14
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.L6:
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add x2, x4, :lo12:.LANCHOR0
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sxth w1, w1
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cmp w1, 0
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ldrh w3, [x2, 18]
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strh w0, [x2, 10]
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add w3, w3, 1
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ldr w0, [x2, 20]
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sxth w3, w3
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strh w1, [x2, 12]
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csneg w1, w1, w1, ge
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strh w3, [x2, 18]
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negs w5, w3
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add w0, w1, w0
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strh w7, [x2, 16]
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and w3, w3, 255
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strh w6, [x2, 14]
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and w5, w5, 255
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str w0, [x2, 20]
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csneg w3, w3, w5, mi
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cbnz w3, .L7
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ldr w3, [x2, 24]
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cmp w3, 99
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bgt .L8
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add w0, w0, 128
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mov w5, 256
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add x2, x2, 32
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sdiv w0, w0, w5
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strh w0, [x2, w3, sxtw 1]
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.L9:
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add x2, x4, :lo12:.LANCHOR0
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cmp w3, 99
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ldrsh w0, [x2, 32]
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bgt .L11
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add x2, x2, 32
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mov x5, 0
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.L12:
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add x5, x5, 1
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cmp w3, w5
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bgt .L13
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.L14:
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add x2, x4, :lo12:.LANCHOR0
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mov w6, 230
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add w3, w3, 1
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ldrsh w5, [x2, 6]
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strh wzr, [x2, 18]
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stp wzr, w3, [x2, 20]
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mul w5, w5, w6
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mov w6, 26
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add w5, w5, 128
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madd w0, w0, w6, w5
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mov w5, 256
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sdiv w0, w0, w5
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strh w0, [x2, 6]
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.L7:
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add x0, x4, :lo12:.LANCHOR0
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ldrsh w3, [x4, #:lo12:.LANCHOR0]
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ldrsh w2, [x0, 6]
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ldrsh w5, [x0, 2]
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madd w2, w2, w5, w3
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cmp w1, w2
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ble .L16
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ldrh w1, [x0, 432]
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add w1, w1, 1
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sxth w1, w1
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strh w1, [x0, 432]
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ldrsh w0, [x0, 4]
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cmp w0, w1
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cset w0, lt
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ret
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.L5:
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sub x1, x1, #8192
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mov x2, 16384
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sdiv x1, x1, x2
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b .L6
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.L8:
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add x5, x2, 34
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add x2, x2, 232
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.L10:
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ldrh w6, [x5]
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add x5, x5, 2
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strh w6, [x5, -4]
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cmp x2, x5
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bne .L10
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add w0, w0, 128
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mov w5, 256
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add x2, x4, :lo12:.LANCHOR0
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sdiv w0, w0, w5
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strh w0, [x2, 230]
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b .L9
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.L13:
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lsl x6, x5, 1
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ldrsh w7, [x6, x2]
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ldrh w6, [x6, x2]
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cmp w7, w0
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csel w0, w6, w0, le
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sxth w0, w0
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b .L12
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.L11:
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add x5, x2, 34
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add x2, x2, 232
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.L15:
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ldrsh w7, [x5]
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ldrh w6, [x5], 2
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cmp w7, w0
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csel w0, w6, w0, le
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cmp x2, x5
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sxth w0, w0
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bne .L15
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b .L14
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.L16:
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strh wzr, [x0, 432]
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mov w0, 0
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ret
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.size vad_preprocess, .-vad_preprocess
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.align 2
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.global vad_preprocess_destroy
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.type vad_preprocess_destroy, %function
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vad_preprocess_destroy:
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adrp x0, .LANCHOR0
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add x0, x0, :lo12:.LANCHOR0
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add x2, x0, 32
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mov x1, 0
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strh wzr, [x0, 10]
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strh wzr, [x0, 16]
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strh wzr, [x0, 12]
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strh wzr, [x0, 14]
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strh wzr, [x0, 18]
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strh wzr, [x0, 432]
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.L21:
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strh wzr, [x1, x2]
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add x1, x1, 2
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cmp x1, 200
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bne .L21
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mov w1, 32
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strh wzr, [x0, 6]
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strh w1, [x0, 8]
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stp wzr, wzr, [x0, 20]
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ret
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.size vad_preprocess_destroy, .-vad_preprocess_destroy
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.align 2
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.global vad_preprocess_update_params
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.type vad_preprocess_update_params, %function
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vad_preprocess_update_params:
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adrp x1, .LANCHOR0+6
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ldrsh w1, [x1, #:lo12:.LANCHOR0+6]
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str w1, [x0]
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ret
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.size vad_preprocess_update_params, .-vad_preprocess_update_params
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.bss
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.align 3
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.set .LANCHOR0,. + 0
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.type g_sound_thd, %object
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.size g_sound_thd, 2
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g_sound_thd:
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.zero 2
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.type g_noise_level, %object
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.size g_noise_level, 2
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g_noise_level:
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.zero 2
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.type g_vad_con_thd, %object
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.size g_vad_con_thd, 2
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g_vad_con_thd:
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.zero 2
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.type g_noise_abs, %object
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.size g_noise_abs, 2
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g_noise_abs:
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.zero 2
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.type g_signal_gain, %object
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.size g_signal_gain, 2
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g_signal_gain:
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.zero 2
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.type g_xn_1, %object
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.size g_xn_1, 2
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g_xn_1:
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.zero 2
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.type g_yn_1, %object
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.size g_yn_1, 2
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g_yn_1:
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.zero 2
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.type g_yn_2, %object
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.size g_yn_2, 2
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g_yn_2:
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.zero 2
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.type g_xn_2, %object
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.size g_xn_2, 2
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g_xn_2:
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.zero 2
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.type g_sample_cnt, %object
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.size g_sample_cnt, 2
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g_sample_cnt:
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.zero 2
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.type g_sum_abs_frm, %object
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.size g_sum_abs_frm, 4
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g_sum_abs_frm:
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.zero 4
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.type frm_count, %object
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.size frm_count, 4
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frm_count:
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.zero 4
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.zero 4
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.type g_ave_abs_rec, %object
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.size g_ave_abs_rec, 400
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g_ave_abs_rec:
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.zero 400
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.type g_vad_cnt, %object
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.size g_vad_cnt, 2
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g_vad_cnt:
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.zero 2
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.ident "GCC: (Linaro GCC 6.3-2017.05) 6.3.1 20170404"
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.section .note.GNU-stack,"",@progbits
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