108 lines
3.8 KiB
C++
108 lines
3.8 KiB
C++
//=== X86CallingConv.h - X86 Custom Calling Convention Routines -*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the custom routines for the X86 Calling Convention that
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// aren't done by tablegen.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_X86_X86CALLINGCONV_H
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#define LLVM_LIB_TARGET_X86_X86CALLINGCONV_H
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#include "MCTargetDesc/X86MCTargetDesc.h"
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#include "llvm/CodeGen/CallingConvLower.h"
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#include "llvm/IR/CallingConv.h"
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namespace llvm {
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inline bool CC_X86_32_VectorCallIndirect(unsigned &ValNo, MVT &ValVT,
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MVT &LocVT,
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CCValAssign::LocInfo &LocInfo,
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ISD::ArgFlagsTy &ArgFlags,
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CCState &State) {
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// Similar to CCPassIndirect, with the addition of inreg.
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LocVT = MVT::i32;
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LocInfo = CCValAssign::Indirect;
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ArgFlags.setInReg();
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return false; // Continue the search, but now for i32.
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}
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inline bool CC_X86_AnyReg_Error(unsigned &, MVT &, MVT &,
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CCValAssign::LocInfo &, ISD::ArgFlagsTy &,
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CCState &) {
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llvm_unreachable("The AnyReg calling convention is only supported by the " \
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"stackmap and patchpoint intrinsics.");
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// gracefully fallback to X86 C calling convention on Release builds.
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return false;
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}
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inline bool CC_X86_32_MCUInReg(unsigned &ValNo, MVT &ValVT,
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MVT &LocVT,
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CCValAssign::LocInfo &LocInfo,
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ISD::ArgFlagsTy &ArgFlags,
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CCState &State) {
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// This is similar to CCAssignToReg<[EAX, EDX, ECX]>, but makes sure
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// not to split i64 and double between a register and stack
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static const MCPhysReg RegList[] = {X86::EAX, X86::EDX, X86::ECX};
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static const unsigned NumRegs = sizeof(RegList)/sizeof(RegList[0]);
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SmallVectorImpl<CCValAssign> &PendingMembers = State.getPendingLocs();
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// If this is the first part of an double/i64/i128, or if we're already
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// in the middle of a split, add to the pending list. If this is not
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// the end of the split, return, otherwise go on to process the pending
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// list
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if (ArgFlags.isSplit() || !PendingMembers.empty()) {
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PendingMembers.push_back(
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CCValAssign::getPending(ValNo, ValVT, LocVT, LocInfo));
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if (!ArgFlags.isSplitEnd())
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return true;
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}
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// If there are no pending members, we are not in the middle of a split,
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// so do the usual inreg stuff.
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if (PendingMembers.empty()) {
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if (unsigned Reg = State.AllocateReg(RegList)) {
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State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
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return true;
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}
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return false;
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}
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assert(ArgFlags.isSplitEnd());
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// We now have the entire original argument in PendingMembers, so decide
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// whether to use registers or the stack.
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// Per the MCU ABI:
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// a) To use registers, we need to have enough of them free to contain
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// the entire argument.
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// b) We never want to use more than 2 registers for a single argument.
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unsigned FirstFree = State.getFirstUnallocated(RegList);
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bool UseRegs = PendingMembers.size() <= std::min(2U, NumRegs - FirstFree);
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for (auto &It : PendingMembers) {
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if (UseRegs)
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It.convertToReg(State.AllocateReg(RegList[FirstFree++]));
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else
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It.convertToMem(State.AllocateStack(4, 4));
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State.addLoc(It);
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}
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PendingMembers.clear();
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return true;
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}
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} // End llvm namespace
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#endif
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