69 lines
		
	
	
		
			2.0 KiB
		
	
	
	
		
			ArmAsm
		
	
	
	
			
		
		
	
	
			69 lines
		
	
	
		
			2.0 KiB
		
	
	
	
		
			ArmAsm
		
	
	
	
| // RUN: not llvm-mc -arch=amdgcn %s 2>&1 | FileCheck %s
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| // RUN: not llvm-mc -arch=amdgcn -mcpu=SI %s 2>&1 | FileCheck %s
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| 
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| //===----------------------------------------------------------------------===//
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| // Generic checks
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| //===----------------------------------------------------------------------===//
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| 
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| v_mul_i32_i24 v1, v2, 100
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| // CHECK: error: invalid operand for instruction
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| 
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| v_cndmask_b32 v1, v2, v3
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| // CHECK: error: too few operands for instruction
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| 
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| //===----------------------------------------------------------------------===//
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| // _e32 checks
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| //===----------------------------------------------------------------------===//
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| 
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| // Immediate src1
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| v_mul_i32_i24_e32 v1, v2, 100
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| // CHECK: error: invalid operand for instruction
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| 
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| // sgpr src1
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| v_mul_i32_i24_e32 v1, v2, s3
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| // CHECK: error: invalid operand for instruction
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| 
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| v_cndmask_b32_e32 v1, v2, v3, s[0:1]
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| // CHECK: error: invalid operand for instruction
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| 
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| //===----------------------------------------------------------------------===//
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| // _e64 checks
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| //===----------------------------------------------------------------------===//
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| 
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| // Immediate src0
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| v_mul_i32_i24_e64 v1, 100, v3
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| // CHECK: error: invalid operand for instruction
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| 
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| // Immediate src1
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| v_mul_i32_i24_e64 v1, v2, 100
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| // CHECK: error: invalid operand for instruction
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| 
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| v_add_i32_e32 v1, s[0:1], v2, v3
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| // CHECK: error: invalid operand for instruction
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| 
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| v_addc_u32_e32 v1, vcc, v2, v3, s[2:3]
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| // CHECK: error: invalid operand for instruction
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| 
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| v_addc_u32_e32 v1, s[0:1], v2, v3, s[2:3]
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| // CHECK: error: invalid operand for instruction
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| 
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| v_addc_u32_e32 v1, vcc, v2, v3, -1
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| // CHECK: error: invalid operand for instruction
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| 
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| v_addc_u32_e32 v1, vcc, v2, v3, 123
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| // CHECK: error: invalid operand for instruction
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| 
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| v_addc_u32_e32 v1, vcc, v2, v3, s0
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| // CHECK: error: invalid operand for instruction
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| 
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| v_addc_u32_e32 v1, -1, v2, v3, s0
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| // CHECK: error: invalid operand for instruction
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| 
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| v_addc_u32_e64 v1, s[0:1], v2, v3, 123
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| // CHECK: error: invalid operand for instruction
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| 
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| v_addc_u32 v1, s[0:1], v2, v3, 123
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| // CHECK: error: invalid operand for instruction
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| 
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| // TODO: Constant bus restrictions
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