268 lines
6.1 KiB
ArmAsm
268 lines
6.1 KiB
ArmAsm
# RUN: not llvm-mc -triple s390x-linux-gnu < %s 2> %t
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# RUN: FileCheck < %t %s
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# Test GR32 operands
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#
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#CHECK: error: invalid operand for instruction
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#CHECK: lr %f0,%r1
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#CHECK: error: invalid operand for instruction
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#CHECK: lr %a0,%r1
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#CHECK: error: invalid operand for instruction
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#CHECK: lr %r0,%f1
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#CHECK: error: invalid operand for instruction
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#CHECK: lr %r0,%a1
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#CHECK: error: invalid operand for instruction
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#CHECK: lr %r0,0
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#CHECK: error: invalid operand for instruction
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#CHECK: lr %r0,0(%r1)
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lr %f0,%r1
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lr %a0,%r1
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lr %r0,%f1
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lr %r0,%a1
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lr %r0,0
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lr %r0,0(%r1)
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# Test GR64 operands
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#
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#CHECK: error: invalid operand for instruction
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#CHECK: lgr %f0,%r1
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#CHECK: error: invalid operand for instruction
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#CHECK: lgr %a0,%r1
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#CHECK: error: invalid operand for instruction
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#CHECK: lgr %r0,%f1
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#CHECK: error: invalid operand for instruction
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#CHECK: lgr %r0,%a1
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#CHECK: error: invalid operand for instruction
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#CHECK: lgr %r0,0
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#CHECK: error: invalid operand for instruction
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#CHECK: lgr %r0,0(%r1)
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lgr %f0,%r1
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lgr %a0,%r1
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lgr %r0,%f1
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lgr %r0,%a1
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lgr %r0,0
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lgr %r0,0(%r1)
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# Test GR128 operands
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#
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#CHECK: error: invalid register pair
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#CHECK: dlr %r1,%r0
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#CHECK: error: invalid register pair
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#CHECK: dlr %r3,%r0
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#CHECK: error: invalid register pair
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#CHECK: dlr %r5,%r0
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#CHECK: error: invalid register pair
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#CHECK: dlr %r7,%r0
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#CHECK: error: invalid register pair
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#CHECK: dlr %r9,%r0
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#CHECK: error: invalid register pair
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#CHECK: dlr %r11,%r0
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#CHECK: error: invalid register pair
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#CHECK: dlr %r13,%r0
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#CHECK: error: invalid register pair
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#CHECK: dlr %r15,%r0
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#CHECK: error: invalid operand for instruction
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#CHECK: dlr %f0,%r1
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#CHECK: error: invalid operand for instruction
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#CHECK: dlr %a0,%r1
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#CHECK: error: invalid operand for instruction
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#CHECK: dlr %r0,%f1
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#CHECK: error: invalid operand for instruction
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#CHECK: dlr %r0,%a1
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#CHECK: error: invalid operand for instruction
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#CHECK: dlr %r0,0
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#CHECK: error: invalid operand for instruction
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#CHECK: dlr %r0,0(%r1)
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dlr %r1,%r0
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dlr %r3,%r0
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dlr %r5,%r0
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dlr %r7,%r0
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dlr %r9,%r0
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dlr %r11,%r0
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dlr %r13,%r0
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dlr %r15,%r0
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dlr %f0,%r1
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dlr %a0,%r1
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dlr %r0,%f1
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dlr %r0,%a1
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dlr %r0,0
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dlr %r0,0(%r1)
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# Test FP32 operands
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#
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#CHECK: error: invalid operand for instruction
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#CHECK: ler %r0,%f1
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#CHECK: error: invalid operand for instruction
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#CHECK: ler %a0,%f1
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#CHECK: error: invalid operand for instruction
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#CHECK: ler %f0,%r1
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#CHECK: error: invalid operand for instruction
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#CHECK: ler %f0,%a1
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#CHECK: error: invalid operand for instruction
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#CHECK: ler %f0,0
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#CHECK: error: invalid operand for instruction
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#CHECK: ler %f0,0(%r1)
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ler %r0,%f1
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ler %a0,%f1
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ler %f0,%r1
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ler %f0,%a1
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ler %f0,0
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ler %f0,0(%r1)
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# Test FP64 operands
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#
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#CHECK: error: invalid operand for instruction
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#CHECK: ldr %r0,%f1
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#CHECK: error: invalid operand for instruction
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#CHECK: ldr %a0,%f1
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#CHECK: error: invalid operand for instruction
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#CHECK: ldr %f0,%r1
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#CHECK: error: invalid operand for instruction
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#CHECK: ldr %f0,%a1
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#CHECK: error: invalid operand for instruction
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#CHECK: ldr %f0,0
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#CHECK: error: invalid operand for instruction
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#CHECK: ldr %f0,0(%r1)
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ldr %r0,%f1
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ldr %a0,%f1
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ldr %f0,%r1
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ldr %f0,%a1
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ldr %f0,0
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ldr %f0,0(%r1)
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# Test FP128 operands
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#
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#CHECK: error: invalid register pair
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#CHECK: lxr %f2,%f0
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#CHECK: error: invalid register pair
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#CHECK: lxr %f0,%f3
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#CHECK: error: invalid register pair
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#CHECK: lxr %f6,%f0
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#CHECK: error: invalid register pair
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#CHECK: lxr %f0,%f7
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#CHECK: error: invalid register pair
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#CHECK: lxr %f10,%f0
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#CHECK: error: invalid register pair
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#CHECK: lxr %f0,%f11
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#CHECK: error: invalid register pair
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#CHECK: lxr %f14,%f0
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#CHECK: error: invalid register pair
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#CHECK: lxr %f0,%f15
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#CHECK: error: invalid operand for instruction
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#CHECK: lxr %r0,%f1
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#CHECK: error: invalid operand for instruction
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#CHECK: lxr %a0,%f1
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#CHECK: error: invalid operand for instruction
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#CHECK: lxr %f0,%r1
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#CHECK: error: invalid operand for instruction
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#CHECK: lxr %f0,%a1
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#CHECK: error: invalid operand for instruction
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#CHECK: lxr %f0,0
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#CHECK: error: invalid operand for instruction
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#CHECK: lxr %f0,0(%r1)
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lxr %f2,%f0
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lxr %f0,%f3
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lxr %f6,%f0
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lxr %f0,%f7
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lxr %f10,%f0
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lxr %f0,%f11
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lxr %f14,%f0
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lxr %f0,%f15
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lxr %r0,%f1
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lxr %a0,%f1
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lxr %f0,%r1
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lxr %f0,%a1
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lxr %f0,0
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lxr %f0,0(%r1)
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# Test access register operands
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#
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#CHECK: error: invalid operand for instruction
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#CHECK: ear %r0,%r0
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#CHECK: error: invalid operand for instruction
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#CHECK: ear %r0,%f0
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#CHECK: error: invalid operand for instruction
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#CHECK: ear %r0,0
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#CHECK: error: invalid operand for instruction
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#CHECK: ear %r0,0(%r1)
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ear %r0,%r0
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ear %r0,%f0
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ear %r0,0
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ear %r0,0(%r1)
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.cfi_startproc
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# Test general register parsing, with no predetermined class in mind.
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#
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#CHECK: error: register expected
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#CHECK: .cfi_offset r0,0
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#CHECK: error: invalid register
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#CHECK: .cfi_offset %,0
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#CHECK: error: invalid register
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#CHECK: .cfi_offset %r,0
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#CHECK: error: invalid register
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#CHECK: .cfi_offset %f,0
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#CHECK: error: invalid register
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#CHECK: .cfi_offset %a,0
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#CHECK: error: invalid register
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#CHECK: .cfi_offset %0,0
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#CHECK: error: invalid register
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#CHECK: .cfi_offset %c0,0
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#CHECK: error: invalid register
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#CHECK: .cfi_offset %r16,0
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#CHECK: error: invalid register
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#CHECK: .cfi_offset %f16,0
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#CHECK: error: invalid register
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#CHECK: .cfi_offset %a16,0
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#CHECK: error: invalid register
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#CHECK: .cfi_offset %reef,0
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#CHECK: error: invalid register
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#CHECK: .cfi_offset %arid,0
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.cfi_offset r0,0
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.cfi_offset %,0
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.cfi_offset %r,0
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.cfi_offset %f,0
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.cfi_offset %a,0
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.cfi_offset %0,0
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.cfi_offset %c0,0
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.cfi_offset %r16,0
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.cfi_offset %f16,0
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.cfi_offset %a16,0
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.cfi_offset %reef,0
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.cfi_offset %arid,0
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# Test invalid CFI registers. Will need to be updated once access
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# registers are modelled as LLVM registers.
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#
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#CHECK: error: invalid operand for instruction
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#CHECK: .cfi_offset %a0,0
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.cfi_offset %a0,0
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.cfi_endproc
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#CHECK: error: %r0 used in an address
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#CHECK: sll %r2,8(%r0)
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#CHECK: error: %r0 used in an address
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#CHECK: br %r0
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#CHECK: error: %r0 used in an address
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#CHECK: l %r1,8(%r0)
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#CHECK: error: %r0 used in an address
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#CHECK: l %r1,8(%r0,%r15)
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#CHECK: error: %r0 used in an address
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#CHECK: l %r1,8(%r15,%r0)
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sll %r2,8(%r0)
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br %r0
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l %r1,8(%r0)
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l %r1,8(%r0,%r15)
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l %r1,8(%r15,%r0)
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