91 lines
2.8 KiB
Plaintext
91 lines
2.8 KiB
Plaintext
menuconfig PCI
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bool "PCI support"
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default y if PPC
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help
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Enable support for PCI (Peripheral Interconnect Bus), a type of bus
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used on some devices to allow the CPU to communicate with its
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peripherals.
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if PCI
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config DM_PCI
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bool "Enable driver model for PCI"
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depends on DM
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help
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Use driver model for PCI. Driver model is the new method for
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orgnising devices in U-Boot. For PCI, driver model keeps track of
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available PCI devices, allows scanning of PCI buses and provides
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device configuration support.
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config DM_PCI_COMPAT
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bool "Enable compatible functions for PCI"
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depends on DM_PCI
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help
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Enable compatibility functions for PCI so that old code can be used
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with CONFIG_DM_PCI enabled. This should be used as an interim
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measure when porting a board to use driver model for PCI. Once the
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board is fully supported, this option should be disabled.
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config PCI_PNP
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bool "Enable Plug & Play support for PCI"
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depends on PCI || DM_PCI
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default y
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help
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Enable PCI memory and I/O space resource allocation and assignment.
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config PCIE_DW_MVEBU
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bool "Enable Armada-8K PCIe driver (DesignWare core)"
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default n
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depends on DM_PCI
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depends on ARMADA_8K
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help
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Say Y here if you want to enable PCIe controller support on
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Armada-8K SoCs. The PCIe controller on Armada-8K is based on
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DesignWare hardware.
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config PCI_SANDBOX
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bool "Sandbox PCI support"
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depends on SANDBOX && DM_PCI
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help
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Support PCI on sandbox, as an emulated bus. This permits testing of
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PCI feature such as bus scanning, device configuration and device
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access. The available (emulated) devices are defined statically in
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the device tree but the normal PCI scan technique is used to find
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then.
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config PCI_TEGRA
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bool "Tegra PCI support"
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depends on TEGRA
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depends on (TEGRA186 && POWER_DOMAIN) || (!TEGRA186)
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help
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Enable support for the PCIe controller found on some generations of
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Tegra. Tegra20 has 2 root ports with a total of 4 lanes, Tegra30 has
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3 root ports with a total of 6 lanes and Tegra124 has 2 root ports
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with a total of 5 lanes. Some boards require this for Ethernet
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support to work (e.g. beaver, jetson-tk1).
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config PCI_XILINX
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bool "Xilinx AXI Bridge for PCI Express"
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depends on DM_PCI
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help
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Enable support for the Xilinx AXI bridge for PCI express, an IP block
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which can be used on some generations of Xilinx FPGAs.
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config PCIE_LAYERSCAPE
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bool "Layerscape PCIe support"
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depends on DM_PCI
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help
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Support Layerscape PCIe. The Layerscape SoC may have one or several
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PCIe controllers. The PCIe may works in RC or EP mode according to
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RCW[HOST_AGT_PEX] setting.
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config PCIE_DW_ROCKCHIP
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bool "Rockchip DesignWare PCIe controller"
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depends on DM_PCI
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depends on ARCH_ROCKCHIP
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select CONFIG_DM_REGULATOR_GPIO
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help
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Enables support for the DW PCIe controller in the Rockchip SoC.
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endif
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