288 lines
		
	
	
		
			8.7 KiB
		
	
	
	
		
			C
		
	
	
	
			
		
		
	
	
			288 lines
		
	
	
		
			8.7 KiB
		
	
	
	
		
			C
		
	
	
	
| /*
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|  * am3517_evm.h - Default configuration for AM3517 EVM board.
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|  *
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|  * Author: Vaibhav Hiremath <hvaibhav@ti.com>
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|  *
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|  * Based on omap3_evm_config.h
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|  *
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|  * Copyright (C) 2010 Texas Instruments Incorporated
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|  *
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|  * SPDX-License-Identifier:	GPL-2.0+
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|  */
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| 
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| #ifndef __CONFIG_H
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| #define __CONFIG_H
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| 
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| #define CONFIG_NR_DRAM_BANKS	2	/* CS1 may or may not be populated */
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| 
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| #define CONFIG_EMIF4	/* The chip has EMIF4 controller */
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| 
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| /*
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|  * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
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|  * 64 bytes before this address should be set aside for u-boot.img's
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|  * header. That is 0x800FFFC0--0x80100000 should not be used for any
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|  * other needs.
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|  */
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| #define CONFIG_SYS_TEXT_BASE		0x80100000
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| #define CONFIG_SYS_SPL_MALLOC_START	0x80208000
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| #define CONFIG_SYS_SPL_MALLOC_SIZE	0x100000
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| 
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| #include <asm/arch/cpu.h>		/* get chip and board defs */
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| #include <asm/arch/omap.h>
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| 
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| #define CONFIG_MISC_INIT_R
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| #define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs */
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| #define CONFIG_SETUP_MEMORY_TAGS
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| #define CONFIG_INITRD_TAG
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| #define CONFIG_REVISION_TAG
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| 
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| /* Clock Defines */
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| #define V_OSCK			26000000	/* Clock output from T2 */
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| #define V_SCLK			(V_OSCK >> 1)
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| 
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| /* Size of malloc() pool */
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| #define CONFIG_SYS_MALLOC_LEN		(16 << 20)
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| 
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| /* Hardware drivers */
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| 
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| /* NS16550 Configuration */
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| #define V_NS16550_CLK			48000000	/* 48MHz (APLL96/2) */
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| #define CONFIG_SYS_NS16550_SERIAL
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| #define CONFIG_SYS_NS16550_REG_SIZE	(-4)
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| #define CONFIG_SYS_NS16550_CLK		V_NS16550_CLK
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| 
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| /* select serial console configuration */
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| #define CONFIG_CONS_INDEX		3
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| #define CONFIG_SYS_NS16550_COM3		OMAP34XX_UART3
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| #define CONFIG_SERIAL3			3	/* UART3 on AM3517 EVM */
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| 
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| /* allow to overwrite serial and ethaddr */
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| #define CONFIG_ENV_OVERWRITE
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| #define CONFIG_SYS_BAUDRATE_TABLE	{4800, 9600, 19200, 38400, 57600,\
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| 					115200}
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| 
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| /*
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|  * USB configuration
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|  * Enable CONFIG_USB_MUSB_HOST for Host functionalities MSC, keyboard
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|  * Enable CONFIG_USB_MUSB_GADGET for Device functionalities.
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|  */
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| #define CONFIG_USB_MUSB_AM35X
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| #define CONFIG_USB_MUSB_PIO_ONLY
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| 
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| #ifdef CONFIG_USB_MUSB_AM35X
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| 
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| #ifdef CONFIG_USB_MUSB_HOST
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| 
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| #ifdef CONFIG_USB_KEYBOARD
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| #define CONFIG_PREBOOT "usb start"
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| #endif /* CONFIG_USB_KEYBOARD */
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| 
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| #endif /* CONFIG_USB_MUSB_HOST */
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| 
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| #endif /* CONFIG_USB_MUSB_AM35X */
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| 
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| /* I2C */
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| #define CONFIG_SYS_I2C
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| #define CONFIG_SYS_OMAP24_I2C_SPEED	100000
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| #define CONFIG_SYS_OMAP24_I2C_SLAVE	1
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| 
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| /* Ethernet */
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| #define CONFIG_DRIVER_TI_EMAC
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| #define CONFIG_DRIVER_TI_EMAC_USE_RMII
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| #define CONFIG_MII
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| #define CONFIG_BOOTP_DEFAULT
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| #define CONFIG_BOOTP_DNS
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| #define CONFIG_BOOTP_DNS2
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| #define CONFIG_BOOTP_SEND_HOSTNAME
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| #define CONFIG_NET_RETRY_COUNT		10
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| 
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| /* Board NAND Info. */
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| #ifdef CONFIG_NAND
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| #define CONFIG_SYS_NAND_ADDR		NAND_BASE	/* physical address */
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| 							/* to access nand */
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| #define CONFIG_SYS_NAND_5_ADDR_CYCLE
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| #define CONFIG_SYS_NAND_PAGE_COUNT	64
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| #define CONFIG_SYS_NAND_PAGE_SIZE	2048
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| #define CONFIG_SYS_NAND_OOBSIZE		64
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| #define CONFIG_SYS_NAND_BLOCK_SIZE	(128 * 1024)
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| #define CONFIG_SYS_NAND_BAD_BLOCK_POS	NAND_LARGE_BADBLOCK_POS
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| #define CONFIG_SYS_NAND_ECCPOS		{ 2,  3,  4,  5,  6,  7,  8,  9, 10, \
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| 					 11, 12, 13, 14, 16, 17, 18, 19, 20, \
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| 					 21, 22, 23, 24, 25, 26, 27, 28, 30, \
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| 					 31, 32, 33, 34, 35, 36, 37, 38, 39, \
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| 					 40, 41, 42, 44, 45, 46, 47, 48, 49, \
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| 					 50, 51, 52, 53, 54, 55, 56 }
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| 
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| #define CONFIG_SYS_NAND_ECCSIZE		512
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| #define CONFIG_SYS_NAND_ECCBYTES	13
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| #define CONFIG_NAND_OMAP_ECCSCHEME	OMAP_ECC_BCH8_CODE_HW_DETECTION_SW
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| #define CONFIG_SYS_NAND_MAX_OOBFREE	2
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| #define CONFIG_SYS_NAND_MAX_ECCPOS	56
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| #define CONFIG_SYS_NAND_U_BOOT_START	CONFIG_SYS_TEXT_BASE
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| #define CONFIG_SYS_NAND_U_BOOT_OFFS	0x80000
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| /* NAND block size is 128 KiB.  Synchronize these values with
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|  * corresponding Device Tree entries in Linux:
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|  *  MLO(SPL)             4 * NAND_BLOCK_SIZE = 512 KiB  @ 0x000000
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|  *  U-Boot              15 * NAND_BLOCK_SIZE = 1920 KiB @ 0x080000
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|  *  U-Boot environment   2 * NAND_BLOCK_SIZE = 256 KiB  @ 0x260000
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|  *  Kernel              64 * NAND_BLOCK_SIZE = 8 MiB    @ 0x2A0000
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|  *  DTB                  4 * NAND_BLOCK_SIZE = 512 KiB  @ 0xAA0000
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|  *  RootFS              Remaining Flash Space           @ 0xB20000
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|  */
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| #define MTDIDS_DEFAULT "nand0=omap2-nand.0"
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| #define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:"	\
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| 	"512k(MLO),"					\
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| 	"1920k(u-boot),"				\
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| 	"256k(u-boot-env),"				\
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| 	"8m(kernel),"					\
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| 	"512k(dtb),"					\
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| 	"-(rootfs)"
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| #else
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| #define MTDIDS_DEFAULT
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| #define MTDPARTS_DEFAULT
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| #endif /* CONFIG_NAND */
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| 
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| /* Environment information */
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| 
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| #define CONFIG_BOOTFILE		"uImage"
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| 
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| #define CONFIG_EXTRA_ENV_SETTINGS \
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| 	"loadaddr=0x82000000\0" \
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| 	"console=ttyO2,115200n8\0" \
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| 	"fdtfile=am3517-evm.dtb\0" \
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| 	"fdtaddr=0x82C00000\0" \
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| 	"vram=16M\0" \
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| 	"bootenv=uEnv.txt\0" \
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| 	"cmdline=\0" \
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| 	"optargs=\0" \
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| 	"mtdids=" MTDIDS_DEFAULT "\0" \
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| 	"mtdparts=" MTDPARTS_DEFAULT "\0" \
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| 	"mmcdev=0\0" \
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| 	"mmcpart=1\0" \
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| 	"mmcroot=/dev/mmcblk0p2 rw\0" \
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| 	"mmcrootfstype=ext4 rootwait fixrtc\0" \
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| 	"mmcargs=setenv bootargs console=${console} " \
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| 		"${mtdparts} " \
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| 		"${optargs} " \
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| 		"root=${mmcroot} " \
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| 		"rootfstype=${mmcrootfstype} " \
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| 		"${cmdline}\0" \
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| 	"nandargs=setenv bootargs console=${console} " \
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| 		"${mtdparts} " \
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| 		"${optargs} " \
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| 		"root=ubi0:rootfs rw ubi.mtd=rootfs " \
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| 		"rootfstype=ubifs rootwait " \
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| 		"${cmdline}\0" \
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| 	"loadbootenv=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${bootenv}\0"\
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| 	"importbootenv=echo Importing environment from mmc ...; " \
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| 		"env import -t ${loadaddr} ${filesize}\0" \
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| 	"bootscript=echo Running bootscript from mmc ...; " \
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| 		"source ${loadaddr}\0" \
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| 	"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${bootfile}\0" \
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| 	"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdtaddr} ${fdtfile}\0" \
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| 	"mmcboot=echo Booting from mmc ...; " \
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| 		"run mmcargs; " \
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| 		"bootz ${loadaddr} - ${fdtaddr}\0" \
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| 	"nandboot=echo Booting from nand ...; " \
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| 		"run nandargs; " \
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| 		"nand read ${loadaddr} 2a0000 800000; " \
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| 		"nand read ${fdtaddr} aa0000 80000; " \
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| 		"bootm ${loadaddr} - ${fdtaddr}\0" \
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| 
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| #define CONFIG_BOOTCOMMAND \
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| 	"mmc dev ${mmcdev}; if mmc rescan; then " \
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| 		"echo SD/MMC found on device $mmcdev; " \
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| 		"if run loadbootenv; then " \
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| 			"run importbootenv; " \
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| 		"fi; " \
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| 		"echo Checking if uenvcmd is set ...; " \
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| 		"if test -n $uenvcmd; then " \
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| 			"echo Running uenvcmd ...; " \
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| 			"run uenvcmd; " \
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| 		"fi; " \
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| 		"echo Running default loadimage ...; " \
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| 		"setenv bootfile zImage; " \
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| 		"if run loadimage; then " \
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| 			"run loadfdt; " \
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| 			"run mmcboot; " \
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| 		"fi; " \
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| 	"else run nandboot; fi"
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| 
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| /* Miscellaneous configurable options */
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| #define CONFIG_AUTO_COMPLETE
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| #define CONFIG_CMDLINE_EDITING
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| #define CONFIG_SYS_LONGHELP
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| 
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| /* We set the max number of command args high to avoid HUSH bugs. */
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| #define CONFIG_SYS_MAXARGS		64
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| 
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| /* Console I/O Buffer Size */
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| #define CONFIG_SYS_CBSIZE		512
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| 
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| /* memtest works on */
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| #define CONFIG_SYS_MEMTEST_START	(OMAP34XX_SDRC_CS0)
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| #define CONFIG_SYS_MEMTEST_END		(OMAP34XX_SDRC_CS0 + \
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| 					0x01F00000) /* 31MB */
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| 
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| #define CONFIG_SYS_LOAD_ADDR		(OMAP34XX_SDRC_CS0) /* default load */
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| 								/* address */
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| 
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| /*
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|  * AM3517 has 12 GP timers, they can be driven by the system clock
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|  * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
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|  * This rate is divided by a local divisor.
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|  */
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| #define CONFIG_SYS_TIMERBASE		OMAP34XX_GPT2
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| #define CONFIG_SYS_PTV			2	/* Divisor: 2^(PTV+1) => 8 */
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| 
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| /* Physical Memory Map */
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| #define PHYS_SDRAM_1			OMAP34XX_SDRC_CS0
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| #define PHYS_SDRAM_2			OMAP34XX_SDRC_CS1
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| #define CONFIG_SYS_CS0_SIZE		(256 * 1024 * 1024)
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| #define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
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| #define CONFIG_SYS_INIT_RAM_ADDR	0x4020f800
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| #define CONFIG_SYS_INIT_RAM_SIZE	0x800
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| #define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_INIT_RAM_ADDR + \
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| 					 CONFIG_SYS_INIT_RAM_SIZE - \
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| 					 GENERATED_GBL_DATA_SIZE)
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| 
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| /* FLASH and environment organization */
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| 
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| /* **** PISMO SUPPORT *** */
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| #define CONFIG_SYS_MAX_FLASH_SECT	520	/* max number of sectors */
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| 						/* on one chip */
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| #define CONFIG_SYS_MAX_FLASH_BANKS	2	/* max number of flash banks */
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| #define CONFIG_SYS_MONITOR_LEN		(256 << 10)	/* Reserve 2 sectors */
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| 
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| #if defined(CONFIG_NAND)
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| #define CONFIG_SYS_FLASH_BASE		NAND_BASE
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| #endif
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| 
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| /* Monitor at start of flash */
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| #define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_FLASH_BASE
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| 
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| #define CONFIG_SYS_ENV_SECT_SIZE	(128 << 10)	/* 128 KiB */
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| #define CONFIG_ENV_SIZE			CONFIG_SYS_ENV_SECT_SIZE
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| #define SMNAND_ENV_OFFSET		0x260000 /* environment starts here */
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| #define CONFIG_ENV_OFFSET		SMNAND_ENV_OFFSET
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| #define CONFIG_ENV_ADDR			SMNAND_ENV_OFFSET
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| 
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| /* Defines for SPL */
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| #define CONFIG_SPL_FRAMEWORK
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| #define CONFIG_SPL_NAND_SIMPLE
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| #define CONFIG_SPL_TEXT_BASE		0x40200000
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| #define CONFIG_SPL_MAX_SIZE		(SRAM_SCRATCH_SPACE_ADDR - \
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| 					 CONFIG_SPL_TEXT_BASE)
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| 
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| #define CONFIG_SPL_BSS_START_ADDR	0x80000000
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| #define CONFIG_SPL_BSS_MAX_SIZE		0x80000		/* 512 KB */
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| 
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| #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	1
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| #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME		"u-boot.img"
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| 
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| #define CONFIG_SPL_NAND_BASE
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| #define CONFIG_SPL_NAND_DRIVERS
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| #define CONFIG_SPL_NAND_ECC
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| 
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| #endif /* __CONFIG_H */
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